2011-07-20 07:26:54 +08:00
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/dts-v1/;
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/include/ "tegra20.dtsi"
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/ {
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model = "NVIDIA Seaboard";
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compatible = "nvidia,seaboard", "nvidia,tegra20";
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memory {
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2012-05-12 06:11:38 +08:00
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reg = <0x00000000 0x40000000>;
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2011-07-20 07:26:54 +08:00
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};
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2012-05-12 06:17:47 +08:00
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pinmux {
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2012-03-16 06:27:36 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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ata {
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nvidia,pins = "ata";
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nvidia,function = "ide";
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};
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atb {
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nvidia,pins = "atb", "gma", "gme";
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nvidia,function = "sdio4";
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};
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atc {
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nvidia,pins = "atc";
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nvidia,function = "nand";
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};
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atd {
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nvidia,pins = "atd", "ate", "gmb", "spia",
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"spib", "spic";
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nvidia,function = "gmi";
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};
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cdev1 {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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cdev2 {
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nvidia,pins = "cdev2";
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nvidia,function = "pllp_out4";
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};
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crtp {
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nvidia,pins = "crtp", "lm1";
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nvidia,function = "crt";
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};
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csus {
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nvidia,pins = "csus";
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nvidia,function = "vi_sensor_clk";
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};
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dap1 {
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nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap2 {
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nvidia,pins = "dap2";
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nvidia,function = "dap2";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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};
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dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
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nvidia,function = "vi";
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};
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dtf {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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gmc {
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nvidia,pins = "gmc";
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nvidia,function = "uartd";
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};
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gmd {
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nvidia,pins = "gmd";
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nvidia,function = "sflash";
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};
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gpu {
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nvidia,pins = "gpu";
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nvidia,function = "pwm";
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};
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gpu7 {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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gpv {
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nvidia,pins = "gpv", "slxa", "slxk";
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nvidia,function = "pcie";
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};
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hdint {
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nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
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2012-04-27 01:21:54 +08:00
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"lsck", "lsda";
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2012-03-16 06:27:36 +08:00
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nvidia,function = "hdmi";
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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};
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irrx {
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nvidia,pins = "irrx", "irtx";
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nvidia,function = "uartb";
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};
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kbca {
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nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
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"kbce", "kbcf";
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nvidia,function = "kbc";
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};
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lcsn {
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nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
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"lsdi", "lvp0";
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nvidia,function = "rsvd4";
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};
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ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
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"ld5", "ld6", "ld7", "ld8", "ld9",
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"ld10", "ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ldi", "lhp0",
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"lhp1", "lhp2", "lhs", "lpp", "lsc0",
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"lspi", "lvp1", "lvs";
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nvidia,function = "displaya";
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};
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2012-04-17 07:41:17 +08:00
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owc {
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nvidia,pins = "owc", "spdi", "spdo", "uac";
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nvidia,function = "rsvd2";
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};
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2012-03-16 06:27:36 +08:00
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rm {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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};
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sdb {
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nvidia,pins = "sdb", "sdc", "sdd";
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nvidia,function = "sdio3";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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slxc {
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nvidia,pins = "slxc", "slxd";
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nvidia,function = "spdif";
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};
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spid {
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nvidia,pins = "spid", "spie", "spif";
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nvidia,function = "spi1";
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};
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spig {
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nvidia,pins = "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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uaa {
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nvidia,pins = "uaa", "uab", "uda";
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nvidia,function = "ulpi";
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};
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uad {
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nvidia,pins = "uad";
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nvidia,function = "irda";
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};
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uca {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
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conf_ata {
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nvidia,pins = "ata", "atb", "atc", "atd",
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"cdev1", "cdev2", "dap1", "dap2",
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2012-04-17 07:41:17 +08:00
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"dap4", "ddc", "dtf", "gma", "gmc", "gmd",
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2012-03-16 06:27:36 +08:00
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"gme", "gpu", "gpu7", "i2cp", "irrx",
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"irtx", "pta", "rm", "sdc", "sdd",
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"slxd", "slxk", "spdi", "spdo", "uac",
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"uad", "uca", "ucb", "uda";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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conf_ate {
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2012-04-17 07:41:17 +08:00
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nvidia,pins = "ate", "csus", "dap3",
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2012-03-16 06:27:36 +08:00
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"gpv", "owc", "slxc", "spib", "spid",
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"spie";
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nvidia,pull = <0>;
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nvidia,tristate = <1>;
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};
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conf_ck32 {
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nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
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nvidia,pull = <0>;
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};
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conf_crtp {
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nvidia,pins = "crtp", "gmb", "slxa", "spia",
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"spig", "spih";
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nvidia,pull = <2>;
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nvidia,tristate = <1>;
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};
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conf_dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd";
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nvidia,pull = <1>;
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nvidia,tristate = <0>;
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};
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conf_dte {
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nvidia,pins = "dte", "spif";
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nvidia,pull = <1>;
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nvidia,tristate = <1>;
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};
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conf_hdint {
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nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
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"lpw1", "lsc1", "lsck", "lsda", "lsdi",
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"lvp0";
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nvidia,tristate = <1>;
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};
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conf_kbca {
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nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
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"kbce", "kbcf", "sdio1", "spic", "uaa",
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"uab";
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nvidia,pull = <2>;
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nvidia,tristate = <0>;
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};
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conf_lc {
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nvidia,pins = "lc", "ls";
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nvidia,pull = <2>;
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};
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conf_ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
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"ld5", "ld6", "ld7", "ld8", "ld9",
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"ld10", "ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ldi", "lhp0",
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"lhp1", "lhp2", "lhs", "lm0", "lpp",
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"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
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"lvs", "pmc", "sdb";
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nvidia,tristate = <0>;
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};
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conf_ld17_0 {
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nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
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"ld23_22";
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nvidia,pull = <1>;
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};
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drive_sdio1 {
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nvidia,pins = "drive_sdio1";
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nvidia,high-speed-mode = <0>;
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nvidia,schmitt = <0>;
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nvidia,low-power-mode = <3>;
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nvidia,pull-down-strength = <31>;
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nvidia,pull-up-strength = <31>;
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nvidia,slew-rate-rising = <3>;
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nvidia,slew-rate-falling = <3>;
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};
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};
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2012-04-17 07:41:17 +08:00
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state_i2cmux_ddc: pinmux_i2cmux_ddc {
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ddc {
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nvidia,pins = "ddc";
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nvidia,function = "i2c2";
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};
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pta {
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nvidia,pins = "pta";
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nvidia,function = "rsvd4";
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};
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};
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state_i2cmux_pta: pinmux_i2cmux_pta {
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ddc {
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nvidia,pins = "ddc";
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nvidia,function = "rsvd4";
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};
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pta {
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nvidia,pins = "pta";
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nvidia,function = "i2c2";
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};
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};
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state_i2cmux_idle: pinmux_i2cmux_idle {
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ddc {
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nvidia,pins = "ddc";
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nvidia,function = "rsvd4";
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};
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pta {
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nvidia,pins = "pta";
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nvidia,function = "rsvd4";
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};
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};
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2012-03-16 06:27:36 +08:00
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};
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2012-05-12 07:32:56 +08:00
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i2s@70002800 {
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status = "okay";
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2012-05-12 07:03:26 +08:00
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};
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serial@70006300 {
|
2012-05-12 07:32:56 +08:00
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status = "okay";
|
2012-05-12 07:03:26 +08:00
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clock-frequency = <216000000>;
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};
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|
2011-11-22 05:44:09 +08:00
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i2c@7000c000 {
|
2012-05-12 07:32:56 +08:00
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status = "okay";
|
2011-11-22 05:44:09 +08:00
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clock-frequency = <400000>;
|
2012-01-12 07:09:57 +08:00
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wm8903: wm8903@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupt-parent = <&gpio>;
|
2012-05-12 06:11:38 +08:00
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interrupts = <187 0x04>;
|
2012-01-12 07:09:57 +08:00
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
|
2012-05-12 06:11:38 +08:00
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|
|
gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
|
2012-01-12 07:09:57 +08:00
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};
|
2012-04-23 20:11:36 +08:00
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|
|
/* ALS and proximity sensor */
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|
isl29018@44 {
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|
|
compatible = "isil,isl29018";
|
|
|
|
|
reg = <0x44>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
2012-05-12 06:11:38 +08:00
|
|
|
interrupts = <202 0x04>; /* GPIO PZ2 */
|
2012-04-23 20:11:36 +08:00
|
|
|
};
|
2011-12-23 00:33:13 +08:00
|
|
|
|
|
|
|
|
gyrometer@68 {
|
|
|
|
|
compatible = "invn,mpu3050";
|
|
|
|
|
reg = <0x68>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <204 0x04>; /* gpio PZ4 */
|
|
|
|
|
};
|
2011-11-22 05:44:09 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000c400 {
|
2012-05-12 07:32:56 +08:00
|
|
|
status = "okay";
|
2012-04-27 01:19:03 +08:00
|
|
|
clock-frequency = <100000>;
|
2011-11-22 05:44:09 +08:00
|
|
|
};
|
|
|
|
|
|
2012-04-17 07:41:17 +08:00
|
|
|
i2cmux {
|
|
|
|
|
compatible = "i2c-mux-pinctrl";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
i2c-parent = <&{/i2c@7000c400}>;
|
|
|
|
|
|
|
|
|
|
pinctrl-names = "ddc", "pta", "idle";
|
|
|
|
|
pinctrl-0 = <&state_i2cmux_ddc>;
|
|
|
|
|
pinctrl-1 = <&state_i2cmux_pta>;
|
|
|
|
|
pinctrl-2 = <&state_i2cmux_idle>;
|
|
|
|
|
|
|
|
|
|
i2c@0 {
|
|
|
|
|
reg = <0>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@1 {
|
|
|
|
|
reg = <1>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
2012-04-26 06:57:28 +08:00
|
|
|
|
|
|
|
|
smart-battery@b {
|
|
|
|
|
compatible = "ti,bq20z75", "smart-battery-1.1";
|
|
|
|
|
reg = <0xb>;
|
|
|
|
|
ti,i2c-retry-count = <2>;
|
|
|
|
|
ti,poll-retry-count = <10>;
|
|
|
|
|
};
|
2012-04-17 07:41:17 +08:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2011-11-22 05:44:09 +08:00
|
|
|
i2c@7000c500 {
|
2012-05-12 07:32:56 +08:00
|
|
|
status = "okay";
|
2011-11-22 05:44:09 +08:00
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000d000 {
|
2012-05-12 07:32:56 +08:00
|
|
|
status = "okay";
|
2011-11-22 05:44:09 +08:00
|
|
|
clock-frequency = <400000>;
|
2011-12-18 14:29:32 +08:00
|
|
|
|
2012-06-21 05:58:34 +08:00
|
|
|
pmic: tps6586x@34 {
|
|
|
|
|
compatible = "ti,tps6586x";
|
|
|
|
|
reg = <0x34>;
|
|
|
|
|
interrupts = <0 86 0x4>;
|
|
|
|
|
|
2012-09-12 01:42:26 +08:00
|
|
|
ti,system-power-controller;
|
|
|
|
|
|
2012-06-21 05:58:34 +08:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
|
|
|
|
|
sys-supply = <&vdd_5v0_reg>;
|
|
|
|
|
vin-sm0-supply = <&sys_reg>;
|
|
|
|
|
vin-sm1-supply = <&sys_reg>;
|
|
|
|
|
vin-sm2-supply = <&sys_reg>;
|
|
|
|
|
vinldo01-supply = <&sm2_reg>;
|
|
|
|
|
vinldo23-supply = <&sm2_reg>;
|
|
|
|
|
vinldo4-supply = <&sm2_reg>;
|
|
|
|
|
vinldo678-supply = <&sm2_reg>;
|
|
|
|
|
vinldo9-supply = <&sm2_reg>;
|
|
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
sys_reg: regulator@0 {
|
|
|
|
|
reg = <0>;
|
|
|
|
|
regulator-compatible = "sys";
|
|
|
|
|
regulator-name = "vdd_sys";
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@1 {
|
|
|
|
|
reg = <1>;
|
|
|
|
|
regulator-compatible = "sm0";
|
|
|
|
|
regulator-name = "vdd_sm0,vdd_core";
|
|
|
|
|
regulator-min-microvolt = <1300000>;
|
|
|
|
|
regulator-max-microvolt = <1300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@2 {
|
|
|
|
|
reg = <2>;
|
|
|
|
|
regulator-compatible = "sm1";
|
|
|
|
|
regulator-name = "vdd_sm1,vdd_cpu";
|
|
|
|
|
regulator-min-microvolt = <1125000>;
|
|
|
|
|
regulator-max-microvolt = <1125000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sm2_reg: regulator@3 {
|
|
|
|
|
reg = <3>;
|
|
|
|
|
regulator-compatible = "sm2";
|
|
|
|
|
regulator-name = "vdd_sm2,vin_ldo*";
|
|
|
|
|
regulator-min-microvolt = <3700000>;
|
|
|
|
|
regulator-max-microvolt = <3700000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* LDO0 is not connected to anything */
|
|
|
|
|
|
|
|
|
|
regulator@5 {
|
|
|
|
|
reg = <5>;
|
|
|
|
|
regulator-compatible = "ldo1";
|
|
|
|
|
regulator-name = "vdd_ldo1,avdd_pll*";
|
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@6 {
|
|
|
|
|
reg = <6>;
|
|
|
|
|
regulator-compatible = "ldo2";
|
|
|
|
|
regulator-name = "vdd_ldo2,vdd_rtc";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@7 {
|
|
|
|
|
reg = <7>;
|
|
|
|
|
regulator-compatible = "ldo3";
|
|
|
|
|
regulator-name = "vdd_ldo3,avdd_usb*";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@8 {
|
|
|
|
|
reg = <8>;
|
|
|
|
|
regulator-compatible = "ldo4";
|
|
|
|
|
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@9 {
|
|
|
|
|
reg = <9>;
|
|
|
|
|
regulator-compatible = "ldo5";
|
|
|
|
|
regulator-name = "vdd_ldo5,vcore_mmc";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@10 {
|
|
|
|
|
reg = <10>;
|
|
|
|
|
regulator-compatible = "ldo6";
|
|
|
|
|
regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@11 {
|
|
|
|
|
reg = <11>;
|
|
|
|
|
regulator-compatible = "ldo7";
|
|
|
|
|
regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@12 {
|
|
|
|
|
reg = <12>;
|
|
|
|
|
regulator-compatible = "ldo8";
|
|
|
|
|
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@13 {
|
|
|
|
|
reg = <13>;
|
|
|
|
|
regulator-compatible = "ldo9";
|
|
|
|
|
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@14 {
|
|
|
|
|
reg = <14>;
|
|
|
|
|
regulator-compatible = "ldo_rtc";
|
|
|
|
|
regulator-name = "vdd_rtc_out,vdd_cell";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2011-12-23 00:33:13 +08:00
|
|
|
temperature-sensor@4c {
|
|
|
|
|
compatible = "nct1008";
|
2011-12-18 14:29:32 +08:00
|
|
|
reg = <0x4c>;
|
|
|
|
|
};
|
2011-12-23 00:33:13 +08:00
|
|
|
|
|
|
|
|
magnetometer@c {
|
|
|
|
|
compatible = "ak8975";
|
|
|
|
|
reg = <0xc>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <109 0x04>; /* gpio PN5 */
|
|
|
|
|
};
|
2011-11-22 05:44:09 +08:00
|
|
|
};
|
|
|
|
|
|
2012-06-21 05:58:34 +08:00
|
|
|
pmc {
|
|
|
|
|
nvidia,invert-interrupt;
|
|
|
|
|
};
|
|
|
|
|
|
2012-10-03 03:10:47 +08:00
|
|
|
memory-controller@7000f400 {
|
2012-05-12 07:03:26 +08:00
|
|
|
emc-table@190000 {
|
|
|
|
|
reg = <190000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <190000>;
|
|
|
|
|
nvidia,emc-registers = <0x0000000c 0x00000026
|
|
|
|
|
0x00000009 0x00000003 0x00000004 0x00000004
|
|
|
|
|
0x00000002 0x0000000c 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000001 0x00000004 0x00000005
|
|
|
|
|
0x00000004 0x00000009 0x0000000d 0x0000059f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000003 0x00000001 0x0000000b 0x000000c8
|
|
|
|
|
0x00000003 0x00000007 0x00000004 0x0000000f
|
|
|
|
|
0x00000002 0x00000000 0x00000000 0x00000002
|
|
|
|
|
0x00000000 0x00000000 0x00000083 0xa06204ae
|
|
|
|
|
0x007dc010 0x00000000 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
2011-11-22 05:44:10 +08:00
|
|
|
|
2012-05-12 07:03:26 +08:00
|
|
|
emc-table@380000 {
|
|
|
|
|
reg = <380000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <380000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000017 0x0000004b
|
|
|
|
|
0x00000012 0x00000006 0x00000004 0x00000005
|
|
|
|
|
0x00000003 0x0000000c 0x00000006 0x00000006
|
|
|
|
|
0x00000003 0x00000001 0x00000004 0x00000005
|
|
|
|
|
0x00000004 0x00000009 0x0000000d 0x00000b5f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000006
|
|
|
|
|
0x00000006 0x00000001 0x00000011 0x000000c8
|
|
|
|
|
0x00000003 0x0000000e 0x00000007 0x0000000f
|
|
|
|
|
0x00000002 0x00000000 0x00000000 0x00000002
|
|
|
|
|
0x00000000 0x00000000 0x00000083 0xe044048b
|
|
|
|
|
0x007d8010 0x00000000 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
2011-11-22 05:44:10 +08:00
|
|
|
};
|
|
|
|
|
|
2012-05-12 07:03:26 +08:00
|
|
|
usb@c5000000 {
|
2012-05-12 07:32:56 +08:00
|
|
|
status = "okay";
|
2012-05-12 07:03:26 +08:00
|
|
|
nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
|
|
|
|
|
dr_mode = "otg";
|
2011-07-20 07:26:54 +08:00
|
|
|
};
|
|
|
|
|
|
2012-05-12 07:03:26 +08:00
|
|
|
usb@c5004000 {
|
2012-05-12 07:32:56 +08:00
|
|
|
status = "okay";
|
2012-05-12 07:03:26 +08:00
|
|
|
nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
|
2011-11-22 05:44:10 +08:00
|
|
|
};
|
|
|
|
|
|
2012-05-12 07:32:56 +08:00
|
|
|
usb@c5008000 {
|
|
|
|
|
status = "okay";
|
2011-11-22 05:44:11 +08:00
|
|
|
};
|
|
|
|
|
|
2011-07-20 07:26:54 +08:00
|
|
|
sdhci@c8000400 {
|
2012-05-12 07:32:56 +08:00
|
|
|
status = "okay";
|
2011-09-21 00:46:25 +08:00
|
|
|
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
|
|
|
|
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
|
|
|
|
power-gpios = <&gpio 70 0>; /* gpio PI6 */
|
2012-05-13 12:14:24 +08:00
|
|
|
bus-width = <4>;
|
2011-07-20 07:26:54 +08:00
|
|
|
};
|
2011-09-21 00:46:26 +08:00
|
|
|
|
|
|
|
|
sdhci@c8000600 {
|
2012-05-12 07:32:56 +08:00
|
|
|
status = "okay";
|
2012-05-13 12:14:24 +08:00
|
|
|
bus-width = <8>;
|
2011-09-21 00:46:26 +08:00
|
|
|
};
|
2011-11-04 17:12:39 +08:00
|
|
|
|
2011-12-18 13:18:23 +08:00
|
|
|
gpio-keys {
|
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
|
|
|
|
power {
|
|
|
|
|
label = "Power";
|
|
|
|
|
gpios = <&gpio 170 1>; /* gpio PV2, active low */
|
|
|
|
|
linux,code = <116>; /* KEY_POWER */
|
|
|
|
|
gpio-key,wakeup;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
lid {
|
|
|
|
|
label = "Lid";
|
|
|
|
|
gpios = <&gpio 23 0>; /* gpio PC7 */
|
|
|
|
|
linux,input-type = <5>; /* EV_SW */
|
|
|
|
|
linux,code = <0>; /* SW_LID */
|
|
|
|
|
debounce-interval = <1>;
|
|
|
|
|
gpio-key,wakeup;
|
|
|
|
|
};
|
|
|
|
|
};
|
2011-10-19 02:06:06 +08:00
|
|
|
|
2012-06-21 05:58:34 +08:00
|
|
|
regulators {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
vdd_5v0_reg: regulator@0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <0>;
|
|
|
|
|
regulator-name = "vdd_5v0";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@1 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
regulator-name = "vdd_1v5";
|
|
|
|
|
regulator-min-microvolt = <1500000>;
|
|
|
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
|
gpio = <&pmic 0 0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@2 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <2>;
|
|
|
|
|
regulator-name = "vdd_1v2";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
gpio = <&pmic 1 0>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-12 07:03:26 +08:00
|
|
|
sound {
|
|
|
|
|
compatible = "nvidia,tegra-audio-wm8903-seaboard",
|
|
|
|
|
"nvidia,tegra-audio-wm8903";
|
|
|
|
|
nvidia,model = "NVIDIA Tegra Seaboard";
|
2011-10-19 02:06:06 +08:00
|
|
|
|
2012-05-12 07:03:26 +08:00
|
|
|
nvidia,audio-routing =
|
|
|
|
|
"Headphone Jack", "HPOUTR",
|
|
|
|
|
"Headphone Jack", "HPOUTL",
|
|
|
|
|
"Int Spk", "ROP",
|
|
|
|
|
"Int Spk", "RON",
|
|
|
|
|
"Int Spk", "LOP",
|
|
|
|
|
"Int Spk", "LON",
|
|
|
|
|
"Mic Jack", "MICBIAS",
|
|
|
|
|
"IN1R", "Mic Jack";
|
2012-04-13 05:46:49 +08:00
|
|
|
|
2012-05-12 07:03:26 +08:00
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
|
|
|
nvidia,audio-codec = <&wm8903>;
|
|
|
|
|
|
|
|
|
|
nvidia,spkr-en-gpios = <&wm8903 2 0>;
|
|
|
|
|
nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
|
2012-04-13 05:46:49 +08:00
|
|
|
};
|
2011-07-20 07:26:54 +08:00
|
|
|
};
|
