2019-06-01 16:08:59 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2016-02-09 05:17:53 +08:00
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/*
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* PIC32 RNG driver
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*
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* Joshua Henderson <joshua.henderson@microchip.com>
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* Copyright (C) 2016 Microchip Technology Inc. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define RNGCON 0x04
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2023-07-05 01:32:02 +08:00
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#define TRNGEN BIT(8)
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#define TRNGMOD BIT(11)
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2016-02-09 05:17:53 +08:00
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#define RNGSEED1 0x18
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#define RNGSEED2 0x1C
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#define RNGRCNT 0x20
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2023-07-05 01:32:02 +08:00
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#define RCNT_MASK 0x7F
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2016-02-09 05:17:53 +08:00
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struct pic32_rng {
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void __iomem *base;
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struct hwrng rng;
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};
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/*
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* The TRNG can generate up to 24Mbps. This is a timeout that should be safe
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* enough given the instructions in the loop and that the TRNG may not always
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* be at maximum rate.
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*/
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#define RNG_TIMEOUT 500
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2023-07-05 01:32:03 +08:00
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static int pic32_rng_init(struct hwrng *rng)
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{
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struct pic32_rng *priv = container_of(rng, struct pic32_rng, rng);
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/* enable TRNG in enhanced mode */
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writel(TRNGEN | TRNGMOD, priv->base + RNGCON);
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return 0;
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}
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2016-02-09 05:17:53 +08:00
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static int pic32_rng_read(struct hwrng *rng, void *buf, size_t max,
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bool wait)
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{
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struct pic32_rng *priv = container_of(rng, struct pic32_rng, rng);
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u64 *data = buf;
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u32 t;
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unsigned int timeout = RNG_TIMEOUT;
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do {
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t = readl(priv->base + RNGRCNT) & RCNT_MASK;
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if (t == 64) {
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/* TRNG value comes through the seed registers */
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*data = ((u64)readl(priv->base + RNGSEED2) << 32) +
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readl(priv->base + RNGSEED1);
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return 8;
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}
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} while (wait && --timeout);
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return -EIO;
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}
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2023-07-05 01:32:03 +08:00
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static void pic32_rng_cleanup(struct hwrng *rng)
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{
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struct pic32_rng *priv = container_of(rng, struct pic32_rng, rng);
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writel(0, priv->base + RNGCON);
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}
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2016-02-09 05:17:53 +08:00
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static int pic32_rng_probe(struct platform_device *pdev)
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{
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struct pic32_rng *priv;
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2023-07-05 01:32:01 +08:00
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struct clk *clk;
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2016-02-09 05:17:53 +08:00
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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2019-10-16 18:46:18 +08:00
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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2016-02-09 05:17:53 +08:00
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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2023-07-05 01:32:01 +08:00
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clk = devm_clk_get_enabled(&pdev->dev, NULL);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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2016-02-09 05:17:53 +08:00
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priv->rng.name = pdev->name;
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2023-07-05 01:32:03 +08:00
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priv->rng.init = pic32_rng_init;
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2016-02-09 05:17:53 +08:00
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priv->rng.read = pic32_rng_read;
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2023-07-05 01:32:03 +08:00
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priv->rng.cleanup = pic32_rng_cleanup;
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2016-02-09 05:17:53 +08:00
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2023-07-05 01:32:03 +08:00
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return devm_hwrng_register(&pdev->dev, &priv->rng);
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2016-02-09 05:17:53 +08:00
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}
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2020-06-29 16:04:04 +08:00
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static const struct of_device_id pic32_rng_of_match[] __maybe_unused = {
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2016-02-09 05:17:53 +08:00
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{ .compatible = "microchip,pic32mzda-rng", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, pic32_rng_of_match);
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static struct platform_driver pic32_rng_driver = {
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.probe = pic32_rng_probe,
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.driver = {
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.name = "pic32-rng",
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.of_match_table = of_match_ptr(pic32_rng_of_match),
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},
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};
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module_platform_driver(pic32_rng_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Joshua Henderson <joshua.henderson@microchip.com>");
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MODULE_DESCRIPTION("Microchip PIC32 RNG Driver");
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