2019-05-27 14:55:21 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2015-02-22 20:15:29 +08:00
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Flora Fu, MediaTek
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*/
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#include <linux/interrupt.h>
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2019-08-18 21:56:06 +08:00
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#include <linux/ioport.h>
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2023-07-15 01:47:27 +08:00
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#include <linux/irqdomain.h>
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2015-02-22 20:15:29 +08:00
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#include <linux/module.h>
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2023-07-15 01:47:27 +08:00
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#include <linux/of.h>
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#include <linux/platform_device.h>
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2015-02-22 20:15:29 +08:00
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#include <linux/regmap.h>
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#include <linux/mfd/core.h>
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2016-01-27 19:47:38 +08:00
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#include <linux/mfd/mt6323/core.h>
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2022-06-27 20:39:54 +08:00
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#include <linux/mfd/mt6331/core.h>
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2022-05-31 20:49:56 +08:00
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#include <linux/mfd/mt6357/core.h>
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2020-04-21 11:00:10 +08:00
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#include <linux/mfd/mt6358/core.h>
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2021-05-26 14:52:04 +08:00
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#include <linux/mfd/mt6359/core.h>
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2019-08-05 13:21:49 +08:00
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#include <linux/mfd/mt6397/core.h>
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2016-01-27 19:47:38 +08:00
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#include <linux/mfd/mt6323/registers.h>
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2022-06-27 20:39:54 +08:00
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#include <linux/mfd/mt6331/registers.h>
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2022-05-31 20:49:56 +08:00
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#include <linux/mfd/mt6357/registers.h>
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2020-04-21 11:00:10 +08:00
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#include <linux/mfd/mt6358/registers.h>
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2021-05-26 14:52:04 +08:00
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#include <linux/mfd/mt6359/registers.h>
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2019-08-05 13:21:49 +08:00
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#include <linux/mfd/mt6397/registers.h>
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2015-02-22 20:15:29 +08:00
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2019-08-18 21:56:08 +08:00
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#define MT6323_RTC_BASE 0x8000
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#define MT6323_RTC_SIZE 0x40
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2022-05-31 20:49:56 +08:00
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#define MT6357_RTC_BASE 0x0588
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#define MT6357_RTC_SIZE 0x3c
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2022-06-27 20:39:54 +08:00
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#define MT6331_RTC_BASE 0x4000
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#define MT6331_RTC_SIZE 0x40
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2020-04-21 11:00:10 +08:00
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#define MT6358_RTC_BASE 0x0588
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#define MT6358_RTC_SIZE 0x3c
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2015-05-06 15:23:40 +08:00
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#define MT6397_RTC_BASE 0xe000
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#define MT6397_RTC_SIZE 0x3e
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2019-08-18 21:56:08 +08:00
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#define MT6323_PWRC_BASE 0x8000
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#define MT6323_PWRC_SIZE 0x40
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static const struct resource mt6323_rtc_resources[] = {
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DEFINE_RES_MEM(MT6323_RTC_BASE, MT6323_RTC_SIZE),
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DEFINE_RES_IRQ(MT6323_IRQ_STATUS_RTC),
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};
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2022-05-31 20:49:56 +08:00
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static const struct resource mt6357_rtc_resources[] = {
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DEFINE_RES_MEM(MT6357_RTC_BASE, MT6357_RTC_SIZE),
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DEFINE_RES_IRQ(MT6357_IRQ_RTC),
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};
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2022-06-27 20:39:54 +08:00
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static const struct resource mt6331_rtc_resources[] = {
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DEFINE_RES_MEM(MT6331_RTC_BASE, MT6331_RTC_SIZE),
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DEFINE_RES_IRQ(MT6331_IRQ_STATUS_RTC),
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};
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2020-04-21 11:00:10 +08:00
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static const struct resource mt6358_rtc_resources[] = {
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DEFINE_RES_MEM(MT6358_RTC_BASE, MT6358_RTC_SIZE),
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DEFINE_RES_IRQ(MT6358_IRQ_RTC),
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};
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2015-05-06 15:23:40 +08:00
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static const struct resource mt6397_rtc_resources[] = {
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2019-08-18 21:56:06 +08:00
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DEFINE_RES_MEM(MT6397_RTC_BASE, MT6397_RTC_SIZE),
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DEFINE_RES_IRQ(MT6397_IRQ_RTC),
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2015-05-06 15:23:40 +08:00
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};
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2021-05-06 17:41:15 +08:00
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static const struct resource mt6358_keys_resources[] = {
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DEFINE_RES_IRQ_NAMED(MT6358_IRQ_PWRKEY, "powerkey"),
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DEFINE_RES_IRQ_NAMED(MT6358_IRQ_HOMEKEY, "homekey"),
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DEFINE_RES_IRQ_NAMED(MT6358_IRQ_PWRKEY_R, "powerkey_r"),
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DEFINE_RES_IRQ_NAMED(MT6358_IRQ_HOMEKEY_R, "homekey_r"),
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};
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2022-04-15 23:36:25 +08:00
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static const struct resource mt6359_keys_resources[] = {
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DEFINE_RES_IRQ_NAMED(MT6359_IRQ_PWRKEY, "powerkey"),
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DEFINE_RES_IRQ_NAMED(MT6359_IRQ_HOMEKEY, "homekey"),
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DEFINE_RES_IRQ_NAMED(MT6359_IRQ_PWRKEY_R, "powerkey_r"),
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DEFINE_RES_IRQ_NAMED(MT6359_IRQ_HOMEKEY_R, "homekey_r"),
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};
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2017-10-25 21:16:04 +08:00
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static const struct resource mt6323_keys_resources[] = {
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2021-05-06 17:41:14 +08:00
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DEFINE_RES_IRQ_NAMED(MT6323_IRQ_STATUS_PWRKEY, "powerkey"),
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DEFINE_RES_IRQ_NAMED(MT6323_IRQ_STATUS_FCHRKEY, "homekey"),
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2017-10-25 21:16:04 +08:00
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};
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2022-05-31 20:49:56 +08:00
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static const struct resource mt6357_keys_resources[] = {
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DEFINE_RES_IRQ_NAMED(MT6357_IRQ_PWRKEY, "powerkey"),
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DEFINE_RES_IRQ_NAMED(MT6357_IRQ_HOMEKEY, "homekey"),
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DEFINE_RES_IRQ_NAMED(MT6357_IRQ_PWRKEY_R, "powerkey_r"),
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DEFINE_RES_IRQ_NAMED(MT6357_IRQ_HOMEKEY_R, "homekey_r"),
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};
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2022-06-27 20:39:54 +08:00
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static const struct resource mt6331_keys_resources[] = {
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DEFINE_RES_IRQ_NAMED(MT6331_IRQ_STATUS_PWRKEY, "powerkey"),
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DEFINE_RES_IRQ_NAMED(MT6331_IRQ_STATUS_HOMEKEY, "homekey"),
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};
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2017-10-25 21:16:04 +08:00
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static const struct resource mt6397_keys_resources[] = {
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2021-05-06 17:41:14 +08:00
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DEFINE_RES_IRQ_NAMED(MT6397_IRQ_PWRKEY, "powerkey"),
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DEFINE_RES_IRQ_NAMED(MT6397_IRQ_HOMEKEY, "homekey"),
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2017-10-25 21:16:04 +08:00
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};
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2019-08-18 21:56:08 +08:00
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static const struct resource mt6323_pwrc_resources[] = {
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DEFINE_RES_MEM(MT6323_PWRC_BASE, MT6323_PWRC_SIZE),
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};
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2016-01-27 19:47:38 +08:00
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static const struct mfd_cell mt6323_devs[] = {
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{
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2019-08-18 21:56:08 +08:00
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.name = "mt6323-rtc",
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.num_resources = ARRAY_SIZE(mt6323_rtc_resources),
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.resources = mt6323_rtc_resources,
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.of_compatible = "mediatek,mt6323-rtc",
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}, {
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2016-01-27 19:47:38 +08:00
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.name = "mt6323-regulator",
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.of_compatible = "mediatek,mt6323-regulator"
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2017-03-20 14:47:27 +08:00
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}, {
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2017-01-23 11:54:45 +08:00
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.name = "mt6323-led",
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.of_compatible = "mediatek,mt6323-led"
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2017-10-25 21:16:04 +08:00
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}, {
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.name = "mtk-pmic-keys",
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.num_resources = ARRAY_SIZE(mt6323_keys_resources),
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.resources = mt6323_keys_resources,
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.of_compatible = "mediatek,mt6323-keys"
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2019-08-18 21:56:08 +08:00
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}, {
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.name = "mt6323-pwrc",
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.num_resources = ARRAY_SIZE(mt6323_pwrc_resources),
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.resources = mt6323_pwrc_resources,
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.of_compatible = "mediatek,mt6323-pwrc"
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2017-01-23 11:54:45 +08:00
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},
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2016-01-27 19:47:38 +08:00
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};
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2022-05-31 20:49:56 +08:00
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static const struct mfd_cell mt6357_devs[] = {
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{
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.name = "mt6357-regulator",
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}, {
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.name = "mt6357-rtc",
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.num_resources = ARRAY_SIZE(mt6357_rtc_resources),
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.resources = mt6357_rtc_resources,
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.of_compatible = "mediatek,mt6357-rtc",
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2024-02-26 22:01:51 +08:00
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}, {
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.name = "mt6357-sound",
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.of_compatible = "mediatek,mt6357-sound"
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2022-05-31 20:49:56 +08:00
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}, {
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.name = "mtk-pmic-keys",
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.num_resources = ARRAY_SIZE(mt6357_keys_resources),
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.resources = mt6357_keys_resources,
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.of_compatible = "mediatek,mt6357-keys"
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},
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};
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2022-06-27 20:39:54 +08:00
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/* MT6331 is always used in combination with MT6332 */
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static const struct mfd_cell mt6331_mt6332_devs[] = {
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{
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.name = "mt6331-rtc",
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.num_resources = ARRAY_SIZE(mt6331_rtc_resources),
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.resources = mt6331_rtc_resources,
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.of_compatible = "mediatek,mt6331-rtc",
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}, {
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.name = "mt6331-regulator",
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.of_compatible = "mediatek,mt6331-regulator"
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}, {
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.name = "mt6332-regulator",
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.of_compatible = "mediatek,mt6332-regulator"
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}, {
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.name = "mtk-pmic-keys",
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.num_resources = ARRAY_SIZE(mt6331_keys_resources),
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.resources = mt6331_keys_resources,
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.of_compatible = "mediatek,mt6331-keys"
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},
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};
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2020-04-21 11:00:10 +08:00
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static const struct mfd_cell mt6358_devs[] = {
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{
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.name = "mt6358-regulator",
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.of_compatible = "mediatek,mt6358-regulator"
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}, {
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.name = "mt6358-rtc",
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.num_resources = ARRAY_SIZE(mt6358_rtc_resources),
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.resources = mt6358_rtc_resources,
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.of_compatible = "mediatek,mt6358-rtc",
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}, {
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.name = "mt6358-sound",
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.of_compatible = "mediatek,mt6358-sound"
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2021-05-06 17:41:15 +08:00
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}, {
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.name = "mt6358-keys",
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.num_resources = ARRAY_SIZE(mt6358_keys_resources),
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.resources = mt6358_keys_resources,
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.of_compatible = "mediatek,mt6358-keys"
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2020-04-21 11:00:10 +08:00
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},
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};
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2021-05-26 14:52:04 +08:00
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static const struct mfd_cell mt6359_devs[] = {
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{ .name = "mt6359-regulator", },
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{
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.name = "mt6359-rtc",
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.num_resources = ARRAY_SIZE(mt6358_rtc_resources),
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.resources = mt6358_rtc_resources,
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.of_compatible = "mediatek,mt6358-rtc",
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},
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{ .name = "mt6359-sound", },
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2022-04-15 23:36:25 +08:00
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{
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.name = "mtk-pmic-keys",
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.num_resources = ARRAY_SIZE(mt6359_keys_resources),
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.resources = mt6359_keys_resources,
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.of_compatible = "mediatek,mt6359-keys"
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},
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2021-05-26 14:52:04 +08:00
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};
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2015-02-22 20:15:29 +08:00
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static const struct mfd_cell mt6397_devs[] = {
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{
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.name = "mt6397-rtc",
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2015-05-06 15:23:40 +08:00
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.num_resources = ARRAY_SIZE(mt6397_rtc_resources),
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.resources = mt6397_rtc_resources,
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2015-02-22 20:15:29 +08:00
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.of_compatible = "mediatek,mt6397-rtc",
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}, {
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.name = "mt6397-regulator",
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.of_compatible = "mediatek,mt6397-regulator",
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}, {
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.name = "mt6397-codec",
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.of_compatible = "mediatek,mt6397-codec",
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}, {
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.name = "mt6397-clk",
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.of_compatible = "mediatek,mt6397-clk",
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2015-05-27 17:10:35 +08:00
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}, {
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.name = "mt6397-pinctrl",
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.of_compatible = "mediatek,mt6397-pinctrl",
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2017-10-25 21:16:04 +08:00
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}, {
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.name = "mtk-pmic-keys",
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.num_resources = ARRAY_SIZE(mt6397_keys_resources),
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.resources = mt6397_keys_resources,
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.of_compatible = "mediatek,mt6397-keys"
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}
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2015-02-22 20:15:29 +08:00
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};
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2019-10-04 02:53:23 +08:00
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struct chip_data {
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u32 cid_addr;
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u32 cid_shift;
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2020-04-21 11:00:08 +08:00
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const struct mfd_cell *cells;
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int cell_size;
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int (*irq_init)(struct mt6397_chip *chip);
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2019-10-04 02:53:23 +08:00
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};
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static const struct chip_data mt6323_core = {
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.cid_addr = MT6323_CID,
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.cid_shift = 0,
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2020-04-21 11:00:08 +08:00
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.cells = mt6323_devs,
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.cell_size = ARRAY_SIZE(mt6323_devs),
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.irq_init = mt6397_irq_init,
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2019-10-04 02:53:23 +08:00
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};
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2022-05-31 20:49:56 +08:00
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static const struct chip_data mt6357_core = {
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.cid_addr = MT6357_SWCID,
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.cid_shift = 8,
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.cells = mt6357_devs,
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.cell_size = ARRAY_SIZE(mt6357_devs),
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.irq_init = mt6358_irq_init,
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};
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2022-06-27 20:39:54 +08:00
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static const struct chip_data mt6331_mt6332_core = {
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.cid_addr = MT6331_HWCID,
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.cid_shift = 0,
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.cells = mt6331_mt6332_devs,
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.cell_size = ARRAY_SIZE(mt6331_mt6332_devs),
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.irq_init = mt6397_irq_init,
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};
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2020-04-21 11:00:10 +08:00
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static const struct chip_data mt6358_core = {
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.cid_addr = MT6358_SWCID,
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.cid_shift = 8,
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.cells = mt6358_devs,
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.cell_size = ARRAY_SIZE(mt6358_devs),
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.irq_init = mt6358_irq_init,
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};
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2021-05-26 14:52:04 +08:00
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static const struct chip_data mt6359_core = {
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.cid_addr = MT6359_SWCID,
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.cid_shift = 8,
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.cells = mt6359_devs,
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.cell_size = ARRAY_SIZE(mt6359_devs),
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.irq_init = mt6358_irq_init,
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};
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2019-10-04 02:53:23 +08:00
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static const struct chip_data mt6397_core = {
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.cid_addr = MT6397_CID,
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.cid_shift = 0,
|
2020-04-21 11:00:08 +08:00
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.cells = mt6397_devs,
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.cell_size = ARRAY_SIZE(mt6397_devs),
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.irq_init = mt6397_irq_init,
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2019-10-04 02:53:23 +08:00
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};
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2015-02-22 20:15:29 +08:00
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static int mt6397_probe(struct platform_device *pdev)
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{
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int ret;
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2020-04-21 11:00:08 +08:00
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unsigned int id = 0;
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2016-01-27 19:47:37 +08:00
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struct mt6397_chip *pmic;
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2019-10-04 02:53:23 +08:00
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const struct chip_data *pmic_core;
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2015-02-22 20:15:29 +08:00
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|
2016-01-27 19:47:37 +08:00
|
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pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
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|
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if (!pmic)
|
2015-02-22 20:15:29 +08:00
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|
return -ENOMEM;
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|
2016-01-27 19:47:37 +08:00
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pmic->dev = &pdev->dev;
|
2016-01-27 19:47:36 +08:00
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|
2015-02-22 20:15:29 +08:00
|
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|
/*
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* mt6397 MFD is child device of soc pmic wrapper.
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* Regmap is set from its parent.
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*/
|
2016-01-27 19:47:37 +08:00
|
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pmic->regmap = dev_get_regmap(pdev->dev.parent, NULL);
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|
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if (!pmic->regmap)
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2015-02-22 20:15:29 +08:00
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|
|
return -ENODEV;
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|
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|
2019-10-04 02:53:23 +08:00
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|
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pmic_core = of_device_get_match_data(&pdev->dev);
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|
|
if (!pmic_core)
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return -ENODEV;
|
2016-01-27 19:47:37 +08:00
|
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|
|
2019-10-04 02:53:23 +08:00
|
|
|
ret = regmap_read(pmic->regmap, pmic_core->cid_addr, &id);
|
2016-01-27 19:47:37 +08:00
|
|
|
if (ret) {
|
2019-10-04 02:53:23 +08:00
|
|
|
dev_err(&pdev->dev, "Failed to read chip id: %d\n", ret);
|
2016-04-15 16:30:29 +08:00
|
|
|
return ret;
|
2016-01-27 19:47:37 +08:00
|
|
|
}
|
|
|
|
|
2019-10-04 02:53:23 +08:00
|
|
|
pmic->chip_id = (id >> pmic_core->cid_shift) & 0xff;
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, pmic);
|
|
|
|
|
2016-04-15 16:30:29 +08:00
|
|
|
pmic->irq = platform_get_irq(pdev, 0);
|
|
|
|
if (pmic->irq <= 0)
|
|
|
|
return pmic->irq;
|
|
|
|
|
2020-04-21 11:00:08 +08:00
|
|
|
ret = pmic_core->irq_init(pmic);
|
2019-10-04 02:53:23 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
2016-04-15 16:30:29 +08:00
|
|
|
|
2020-04-21 11:00:08 +08:00
|
|
|
ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
|
|
|
|
pmic_core->cells, pmic_core->cell_size,
|
|
|
|
NULL, 0, pmic->irq_domain);
|
2016-01-27 19:47:37 +08:00
|
|
|
if (ret) {
|
|
|
|
irq_domain_remove(pmic->irq_domain);
|
2015-02-22 20:15:29 +08:00
|
|
|
dev_err(&pdev->dev, "failed to add child devices: %d\n", ret);
|
2016-01-27 19:47:37 +08:00
|
|
|
}
|
2015-02-22 20:15:29 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id mt6397_of_match[] = {
|
2019-10-04 02:53:23 +08:00
|
|
|
{
|
|
|
|
.compatible = "mediatek,mt6323",
|
|
|
|
.data = &mt6323_core,
|
2022-06-27 20:39:54 +08:00
|
|
|
}, {
|
|
|
|
.compatible = "mediatek,mt6331",
|
|
|
|
.data = &mt6331_mt6332_core,
|
2022-05-31 20:49:56 +08:00
|
|
|
}, {
|
|
|
|
.compatible = "mediatek,mt6357",
|
|
|
|
.data = &mt6357_core,
|
2020-04-21 11:00:10 +08:00
|
|
|
}, {
|
|
|
|
.compatible = "mediatek,mt6358",
|
|
|
|
.data = &mt6358_core,
|
2021-05-26 14:52:04 +08:00
|
|
|
}, {
|
|
|
|
.compatible = "mediatek,mt6359",
|
|
|
|
.data = &mt6359_core,
|
2019-10-04 02:53:23 +08:00
|
|
|
}, {
|
|
|
|
.compatible = "mediatek,mt6397",
|
|
|
|
.data = &mt6397_core,
|
|
|
|
}, {
|
|
|
|
/* sentinel */
|
|
|
|
}
|
2015-02-22 20:15:29 +08:00
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, mt6397_of_match);
|
|
|
|
|
2016-02-11 00:50:18 +08:00
|
|
|
static const struct platform_device_id mt6397_id[] = {
|
|
|
|
{ "mt6397", 0 },
|
|
|
|
{ },
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(platform, mt6397_id);
|
|
|
|
|
2015-02-22 20:15:29 +08:00
|
|
|
static struct platform_driver mt6397_driver = {
|
|
|
|
.probe = mt6397_probe,
|
|
|
|
.driver = {
|
|
|
|
.name = "mt6397",
|
2020-11-21 00:21:27 +08:00
|
|
|
.of_match_table = mt6397_of_match,
|
2015-02-22 20:15:29 +08:00
|
|
|
},
|
2016-02-11 00:50:18 +08:00
|
|
|
.id_table = mt6397_id,
|
2015-02-22 20:15:29 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
module_platform_driver(mt6397_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Flora Fu, MediaTek");
|
|
|
|
MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC");
|
|
|
|
MODULE_LICENSE("GPL");
|