2015-04-21 04:55:21 +08:00
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Christian König <christian.koenig@amd.com>
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*/
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#include <drm/drmP.h>
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#include "amdgpu.h"
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#include "amdgpu_trace.h"
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2015-08-20 14:47:40 +08:00
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struct amdgpu_sync_entry {
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struct hlist_node node;
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struct fence *fence;
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};
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2015-04-21 04:55:21 +08:00
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/**
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* amdgpu_sync_create - zero init sync object
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*
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* @sync: sync object to initialize
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*
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* Just clear the sync object for now.
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*/
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void amdgpu_sync_create(struct amdgpu_sync *sync)
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{
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unsigned i;
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for (i = 0; i < AMDGPU_NUM_SYNCS; ++i)
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sync->semaphores[i] = NULL;
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
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sync->sync_to[i] = NULL;
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2015-08-20 14:47:40 +08:00
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hash_init(sync->fences);
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2015-04-21 04:55:21 +08:00
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sync->last_vm_update = NULL;
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}
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2015-08-20 18:33:59 +08:00
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static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f)
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{
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struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
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struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
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if (a_fence)
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return a_fence->ring->adev == adev;
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2015-09-09 02:22:31 +08:00
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if (s_fence) {
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struct amdgpu_ring *ring;
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ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
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return ring->adev == adev;
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}
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2015-08-20 18:33:59 +08:00
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return false;
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}
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static bool amdgpu_sync_test_owner(struct fence *f, void *owner)
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{
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struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
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struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
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if (s_fence)
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return s_fence->owner == owner;
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if (a_fence)
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return a_fence->owner == owner;
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return false;
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}
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2015-10-22 16:53:16 +08:00
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static void amdgpu_sync_keep_later(struct fence **keep, struct fence *fence)
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{
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if (*keep && fence_is_later(*keep, fence))
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return;
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fence_put(*keep);
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*keep = fence_get(fence);
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}
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2015-04-21 04:55:21 +08:00
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/**
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2015-07-07 04:06:40 +08:00
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* amdgpu_sync_fence - remember to sync to this fence
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2015-04-21 04:55:21 +08:00
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*
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* @sync: sync object to add fence to
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* @fence: fence to sync to
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*
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*/
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2015-07-07 04:06:40 +08:00
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int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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struct fence *f)
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2015-04-21 04:55:21 +08:00
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{
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2015-08-20 14:47:40 +08:00
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struct amdgpu_sync_entry *e;
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2015-07-07 04:06:40 +08:00
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struct amdgpu_fence *fence;
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2015-04-21 04:55:21 +08:00
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2015-07-07 04:06:40 +08:00
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if (!f)
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return 0;
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2015-08-20 18:33:59 +08:00
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if (amdgpu_sync_same_dev(adev, f) &&
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2015-10-22 16:53:16 +08:00
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amdgpu_sync_test_owner(f, AMDGPU_FENCE_OWNER_VM))
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amdgpu_sync_keep_later(&sync->last_vm_update, f);
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2015-08-20 18:33:59 +08:00
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2015-07-07 04:06:40 +08:00
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fence = to_amdgpu_fence(f);
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2015-08-20 14:47:40 +08:00
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if (!fence || fence->ring->adev != adev) {
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hash_for_each_possible(sync->fences, e, node, f->context) {
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if (unlikely(e->fence->context != f->context))
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continue;
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2015-10-22 16:53:16 +08:00
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amdgpu_sync_keep_later(&e->fence, f);
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2015-08-20 14:47:40 +08:00
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return 0;
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}
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e = kmalloc(sizeof(struct amdgpu_sync_entry), GFP_KERNEL);
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if (!e)
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return -ENOMEM;
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hash_add(sync->fences, &e->node, f->context);
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e->fence = fence_get(f);
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return 0;
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}
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2015-04-21 04:55:21 +08:00
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2015-10-22 21:04:50 +08:00
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amdgpu_sync_keep_later(&sync->sync_to[fence->ring->idx], f);
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2015-04-21 04:55:21 +08:00
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2015-07-07 04:06:40 +08:00
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return 0;
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2015-04-21 04:55:21 +08:00
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}
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2015-08-24 16:59:54 +08:00
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static void *amdgpu_sync_get_owner(struct fence *f)
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{
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struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
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struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
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if (s_fence)
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return s_fence->owner;
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else if (a_fence)
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return a_fence->owner;
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return AMDGPU_FENCE_OWNER_UNDEFINED;
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}
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2015-04-21 04:55:21 +08:00
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/**
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* amdgpu_sync_resv - use the semaphores to sync to a reservation object
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*
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* @sync: sync object to add fences from reservation object to
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* @resv: reservation object with embedded fence
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* @shared: true if we should only sync to the exclusive fence
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*
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* Sync to the fence using the semaphore objects
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*/
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int amdgpu_sync_resv(struct amdgpu_device *adev,
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struct amdgpu_sync *sync,
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struct reservation_object *resv,
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void *owner)
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{
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struct reservation_object_list *flist;
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struct fence *f;
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2015-08-24 16:59:54 +08:00
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void *fence_owner;
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2015-04-21 04:55:21 +08:00
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unsigned i;
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int r = 0;
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2015-05-12 23:17:19 +08:00
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if (resv == NULL)
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return -EINVAL;
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2015-04-21 04:55:21 +08:00
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/* always sync to the exclusive fence */
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f = reservation_object_get_excl(resv);
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2015-07-07 04:06:40 +08:00
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r = amdgpu_sync_fence(adev, sync, f);
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2015-04-21 04:55:21 +08:00
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flist = reservation_object_get_list(resv);
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if (!flist || r)
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return r;
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for (i = 0; i < flist->shared_count; ++i) {
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f = rcu_dereference_protected(flist->shared[i],
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reservation_object_held(resv));
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2015-08-24 16:59:54 +08:00
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if (amdgpu_sync_same_dev(adev, f)) {
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2015-07-27 21:40:35 +08:00
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/* VM updates are only interesting
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* for other VM updates and moves.
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*/
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2015-08-24 16:59:54 +08:00
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fence_owner = amdgpu_sync_get_owner(f);
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2015-07-27 21:40:35 +08:00
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if ((owner != AMDGPU_FENCE_OWNER_MOVE) &&
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2015-08-24 16:59:54 +08:00
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(fence_owner != AMDGPU_FENCE_OWNER_MOVE) &&
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2015-07-27 21:40:35 +08:00
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((owner == AMDGPU_FENCE_OWNER_VM) !=
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2015-08-24 16:59:54 +08:00
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(fence_owner == AMDGPU_FENCE_OWNER_VM)))
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2015-07-07 04:06:40 +08:00
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continue;
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2015-07-27 21:40:35 +08:00
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/* Ignore fence from the same owner as
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* long as it isn't undefined.
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*/
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if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
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2015-08-24 16:59:54 +08:00
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fence_owner == owner)
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2015-07-27 21:40:35 +08:00
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continue;
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}
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2015-07-07 04:06:40 +08:00
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r = amdgpu_sync_fence(adev, sync, f);
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if (r)
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break;
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2015-04-21 04:55:21 +08:00
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}
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return r;
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}
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2015-08-25 17:05:36 +08:00
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struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
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{
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struct amdgpu_sync_entry *e;
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struct hlist_node *tmp;
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struct fence *f;
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int i;
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hash_for_each_safe(sync->fences, i, tmp, e, node) {
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f = e->fence;
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hash_del(&e->node);
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kfree(e);
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if (!fence_is_signaled(f))
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return f;
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fence_put(f);
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}
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return NULL;
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}
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2015-08-20 14:47:40 +08:00
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int amdgpu_sync_wait(struct amdgpu_sync *sync)
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{
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struct amdgpu_sync_entry *e;
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struct hlist_node *tmp;
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int i, r;
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hash_for_each_safe(sync->fences, i, tmp, e, node) {
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r = fence_wait(e->fence, false);
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if (r)
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return r;
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hash_del(&e->node);
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fence_put(e->fence);
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kfree(e);
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}
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2015-09-05 17:12:27 +08:00
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if (amdgpu_enable_semaphores)
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return 0;
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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2015-10-22 21:04:50 +08:00
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struct fence *fence = sync->sync_to[i];
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2015-09-05 17:12:27 +08:00
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if (!fence)
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continue;
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2015-10-22 21:04:50 +08:00
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r = fence_wait(fence, false);
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2015-09-05 17:12:27 +08:00
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if (r)
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return r;
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}
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2015-08-20 14:47:40 +08:00
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return 0;
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}
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2015-04-21 04:55:21 +08:00
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/**
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* amdgpu_sync_rings - sync ring to all registered fences
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*
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* @sync: sync object to use
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* @ring: ring that needs sync
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*
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* Ensure that all registered fences are signaled before letting
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* the ring continue. The caller must hold the ring lock.
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*/
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int amdgpu_sync_rings(struct amdgpu_sync *sync,
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struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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unsigned count = 0;
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int i, r;
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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struct amdgpu_ring *other = adev->rings[i];
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2015-10-22 21:04:50 +08:00
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struct amdgpu_semaphore *semaphore;
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struct amdgpu_fence *fence;
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if (!sync->sync_to[i])
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continue;
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fence = to_amdgpu_fence(sync->sync_to[i]);
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2015-04-21 04:55:21 +08:00
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/* check if we really need to sync */
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if (!amdgpu_fence_need_sync(fence, ring))
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continue;
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/* prevent GPU deadlocks */
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if (!other->ready) {
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dev_err(adev->dev, "Syncing to a disabled ring!");
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return -EINVAL;
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}
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2015-09-05 17:12:27 +08:00
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if (amdgpu_enable_scheduler || !amdgpu_enable_semaphores ||
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(count >= AMDGPU_NUM_SYNCS)) {
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2015-04-21 04:55:21 +08:00
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/* not enough room, wait manually */
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2015-08-07 19:53:36 +08:00
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r = fence_wait(&fence->base, false);
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2015-04-21 04:55:21 +08:00
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if (r)
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return r;
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continue;
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}
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r = amdgpu_semaphore_create(adev, &semaphore);
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if (r)
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return r;
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sync->semaphores[count++] = semaphore;
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/* allocate enough space for sync command */
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r = amdgpu_ring_alloc(other, 16);
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if (r)
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return r;
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/* emit the signal semaphore */
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if (!amdgpu_semaphore_emit_signal(other, semaphore)) {
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/* signaling wasn't successful wait manually */
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amdgpu_ring_undo(other);
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2015-08-07 19:53:36 +08:00
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r = fence_wait(&fence->base, false);
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2015-04-21 04:55:21 +08:00
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if (r)
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return r;
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continue;
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}
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/* we assume caller has already allocated space on waiters ring */
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if (!amdgpu_semaphore_emit_wait(ring, semaphore)) {
|
|
|
|
/* waiting wasn't successful wait manually */
|
|
|
|
amdgpu_ring_undo(other);
|
2015-08-07 19:53:36 +08:00
|
|
|
r = fence_wait(&fence->base, false);
|
2015-04-21 04:55:21 +08:00
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
amdgpu_ring_commit(other);
|
|
|
|
amdgpu_fence_note_sync(fence, ring);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* amdgpu_sync_free - free the sync object
|
|
|
|
*
|
|
|
|
* @adev: amdgpu_device pointer
|
|
|
|
* @sync: sync object to use
|
|
|
|
* @fence: fence to use for the free
|
|
|
|
*
|
|
|
|
* Free the sync object by freeing all semaphores in it.
|
|
|
|
*/
|
|
|
|
void amdgpu_sync_free(struct amdgpu_device *adev,
|
|
|
|
struct amdgpu_sync *sync,
|
2015-08-19 16:41:19 +08:00
|
|
|
struct fence *fence)
|
2015-04-21 04:55:21 +08:00
|
|
|
{
|
2015-08-20 14:47:40 +08:00
|
|
|
struct amdgpu_sync_entry *e;
|
|
|
|
struct hlist_node *tmp;
|
2015-04-21 04:55:21 +08:00
|
|
|
unsigned i;
|
|
|
|
|
2015-08-20 14:47:40 +08:00
|
|
|
hash_for_each_safe(sync->fences, i, tmp, e, node) {
|
|
|
|
hash_del(&e->node);
|
|
|
|
fence_put(e->fence);
|
|
|
|
kfree(e);
|
|
|
|
}
|
|
|
|
|
2015-04-21 04:55:21 +08:00
|
|
|
for (i = 0; i < AMDGPU_NUM_SYNCS; ++i)
|
|
|
|
amdgpu_semaphore_free(adev, &sync->semaphores[i], fence);
|
|
|
|
|
|
|
|
for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
|
2015-10-22 21:04:50 +08:00
|
|
|
fence_put(sync->sync_to[i]);
|
2015-04-21 04:55:21 +08:00
|
|
|
|
2015-08-20 18:33:59 +08:00
|
|
|
fence_put(sync->last_vm_update);
|
2015-04-21 04:55:21 +08:00
|
|
|
}
|