2009-12-11 17:24:15 +08:00
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/*
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* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
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* All Rights Reserved.
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* Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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2016-05-20 07:22:55 +08:00
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#include "nouveau_drv.h"
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2012-07-20 06:17:34 +08:00
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#include "nouveau_gem.h"
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2017-11-01 01:56:19 +08:00
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#include "nouveau_mem.h"
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#include "nouveau_ttm.h"
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2009-12-11 17:24:15 +08:00
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2017-04-24 12:50:29 +08:00
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#include <drm/drm_legacy.h>
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2015-09-04 18:59:34 +08:00
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#include <core/tegra.h>
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2012-07-19 15:54:21 +08:00
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static int
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2017-11-01 01:56:19 +08:00
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nouveau_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
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2012-07-19 15:54:21 +08:00
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{
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return 0;
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}
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static int
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2017-11-01 01:56:19 +08:00
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nouveau_manager_fini(struct ttm_mem_type_manager *man)
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2012-07-19 15:54:21 +08:00
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{
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return 0;
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}
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2017-11-01 01:56:19 +08:00
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static void
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2017-11-01 01:56:19 +08:00
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nouveau_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *reg)
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2017-11-01 01:56:19 +08:00
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{
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2017-11-01 01:56:19 +08:00
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nouveau_mem_del(reg);
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2017-11-01 01:56:19 +08:00
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}
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2017-11-01 01:56:19 +08:00
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static void
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nouveau_manager_debug(struct ttm_mem_type_manager *man,
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struct drm_printer *printer)
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2012-07-19 15:54:21 +08:00
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{
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}
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static int
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nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
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struct ttm_buffer_object *bo,
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2014-08-27 19:16:04 +08:00
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const struct ttm_place *place,
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2016-05-17 09:13:37 +08:00
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struct ttm_mem_reg *reg)
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2012-07-19 15:54:21 +08:00
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{
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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2017-11-01 01:56:19 +08:00
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struct nouveau_drm *drm = nvbo->cli->drm;
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struct nouveau_mem *mem;
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2012-07-19 15:54:21 +08:00
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int ret;
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2016-05-18 11:57:42 +08:00
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if (drm->client.device.info.ram_size == 0)
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2015-02-20 17:22:59 +08:00
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return -ENOMEM;
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2017-11-01 01:56:19 +08:00
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ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
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mem = nouveau_mem(reg);
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if (ret)
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return ret;
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2012-07-19 15:54:21 +08:00
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2017-11-01 01:56:19 +08:00
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ret = nouveau_mem_vram(reg, nvbo->contig, nvbo->page);
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2012-07-19 15:54:21 +08:00
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if (ret) {
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2017-11-01 01:56:19 +08:00
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nouveau_mem_del(reg);
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if (ret == -ENOSPC) {
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reg->mm_node = NULL;
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return 0;
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}
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return ret;
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2012-07-19 15:54:21 +08:00
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}
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return 0;
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}
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const struct ttm_mem_type_manager_func nouveau_vram_manager = {
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2017-11-01 01:56:19 +08:00
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.init = nouveau_manager_init,
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.takedown = nouveau_manager_fini,
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2016-12-17 09:04:42 +08:00
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.get_node = nouveau_vram_manager_new,
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2017-11-01 01:56:20 +08:00
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.put_node = nouveau_manager_del,
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2017-11-01 01:56:19 +08:00
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.debug = nouveau_manager_debug,
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2012-07-19 15:54:21 +08:00
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};
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static int
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nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
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struct ttm_buffer_object *bo,
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2014-08-27 19:16:04 +08:00
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const struct ttm_place *place,
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2016-05-17 09:13:37 +08:00
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struct ttm_mem_reg *reg)
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2012-07-19 15:54:21 +08:00
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{
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2013-03-22 10:12:17 +08:00
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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2017-11-01 01:56:19 +08:00
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struct nouveau_drm *drm = nvbo->cli->drm;
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struct nouveau_mem *mem;
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int ret;
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2012-07-19 15:54:21 +08:00
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2017-11-01 01:56:19 +08:00
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ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
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mem = nouveau_mem(reg);
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if (ret)
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return ret;
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2013-03-22 10:12:17 +08:00
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2017-11-01 01:56:19 +08:00
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reg->start = 0;
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2012-07-19 15:54:21 +08:00
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return 0;
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}
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const struct ttm_mem_type_manager_func nouveau_gart_manager = {
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2017-11-01 01:56:19 +08:00
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.init = nouveau_manager_init,
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.takedown = nouveau_manager_fini,
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2016-12-17 09:04:42 +08:00
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.get_node = nouveau_gart_manager_new,
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2017-11-01 01:56:19 +08:00
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.put_node = nouveau_manager_del,
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2017-11-01 01:56:19 +08:00
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.debug = nouveau_manager_debug
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2012-07-19 15:54:21 +08:00
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};
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static int
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nv04_gart_manager_new(struct ttm_mem_type_manager *man,
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struct ttm_buffer_object *bo,
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2014-08-27 19:16:04 +08:00
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const struct ttm_place *place,
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2016-05-17 09:13:37 +08:00
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struct ttm_mem_reg *reg)
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2012-07-19 15:54:21 +08:00
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{
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2017-11-01 01:56:19 +08:00
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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struct nouveau_drm *drm = nvbo->cli->drm;
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struct nouveau_mem *mem;
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2012-07-19 15:54:21 +08:00
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int ret;
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2017-11-01 01:56:19 +08:00
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ret = nouveau_mem_new(&drm->master, nvbo->kind, nvbo->comp, reg);
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mem = nouveau_mem(reg);
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if (ret)
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return ret;
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2012-07-19 15:54:21 +08:00
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2017-11-01 01:56:20 +08:00
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ret = nvif_vmm_get(&mem->cli->vmm.vmm, PTES, false, 12, 0,
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reg->num_pages << PAGE_SHIFT, &mem->vma[0]);
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2012-07-19 15:54:21 +08:00
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if (ret) {
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2017-11-01 01:56:19 +08:00
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nouveau_mem_del(reg);
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2017-11-01 01:56:19 +08:00
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if (ret == -ENOSPC) {
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reg->mm_node = NULL;
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2017-11-01 01:56:19 +08:00
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return 0;
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2017-11-01 01:56:19 +08:00
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}
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2012-07-19 15:54:21 +08:00
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return ret;
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}
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2017-11-01 01:56:19 +08:00
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reg->start = mem->vma[0].addr >> PAGE_SHIFT;
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2012-07-19 15:54:21 +08:00
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return 0;
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}
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const struct ttm_mem_type_manager_func nv04_gart_manager = {
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2017-11-01 01:56:19 +08:00
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.init = nouveau_manager_init,
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.takedown = nouveau_manager_fini,
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2016-12-17 09:04:42 +08:00
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.get_node = nv04_gart_manager_new,
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2017-11-01 01:56:19 +08:00
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.put_node = nouveau_manager_del,
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2017-11-01 01:56:19 +08:00
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.debug = nouveau_manager_debug
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2012-07-19 15:54:21 +08:00
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};
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2009-12-11 17:24:15 +08:00
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int
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nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
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{
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struct drm_file *file_priv = filp->private_data;
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2012-07-31 14:16:21 +08:00
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struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);
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2009-12-11 17:24:15 +08:00
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if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
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2014-12-16 14:33:09 +08:00
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return drm_legacy_mmap(filp, vma);
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2009-12-11 17:24:15 +08:00
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2012-07-20 06:17:34 +08:00
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return ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
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2009-12-11 17:24:15 +08:00
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}
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static int
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2010-03-09 08:56:52 +08:00
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nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
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2009-12-11 17:24:15 +08:00
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{
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return ttm_mem_global_init(ref->object);
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}
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static void
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2010-03-09 08:56:52 +08:00
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nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
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2009-12-11 17:24:15 +08:00
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{
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ttm_mem_global_release(ref->object);
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}
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int
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2012-07-20 06:17:34 +08:00
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nouveau_ttm_global_init(struct nouveau_drm *drm)
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2009-12-11 17:24:15 +08:00
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{
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2010-03-09 08:56:52 +08:00
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struct drm_global_reference *global_ref;
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2009-12-11 17:24:15 +08:00
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int ret;
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2012-07-20 06:17:34 +08:00
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global_ref = &drm->ttm.mem_global_ref;
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2010-03-09 08:56:52 +08:00
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global_ref->global_type = DRM_GLOBAL_TTM_MEM;
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2009-12-11 17:24:15 +08:00
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global_ref->size = sizeof(struct ttm_mem_global);
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global_ref->init = &nouveau_ttm_mem_global_init;
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global_ref->release = &nouveau_ttm_mem_global_release;
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2010-03-09 08:56:52 +08:00
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ret = drm_global_item_ref(global_ref);
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2009-12-11 17:24:15 +08:00
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if (unlikely(ret != 0)) {
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DRM_ERROR("Failed setting up TTM memory accounting\n");
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2012-07-20 06:17:34 +08:00
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drm->ttm.mem_global_ref.release = NULL;
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2009-12-11 17:24:15 +08:00
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return ret;
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}
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2012-07-20 06:17:34 +08:00
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drm->ttm.bo_global_ref.mem_glob = global_ref->object;
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global_ref = &drm->ttm.bo_global_ref.ref;
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2010-03-09 08:56:52 +08:00
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global_ref->global_type = DRM_GLOBAL_TTM_BO;
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2009-12-11 17:24:15 +08:00
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global_ref->size = sizeof(struct ttm_bo_global);
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global_ref->init = &ttm_bo_global_init;
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global_ref->release = &ttm_bo_global_release;
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2010-03-09 08:56:52 +08:00
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ret = drm_global_item_ref(global_ref);
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2009-12-11 17:24:15 +08:00
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if (unlikely(ret != 0)) {
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DRM_ERROR("Failed setting up TTM BO subsystem\n");
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2012-07-20 06:17:34 +08:00
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drm_global_item_unref(&drm->ttm.mem_global_ref);
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drm->ttm.mem_global_ref.release = NULL;
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2009-12-11 17:24:15 +08:00
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return ret;
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}
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return 0;
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}
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void
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2012-07-20 06:17:34 +08:00
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nouveau_ttm_global_release(struct nouveau_drm *drm)
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2009-12-11 17:24:15 +08:00
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{
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2012-07-20 06:17:34 +08:00
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if (drm->ttm.mem_global_ref.release == NULL)
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2009-12-11 17:24:15 +08:00
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return;
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2012-07-20 06:17:34 +08:00
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drm_global_item_unref(&drm->ttm.bo_global_ref.ref);
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drm_global_item_unref(&drm->ttm.mem_global_ref);
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drm->ttm.mem_global_ref.release = NULL;
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}
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2017-12-14 09:19:27 +08:00
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static int
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nouveau_ttm_init_host(struct nouveau_drm *drm, u8 kind)
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2012-07-20 06:17:34 +08:00
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{
|
2017-11-01 01:56:20 +08:00
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struct nvif_mmu *mmu = &drm->client.mmu;
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2017-12-14 09:19:27 +08:00
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int typei;
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2017-11-01 01:56:20 +08:00
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typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE |
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2017-12-14 09:19:27 +08:00
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kind | NVIF_MEM_COHERENT);
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2017-11-01 01:56:20 +08:00
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if (typei < 0)
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return -ENOSYS;
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2017-12-14 09:19:27 +08:00
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drm->ttm.type_host[!!kind] = typei;
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2017-11-01 01:56:20 +08:00
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2017-12-14 09:19:27 +08:00
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typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | kind);
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2017-11-01 01:56:20 +08:00
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if (typei < 0)
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return -ENOSYS;
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2017-12-14 09:19:27 +08:00
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drm->ttm.type_ncoh[!!kind] = typei;
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return 0;
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}
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int
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nouveau_ttm_init(struct nouveau_drm *drm)
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{
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struct nvkm_device *device = nvxx_device(&drm->client.device);
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struct nvkm_pci *pci = device->pci;
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struct nvif_mmu *mmu = &drm->client.mmu;
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struct drm_device *dev = drm->dev;
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int typei, ret;
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ret = nouveau_ttm_init_host(drm, 0);
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if (ret)
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return ret;
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if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
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drm->client.device.info.chipset != 0x50) {
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ret = nouveau_ttm_init_host(drm, NVIF_MEM_KIND);
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if (ret)
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return ret;
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}
|
2017-11-01 01:56:20 +08:00
|
|
|
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|
if (drm->client.device.info.platform != NV_DEVICE_INFO_V0_SOC &&
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|
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drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
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|
typei = nvif_mmu_type(mmu, NVIF_MEM_VRAM | NVIF_MEM_MAPPABLE |
|
|
|
|
NVIF_MEM_KIND |
|
|
|
|
NVIF_MEM_COMP |
|
|
|
|
NVIF_MEM_DISP);
|
|
|
|
if (typei < 0)
|
|
|
|
return -ENOSYS;
|
|
|
|
|
|
|
|
drm->ttm.type_vram = typei;
|
|
|
|
} else {
|
|
|
|
drm->ttm.type_vram = -1;
|
|
|
|
}
|
2012-07-20 06:17:34 +08:00
|
|
|
|
2015-08-20 12:54:23 +08:00
|
|
|
if (pci && pci->agp.bridge) {
|
|
|
|
drm->agp.bridge = pci->agp.bridge;
|
|
|
|
drm->agp.base = pci->agp.base;
|
|
|
|
drm->agp.size = pci->agp.size;
|
|
|
|
drm->agp.cma = pci->agp.cma;
|
|
|
|
}
|
|
|
|
|
2012-07-20 06:17:34 +08:00
|
|
|
ret = nouveau_ttm_global_init(drm);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = ttm_bo_device_init(&drm->ttm.bdev,
|
|
|
|
drm->ttm.bo_global_ref.ref.object,
|
2013-08-14 01:10:30 +08:00
|
|
|
&nouveau_bo_driver,
|
|
|
|
dev->anon_inode->i_mapping,
|
|
|
|
DRM_FILE_PAGE_OFFSET,
|
2017-11-01 01:56:19 +08:00
|
|
|
drm->client.mmu.dmabits <= 32 ? true : false);
|
2012-07-20 06:17:34 +08:00
|
|
|
if (ret) {
|
|
|
|
NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* VRAM init */
|
2016-05-18 11:57:42 +08:00
|
|
|
drm->gem.vram_available = drm->client.device.info.ram_user;
|
2012-07-20 06:17:34 +08:00
|
|
|
|
2016-10-24 13:37:48 +08:00
|
|
|
arch_io_reserve_memtype_wc(device->func->resource_addr(device, 1),
|
|
|
|
device->func->resource_size(device, 1));
|
|
|
|
|
2012-07-20 06:17:34 +08:00
|
|
|
ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
|
|
|
|
drm->gem.vram_available >> PAGE_SHIFT);
|
|
|
|
if (ret) {
|
|
|
|
NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-08-20 12:54:23 +08:00
|
|
|
drm->ttm.mtrr = arch_phys_wc_add(device->func->resource_addr(device, 1),
|
|
|
|
device->func->resource_size(device, 1));
|
2012-07-20 06:17:34 +08:00
|
|
|
|
|
|
|
/* GART init */
|
2015-08-20 12:54:23 +08:00
|
|
|
if (!drm->agp.bridge) {
|
2017-11-01 01:56:20 +08:00
|
|
|
drm->gem.gart_available = drm->client.vmm.vmm.limit;
|
2012-07-20 06:17:34 +08:00
|
|
|
} else {
|
|
|
|
drm->gem.gart_available = drm->agp.size;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT,
|
|
|
|
drm->gem.gart_available >> PAGE_SHIFT);
|
|
|
|
if (ret) {
|
|
|
|
NV_ERROR(drm, "GART mm init failed, %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
|
|
|
|
NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
nouveau_ttm_fini(struct nouveau_drm *drm)
|
|
|
|
{
|
2016-05-18 11:57:42 +08:00
|
|
|
struct nvkm_device *device = nvxx_device(&drm->client.device);
|
2016-10-24 13:37:48 +08:00
|
|
|
|
2012-07-20 06:17:34 +08:00
|
|
|
ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
|
|
|
|
ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
|
|
|
|
|
|
|
|
ttm_bo_device_release(&drm->ttm.bdev);
|
|
|
|
|
|
|
|
nouveau_ttm_global_release(drm);
|
|
|
|
|
2013-05-14 07:58:41 +08:00
|
|
|
arch_phys_wc_del(drm->ttm.mtrr);
|
|
|
|
drm->ttm.mtrr = 0;
|
2016-10-24 13:37:48 +08:00
|
|
|
arch_io_free_memtype_wc(device->func->resource_addr(device, 1),
|
|
|
|
device->func->resource_size(device, 1));
|
|
|
|
|
2009-12-11 17:24:15 +08:00
|
|
|
}
|