2022-07-20 04:52:46 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Data Object Exchange
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* PCIe r6.0, sec 6.30 DOE
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*
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* Copyright (C) 2021 Huawei
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* Jonathan Cameron <Jonathan.Cameron@huawei.com>
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*
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* Copyright (C) 2022 Intel Corporation
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* Ira Weiny <ira.weiny@intel.com>
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*/
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#define dev_fmt(fmt) "DOE: " fmt
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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#include <linux/mutex.h>
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#include <linux/pci.h>
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#include <linux/pci-doe.h>
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#include <linux/workqueue.h>
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2023-03-11 22:40:12 +08:00
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#include "pci.h"
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2022-07-20 04:52:46 +08:00
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#define PCI_DOE_PROTOCOL_DISCOVERY 0
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/* Timeout of 1 second from 6.30.2 Operation, PCI Spec r6.0 */
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#define PCI_DOE_TIMEOUT HZ
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#define PCI_DOE_POLL_INTERVAL (PCI_DOE_TIMEOUT / 128)
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#define PCI_DOE_FLAG_CANCEL 0
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#define PCI_DOE_FLAG_DEAD 1
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2022-11-16 09:56:37 +08:00
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/* Max data object length is 2^18 dwords */
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#define PCI_DOE_MAX_LENGTH (1 << 18)
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2022-07-20 04:52:46 +08:00
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/**
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* struct pci_doe_mb - State for a single DOE mailbox
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*
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* This state is used to manage a single DOE mailbox capability. All fields
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* should be considered opaque to the consumers and the structure passed into
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2023-03-11 22:40:11 +08:00
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* the helpers below after being created by pci_doe_create_mb().
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2022-07-20 04:52:46 +08:00
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*
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* @pdev: PCI device this mailbox belongs to
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* @cap_offset: Capability offset
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* @prots: Array of protocols supported (encoded as long values)
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* @wq: Wait queue for work item
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* @work_queue: Queue of pci_doe_work items
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* @flags: Bit array of PCI_DOE_FLAG_* flags
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*/
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struct pci_doe_mb {
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struct pci_dev *pdev;
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u16 cap_offset;
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struct xarray prots;
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wait_queue_head_t wq;
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struct workqueue_struct *work_queue;
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unsigned long flags;
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};
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2023-03-11 22:40:09 +08:00
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struct pci_doe_protocol {
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u16 vid;
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u8 type;
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};
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/**
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* struct pci_doe_task - represents a single query/response
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*
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* @prot: DOE Protocol
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* @request_pl: The request payload
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* @request_pl_sz: Size of the request payload (bytes)
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* @response_pl: The response payload
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* @response_pl_sz: Size of the response payload (bytes)
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* @rv: Return value. Length of received response or error (bytes)
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* @complete: Called when task is complete
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* @private: Private data for the consumer
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* @work: Used internally by the mailbox
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* @doe_mb: Used internally by the mailbox
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*/
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struct pci_doe_task {
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struct pci_doe_protocol prot;
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const __le32 *request_pl;
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size_t request_pl_sz;
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__le32 *response_pl;
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size_t response_pl_sz;
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int rv;
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void (*complete)(struct pci_doe_task *task);
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void *private;
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/* initialized by pci_doe_submit_task() */
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struct work_struct work;
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struct pci_doe_mb *doe_mb;
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};
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2022-07-20 04:52:46 +08:00
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static int pci_doe_wait(struct pci_doe_mb *doe_mb, unsigned long timeout)
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{
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if (wait_event_timeout(doe_mb->wq,
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test_bit(PCI_DOE_FLAG_CANCEL, &doe_mb->flags),
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timeout))
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return -EIO;
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return 0;
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}
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static void pci_doe_write_ctrl(struct pci_doe_mb *doe_mb, u32 val)
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{
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struct pci_dev *pdev = doe_mb->pdev;
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int offset = doe_mb->cap_offset;
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pci_write_config_dword(pdev, offset + PCI_DOE_CTRL, val);
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}
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static int pci_doe_abort(struct pci_doe_mb *doe_mb)
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{
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struct pci_dev *pdev = doe_mb->pdev;
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int offset = doe_mb->cap_offset;
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unsigned long timeout_jiffies;
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pci_dbg(pdev, "[%x] Issuing Abort\n", offset);
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timeout_jiffies = jiffies + PCI_DOE_TIMEOUT;
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pci_doe_write_ctrl(doe_mb, PCI_DOE_CTRL_ABORT);
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do {
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int rc;
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u32 val;
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rc = pci_doe_wait(doe_mb, PCI_DOE_POLL_INTERVAL);
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if (rc)
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return rc;
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pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val);
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/* Abort success! */
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if (!FIELD_GET(PCI_DOE_STATUS_ERROR, val) &&
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!FIELD_GET(PCI_DOE_STATUS_BUSY, val))
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return 0;
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} while (!time_after(jiffies, timeout_jiffies));
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/* Abort has timed out and the MB is dead */
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pci_err(pdev, "[%x] ABORT timed out\n", offset);
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return -EIO;
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}
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static int pci_doe_send_req(struct pci_doe_mb *doe_mb,
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struct pci_doe_task *task)
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{
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struct pci_dev *pdev = doe_mb->pdev;
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int offset = doe_mb->cap_offset;
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2023-03-11 22:40:15 +08:00
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size_t length, remainder;
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2022-07-20 04:52:46 +08:00
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u32 val;
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int i;
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/*
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* Check the DOE busy bit is not set. If it is set, this could indicate
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* someone other than Linux (e.g. firmware) is using the mailbox. Note
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* it is expected that firmware and OS will negotiate access rights via
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* an, as yet to be defined, method.
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*/
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pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val);
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if (FIELD_GET(PCI_DOE_STATUS_BUSY, val))
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return -EBUSY;
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if (FIELD_GET(PCI_DOE_STATUS_ERROR, val))
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return -EIO;
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2022-11-16 09:56:37 +08:00
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/* Length is 2 DW of header + length of payload in DW */
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2023-03-11 22:40:15 +08:00
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length = 2 + DIV_ROUND_UP(task->request_pl_sz, sizeof(__le32));
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2022-11-16 09:56:37 +08:00
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if (length > PCI_DOE_MAX_LENGTH)
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return -EIO;
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if (length == PCI_DOE_MAX_LENGTH)
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length = 0;
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2022-07-20 04:52:46 +08:00
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/* Write DOE Header */
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val = FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_1_VID, task->prot.vid) |
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FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_1_TYPE, task->prot.type);
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pci_write_config_dword(pdev, offset + PCI_DOE_WRITE, val);
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pci_write_config_dword(pdev, offset + PCI_DOE_WRITE,
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FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_2_LENGTH,
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2022-11-16 09:56:37 +08:00
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length));
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2023-03-11 22:40:15 +08:00
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/* Write payload */
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2023-03-11 22:40:01 +08:00
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for (i = 0; i < task->request_pl_sz / sizeof(__le32); i++)
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2022-07-20 04:52:46 +08:00
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pci_write_config_dword(pdev, offset + PCI_DOE_WRITE,
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2023-03-11 22:40:01 +08:00
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le32_to_cpu(task->request_pl[i]));
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2022-07-20 04:52:46 +08:00
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2023-03-11 22:40:15 +08:00
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/* Write last payload dword */
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remainder = task->request_pl_sz % sizeof(__le32);
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if (remainder) {
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val = 0;
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memcpy(&val, &task->request_pl[i], remainder);
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le32_to_cpus(&val);
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pci_write_config_dword(pdev, offset + PCI_DOE_WRITE, val);
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}
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2022-07-20 04:52:46 +08:00
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pci_doe_write_ctrl(doe_mb, PCI_DOE_CTRL_GO);
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return 0;
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}
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static bool pci_doe_data_obj_ready(struct pci_doe_mb *doe_mb)
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{
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struct pci_dev *pdev = doe_mb->pdev;
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int offset = doe_mb->cap_offset;
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u32 val;
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pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val);
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if (FIELD_GET(PCI_DOE_STATUS_DATA_OBJECT_READY, val))
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return true;
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return false;
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}
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static int pci_doe_recv_resp(struct pci_doe_mb *doe_mb, struct pci_doe_task *task)
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{
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2023-03-11 22:40:15 +08:00
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size_t length, payload_length, remainder, received;
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2022-07-20 04:52:46 +08:00
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struct pci_dev *pdev = doe_mb->pdev;
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int offset = doe_mb->cap_offset;
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2023-03-11 22:40:15 +08:00
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int i = 0;
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2022-07-20 04:52:46 +08:00
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u32 val;
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/* Read the first dword to get the protocol */
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pci_read_config_dword(pdev, offset + PCI_DOE_READ, &val);
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if ((FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_1_VID, val) != task->prot.vid) ||
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(FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_1_TYPE, val) != task->prot.type)) {
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dev_err_ratelimited(&pdev->dev, "[%x] expected [VID, Protocol] = [%04x, %02x], got [%04x, %02x]\n",
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doe_mb->cap_offset, task->prot.vid, task->prot.type,
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FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_1_VID, val),
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FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_1_TYPE, val));
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return -EIO;
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}
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pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0);
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/* Read the second dword to get the length */
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pci_read_config_dword(pdev, offset + PCI_DOE_READ, &val);
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pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0);
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length = FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_2_LENGTH, val);
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2022-11-16 09:56:37 +08:00
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/* A value of 0x0 indicates max data object length */
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if (!length)
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length = PCI_DOE_MAX_LENGTH;
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if (length < 2)
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2022-07-20 04:52:46 +08:00
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return -EIO;
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/* First 2 dwords have already been read */
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length -= 2;
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2023-03-11 22:40:15 +08:00
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received = task->response_pl_sz;
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payload_length = DIV_ROUND_UP(task->response_pl_sz, sizeof(__le32));
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remainder = task->response_pl_sz % sizeof(__le32);
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/* remainder signifies number of data bytes in last payload dword */
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if (!remainder)
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remainder = sizeof(__le32);
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if (length < payload_length) {
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received = length * sizeof(__le32);
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payload_length = length;
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remainder = sizeof(__le32);
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}
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if (payload_length) {
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/* Read all payload dwords except the last */
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for (; i < payload_length - 1; i++) {
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pci_read_config_dword(pdev, offset + PCI_DOE_READ,
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&val);
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task->response_pl[i] = cpu_to_le32(val);
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pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0);
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}
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/* Read last payload dword */
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2023-03-11 22:40:01 +08:00
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pci_read_config_dword(pdev, offset + PCI_DOE_READ, &val);
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2023-03-11 22:40:15 +08:00
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cpu_to_le32s(&val);
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memcpy(&task->response_pl[i], &val, remainder);
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2022-07-20 04:52:46 +08:00
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/* Prior to the last ack, ensure Data Object Ready */
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2023-03-11 22:40:15 +08:00
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if (!pci_doe_data_obj_ready(doe_mb))
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2022-07-20 04:52:46 +08:00
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return -EIO;
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pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0);
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2023-03-11 22:40:15 +08:00
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i++;
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2022-07-20 04:52:46 +08:00
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}
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/* Flush excess length */
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for (; i < length; i++) {
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pci_read_config_dword(pdev, offset + PCI_DOE_READ, &val);
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pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0);
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}
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/* Final error check to pick up on any since Data Object Ready */
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pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val);
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if (FIELD_GET(PCI_DOE_STATUS_ERROR, val))
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return -EIO;
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2023-03-11 22:40:15 +08:00
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return received;
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2022-07-20 04:52:46 +08:00
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}
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static void signal_task_complete(struct pci_doe_task *task, int rv)
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{
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task->rv = rv;
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2023-03-11 22:40:06 +08:00
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destroy_work_on_stack(&task->work);
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2023-07-27 02:29:42 +08:00
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task->complete(task);
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2022-07-20 04:52:46 +08:00
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}
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static void signal_task_abort(struct pci_doe_task *task, int rv)
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{
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struct pci_doe_mb *doe_mb = task->doe_mb;
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struct pci_dev *pdev = doe_mb->pdev;
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if (pci_doe_abort(doe_mb)) {
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/*
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* If the device can't process an abort; set the mailbox dead
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* - no more submissions
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*/
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pci_err(pdev, "[%x] Abort failed marking mailbox dead\n",
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doe_mb->cap_offset);
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set_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags);
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}
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signal_task_complete(task, rv);
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}
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static void doe_statemachine_work(struct work_struct *work)
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{
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struct pci_doe_task *task = container_of(work, struct pci_doe_task,
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work);
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struct pci_doe_mb *doe_mb = task->doe_mb;
|
|
|
|
struct pci_dev *pdev = doe_mb->pdev;
|
|
|
|
int offset = doe_mb->cap_offset;
|
|
|
|
unsigned long timeout_jiffies;
|
|
|
|
u32 val;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (test_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags)) {
|
|
|
|
signal_task_complete(task, -EIO);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Send request */
|
|
|
|
rc = pci_doe_send_req(doe_mb, task);
|
|
|
|
if (rc) {
|
|
|
|
/*
|
|
|
|
* The specification does not provide any guidance on how to
|
|
|
|
* resolve conflicting requests from other entities.
|
|
|
|
* Furthermore, it is likely that busy will not be detected
|
|
|
|
* most of the time. Flag any detection of status busy with an
|
|
|
|
* error.
|
|
|
|
*/
|
|
|
|
if (rc == -EBUSY)
|
|
|
|
dev_err_ratelimited(&pdev->dev, "[%x] busy detected; another entity is sending conflicting requests\n",
|
|
|
|
offset);
|
|
|
|
signal_task_abort(task, rc);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
timeout_jiffies = jiffies + PCI_DOE_TIMEOUT;
|
|
|
|
/* Poll for response */
|
|
|
|
retry_resp:
|
|
|
|
pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val);
|
|
|
|
if (FIELD_GET(PCI_DOE_STATUS_ERROR, val)) {
|
|
|
|
signal_task_abort(task, -EIO);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!FIELD_GET(PCI_DOE_STATUS_DATA_OBJECT_READY, val)) {
|
|
|
|
if (time_after(jiffies, timeout_jiffies)) {
|
|
|
|
signal_task_abort(task, -EIO);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
rc = pci_doe_wait(doe_mb, PCI_DOE_POLL_INTERVAL);
|
|
|
|
if (rc) {
|
|
|
|
signal_task_abort(task, rc);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
goto retry_resp;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = pci_doe_recv_resp(doe_mb, task);
|
|
|
|
if (rc < 0) {
|
|
|
|
signal_task_abort(task, rc);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
signal_task_complete(task, rc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void pci_doe_task_complete(struct pci_doe_task *task)
|
|
|
|
{
|
|
|
|
complete(task->private);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int pci_doe_discovery(struct pci_doe_mb *doe_mb, u8 *index, u16 *vid,
|
|
|
|
u8 *protocol)
|
|
|
|
{
|
|
|
|
u32 request_pl = FIELD_PREP(PCI_DOE_DATA_OBJECT_DISC_REQ_3_INDEX,
|
|
|
|
*index);
|
2023-03-11 22:40:01 +08:00
|
|
|
__le32 request_pl_le = cpu_to_le32(request_pl);
|
|
|
|
__le32 response_pl_le;
|
2022-07-20 04:52:46 +08:00
|
|
|
u32 response_pl;
|
|
|
|
int rc;
|
|
|
|
|
2023-03-11 22:40:07 +08:00
|
|
|
rc = pci_doe(doe_mb, PCI_VENDOR_ID_PCI_SIG, PCI_DOE_PROTOCOL_DISCOVERY,
|
|
|
|
&request_pl_le, sizeof(request_pl_le),
|
|
|
|
&response_pl_le, sizeof(response_pl_le));
|
2022-07-20 04:52:46 +08:00
|
|
|
if (rc < 0)
|
|
|
|
return rc;
|
|
|
|
|
2023-03-11 22:40:07 +08:00
|
|
|
if (rc != sizeof(response_pl_le))
|
2022-07-20 04:52:46 +08:00
|
|
|
return -EIO;
|
|
|
|
|
2023-03-11 22:40:01 +08:00
|
|
|
response_pl = le32_to_cpu(response_pl_le);
|
2022-07-20 04:52:46 +08:00
|
|
|
*vid = FIELD_GET(PCI_DOE_DATA_OBJECT_DISC_RSP_3_VID, response_pl);
|
|
|
|
*protocol = FIELD_GET(PCI_DOE_DATA_OBJECT_DISC_RSP_3_PROTOCOL,
|
|
|
|
response_pl);
|
|
|
|
*index = FIELD_GET(PCI_DOE_DATA_OBJECT_DISC_RSP_3_NEXT_INDEX,
|
|
|
|
response_pl);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *pci_doe_xa_prot_entry(u16 vid, u8 prot)
|
|
|
|
{
|
|
|
|
return xa_mk_value((vid << 8) | prot);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int pci_doe_cache_protocols(struct pci_doe_mb *doe_mb)
|
|
|
|
{
|
|
|
|
u8 index = 0;
|
|
|
|
u8 xa_idx = 0;
|
|
|
|
|
|
|
|
do {
|
|
|
|
int rc;
|
|
|
|
u16 vid;
|
|
|
|
u8 prot;
|
|
|
|
|
|
|
|
rc = pci_doe_discovery(doe_mb, &index, &vid, &prot);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
pci_dbg(doe_mb->pdev,
|
|
|
|
"[%x] Found protocol %d vid: %x prot: %x\n",
|
|
|
|
doe_mb->cap_offset, xa_idx, vid, prot);
|
|
|
|
|
|
|
|
rc = xa_insert(&doe_mb->prots, xa_idx++,
|
|
|
|
pci_doe_xa_prot_entry(vid, prot), GFP_KERNEL);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
} while (index);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2023-03-11 22:40:11 +08:00
|
|
|
static void pci_doe_cancel_tasks(struct pci_doe_mb *doe_mb)
|
2022-07-20 04:52:46 +08:00
|
|
|
{
|
|
|
|
/* Stop all pending work items from starting */
|
|
|
|
set_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags);
|
|
|
|
|
|
|
|
/* Cancel an in progress work item, if necessary */
|
|
|
|
set_bit(PCI_DOE_FLAG_CANCEL, &doe_mb->flags);
|
|
|
|
wake_up(&doe_mb->wq);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2023-03-11 22:40:11 +08:00
|
|
|
* pci_doe_create_mb() - Create a DOE mailbox object
|
2022-07-20 04:52:46 +08:00
|
|
|
*
|
|
|
|
* @pdev: PCI device to create the DOE mailbox for
|
|
|
|
* @cap_offset: Offset of the DOE mailbox
|
|
|
|
*
|
|
|
|
* Create a single mailbox object to manage the mailbox protocol at the
|
|
|
|
* cap_offset specified.
|
|
|
|
*
|
|
|
|
* RETURNS: created mailbox object on success
|
|
|
|
* ERR_PTR(-errno) on failure
|
|
|
|
*/
|
2023-03-11 22:40:11 +08:00
|
|
|
static struct pci_doe_mb *pci_doe_create_mb(struct pci_dev *pdev,
|
|
|
|
u16 cap_offset)
|
2022-07-20 04:52:46 +08:00
|
|
|
{
|
|
|
|
struct pci_doe_mb *doe_mb;
|
|
|
|
int rc;
|
|
|
|
|
2023-03-11 22:40:11 +08:00
|
|
|
doe_mb = kzalloc(sizeof(*doe_mb), GFP_KERNEL);
|
2022-07-20 04:52:46 +08:00
|
|
|
if (!doe_mb)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
doe_mb->pdev = pdev;
|
|
|
|
doe_mb->cap_offset = cap_offset;
|
|
|
|
init_waitqueue_head(&doe_mb->wq);
|
|
|
|
xa_init(&doe_mb->prots);
|
|
|
|
|
|
|
|
doe_mb->work_queue = alloc_ordered_workqueue("%s %s DOE [%x]", 0,
|
2023-03-11 22:40:14 +08:00
|
|
|
dev_bus_name(&pdev->dev),
|
2022-07-20 04:52:46 +08:00
|
|
|
pci_name(pdev),
|
|
|
|
doe_mb->cap_offset);
|
|
|
|
if (!doe_mb->work_queue) {
|
|
|
|
pci_err(pdev, "[%x] failed to allocate work queue\n",
|
|
|
|
doe_mb->cap_offset);
|
2023-03-11 22:40:11 +08:00
|
|
|
rc = -ENOMEM;
|
|
|
|
goto err_free;
|
2022-07-20 04:52:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Reset the mailbox by issuing an abort */
|
|
|
|
rc = pci_doe_abort(doe_mb);
|
|
|
|
if (rc) {
|
|
|
|
pci_err(pdev, "[%x] failed to reset mailbox with abort command : %d\n",
|
|
|
|
doe_mb->cap_offset, rc);
|
2023-03-11 22:40:11 +08:00
|
|
|
goto err_destroy_wq;
|
2022-07-20 04:52:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The state machine and the mailbox should be in sync now;
|
2023-03-11 22:40:11 +08:00
|
|
|
* Use the mailbox to query protocols.
|
2022-07-20 04:52:46 +08:00
|
|
|
*/
|
|
|
|
rc = pci_doe_cache_protocols(doe_mb);
|
|
|
|
if (rc) {
|
|
|
|
pci_err(pdev, "[%x] failed to cache protocols : %d\n",
|
|
|
|
doe_mb->cap_offset, rc);
|
2023-03-11 22:40:11 +08:00
|
|
|
goto err_cancel;
|
2022-07-20 04:52:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return doe_mb;
|
2023-03-11 22:40:11 +08:00
|
|
|
|
|
|
|
err_cancel:
|
|
|
|
pci_doe_cancel_tasks(doe_mb);
|
|
|
|
xa_destroy(&doe_mb->prots);
|
|
|
|
err_destroy_wq:
|
|
|
|
destroy_workqueue(doe_mb->work_queue);
|
|
|
|
err_free:
|
|
|
|
kfree(doe_mb);
|
|
|
|
return ERR_PTR(rc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_doe_destroy_mb() - Destroy a DOE mailbox object
|
|
|
|
*
|
2023-03-11 22:40:14 +08:00
|
|
|
* @doe_mb: DOE mailbox
|
2023-03-11 22:40:11 +08:00
|
|
|
*
|
|
|
|
* Destroy all internal data structures created for the DOE mailbox.
|
|
|
|
*/
|
2023-03-11 22:40:14 +08:00
|
|
|
static void pci_doe_destroy_mb(struct pci_doe_mb *doe_mb)
|
2023-03-11 22:40:11 +08:00
|
|
|
{
|
|
|
|
pci_doe_cancel_tasks(doe_mb);
|
|
|
|
xa_destroy(&doe_mb->prots);
|
|
|
|
destroy_workqueue(doe_mb->work_queue);
|
|
|
|
kfree(doe_mb);
|
|
|
|
}
|
|
|
|
|
2022-07-20 04:52:46 +08:00
|
|
|
/**
|
|
|
|
* pci_doe_supports_prot() - Return if the DOE instance supports the given
|
|
|
|
* protocol
|
|
|
|
* @doe_mb: DOE mailbox capability to query
|
|
|
|
* @vid: Protocol Vendor ID
|
|
|
|
* @type: Protocol type
|
|
|
|
*
|
|
|
|
* RETURNS: True if the DOE mailbox supports the protocol specified
|
|
|
|
*/
|
2023-03-11 22:40:14 +08:00
|
|
|
static bool pci_doe_supports_prot(struct pci_doe_mb *doe_mb, u16 vid, u8 type)
|
2022-07-20 04:52:46 +08:00
|
|
|
{
|
|
|
|
unsigned long index;
|
|
|
|
void *entry;
|
|
|
|
|
|
|
|
/* The discovery protocol must always be supported */
|
|
|
|
if (vid == PCI_VENDOR_ID_PCI_SIG && type == PCI_DOE_PROTOCOL_DISCOVERY)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
xa_for_each(&doe_mb->prots, index, entry)
|
|
|
|
if (entry == pci_doe_xa_prot_entry(vid, type))
|
|
|
|
return true;
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_doe_submit_task() - Submit a task to be processed by the state machine
|
|
|
|
*
|
|
|
|
* @doe_mb: DOE mailbox capability to submit to
|
|
|
|
* @task: task to be queued
|
|
|
|
*
|
|
|
|
* Submit a DOE task (request/response) to the DOE mailbox to be processed.
|
|
|
|
* Returns upon queueing the task object. If the queue is full this function
|
|
|
|
* will sleep until there is room in the queue.
|
|
|
|
*
|
|
|
|
* task->complete will be called when the state machine is done processing this
|
|
|
|
* task.
|
|
|
|
*
|
2023-03-11 22:40:05 +08:00
|
|
|
* @task must be allocated on the stack.
|
|
|
|
*
|
2022-07-20 04:52:46 +08:00
|
|
|
* Excess data will be discarded.
|
|
|
|
*
|
|
|
|
* RETURNS: 0 when task has been successfully queued, -ERRNO on error
|
|
|
|
*/
|
2023-03-11 22:40:09 +08:00
|
|
|
static int pci_doe_submit_task(struct pci_doe_mb *doe_mb,
|
|
|
|
struct pci_doe_task *task)
|
2022-07-20 04:52:46 +08:00
|
|
|
{
|
|
|
|
if (!pci_doe_supports_prot(doe_mb, task->prot.vid, task->prot.type))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (test_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags))
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
task->doe_mb = doe_mb;
|
2023-03-11 22:40:05 +08:00
|
|
|
INIT_WORK_ONSTACK(&task->work, doe_statemachine_work);
|
2022-07-20 04:52:46 +08:00
|
|
|
queue_work(doe_mb->work_queue, &task->work);
|
|
|
|
return 0;
|
|
|
|
}
|
2023-03-11 22:40:07 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_doe() - Perform Data Object Exchange
|
|
|
|
*
|
|
|
|
* @doe_mb: DOE Mailbox
|
|
|
|
* @vendor: Vendor ID
|
|
|
|
* @type: Data Object Type
|
|
|
|
* @request: Request payload
|
|
|
|
* @request_sz: Size of request payload (bytes)
|
|
|
|
* @response: Response payload
|
|
|
|
* @response_sz: Size of response payload (bytes)
|
|
|
|
*
|
|
|
|
* Submit @request to @doe_mb and store the @response.
|
|
|
|
* The DOE exchange is performed synchronously and may therefore sleep.
|
|
|
|
*
|
|
|
|
* Payloads are treated as opaque byte streams which are transmitted verbatim,
|
|
|
|
* without byte-swapping. If payloads contain little-endian register values,
|
|
|
|
* the caller is responsible for conversion with cpu_to_le32() / le32_to_cpu().
|
|
|
|
*
|
2023-03-11 22:40:15 +08:00
|
|
|
* For convenience, arbitrary payload sizes are allowed even though PCIe r6.0
|
|
|
|
* sec 6.30.1 specifies the Data Object Header 2 "Length" in dwords. The last
|
|
|
|
* (partial) dword is copied with byte granularity and padded with zeroes if
|
|
|
|
* necessary. Callers are thus relieved of using dword-sized bounce buffers.
|
|
|
|
*
|
2023-03-11 22:40:07 +08:00
|
|
|
* RETURNS: Length of received response or negative errno.
|
|
|
|
* Received data in excess of @response_sz is discarded.
|
|
|
|
* The length may be smaller than @response_sz and the caller
|
|
|
|
* is responsible for checking that.
|
|
|
|
*/
|
|
|
|
int pci_doe(struct pci_doe_mb *doe_mb, u16 vendor, u8 type,
|
|
|
|
const void *request, size_t request_sz,
|
|
|
|
void *response, size_t response_sz)
|
|
|
|
{
|
|
|
|
DECLARE_COMPLETION_ONSTACK(c);
|
|
|
|
struct pci_doe_task task = {
|
|
|
|
.prot.vid = vendor,
|
|
|
|
.prot.type = type,
|
|
|
|
.request_pl = request,
|
|
|
|
.request_pl_sz = request_sz,
|
|
|
|
.response_pl = response,
|
|
|
|
.response_pl_sz = response_sz,
|
|
|
|
.complete = pci_doe_task_complete,
|
|
|
|
.private = &c,
|
|
|
|
};
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = pci_doe_submit_task(doe_mb, &task);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
wait_for_completion(&c);
|
|
|
|
|
|
|
|
return task.rv;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(pci_doe);
|
2023-03-11 22:40:12 +08:00
|
|
|
|
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/**
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* pci_find_doe_mailbox() - Find Data Object Exchange mailbox
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*
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* @pdev: PCI device
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* @vendor: Vendor ID
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* @type: Data Object Type
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*
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* Find first DOE mailbox of a PCI device which supports the given protocol.
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*
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* RETURNS: Pointer to the DOE mailbox or NULL if none was found.
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*/
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struct pci_doe_mb *pci_find_doe_mailbox(struct pci_dev *pdev, u16 vendor,
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u8 type)
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{
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struct pci_doe_mb *doe_mb;
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unsigned long index;
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xa_for_each(&pdev->doe_mbs, index, doe_mb)
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if (pci_doe_supports_prot(doe_mb, vendor, type))
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return doe_mb;
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return NULL;
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}
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EXPORT_SYMBOL_GPL(pci_find_doe_mailbox);
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void pci_doe_init(struct pci_dev *pdev)
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{
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struct pci_doe_mb *doe_mb;
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u16 offset = 0;
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int rc;
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xa_init(&pdev->doe_mbs);
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while ((offset = pci_find_next_ext_capability(pdev, offset,
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PCI_EXT_CAP_ID_DOE))) {
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doe_mb = pci_doe_create_mb(pdev, offset);
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if (IS_ERR(doe_mb)) {
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pci_err(pdev, "[%x] failed to create mailbox: %ld\n",
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offset, PTR_ERR(doe_mb));
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continue;
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}
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rc = xa_insert(&pdev->doe_mbs, offset, doe_mb, GFP_KERNEL);
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if (rc) {
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pci_err(pdev, "[%x] failed to insert mailbox: %d\n",
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offset, rc);
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pci_doe_destroy_mb(doe_mb);
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}
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}
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}
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void pci_doe_destroy(struct pci_dev *pdev)
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{
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struct pci_doe_mb *doe_mb;
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unsigned long index;
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xa_for_each(&pdev->doe_mbs, index, doe_mb)
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pci_doe_destroy_mb(doe_mb);
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xa_destroy(&pdev->doe_mbs);
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}
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void pci_doe_disconnected(struct pci_dev *pdev)
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{
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struct pci_doe_mb *doe_mb;
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unsigned long index;
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xa_for_each(&pdev->doe_mbs, index, doe_mb)
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pci_doe_cancel_tasks(doe_mb);
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}
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