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linux/arch/arm/boot/dts/omap4.dtsi

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arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
/*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
ARM: dts: Update ti-sysc data for existing users Let's update the existing users with features and clock data as specified in the binding. This is currently the smartreflex for most part, and also few omap4 modules with no child device driver like mcasp, abe iss and gfx. Note that we had few mistakes that did not get noticed as we're still probing the SmartReflex driver with legacy platform data and using "ti,hwmods" legacy property for ti-sysc driver. So let's fix the omap4 and dra7 smartreflex registers as there is no no revision register. And on omap4, the mcasp module has a revision register according to the TRM. And for omap34xx we need a different configuration compared to 36xx. And the smartreflex on 3517 we've always kept disabled so let's remove any references to it. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-01-12 08:04:03 +08:00
#include <dt-bindings/bus/ti-sysc.h>
#include <dt-bindings/clock/omap4.h>
ARM: dts: OMAP2+: Use existing constants for GPIOs Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:56 +08:00
#include <dt-bindings/gpio/gpio.h>
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
#include <dt-bindings/interrupt-controller/arm-gic.h>
ARM: dts: OMAP2+: Use pinctrl constants Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:59 +08:00
#include <dt-bindings/pinctrl/omap.h>
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
#include <dt-bindings/clock/omap4.h>
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
/ {
compatible = "ti,omap4430", "ti,omap4";
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupt-parent = <&wakeupgen>;
ARM: dts: omap4: Remove skeleton.dtsi usage The skeleton.dtsi file was removed in ARM64 for different reasons as explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi"). These also applies to ARM and it will also allow to get rid of the following DTC warnings in the future: "Node /memory has a reg or ranges property, but no unit name" The disassembled DTB are almost the same besides an empty chosen node being removed and nodes reordered, so it should not have functional changes. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-08-31 18:35:19 +08:00
#address-cells = <1>;
#size-cells = <1>;
ARM: dts: omap4: Add an empty chosen node to top level DTSI Commit da6269e7e3dd ("ARM: dts: omap4: Remove skeleton.dtsi usage") removed the skeleton.dtsi usage since we want to get rid of it. But this can cause issues when booting a kernel with a boot-loader that doesn't create a chosen node if this isn't present in the DTB since the decompressor relies on a pre-existing chosen node to be available to insert the command line and merge other ATAGS info. Fixes: da6269e7e3dd ("ARM: dts: omap4: Remove skeleton.dtsi usage") Reported-by: Pali Rohar <pali.rohar@gmail.com> Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-12-19 22:44:35 +08:00
chosen { };
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
aliases {
ARM: dts: OMAP3+: Add i2c aliases Currently, on OMAP5, i2c1 and i2c5 defer probe due to pinctrl dependencies. This changes the i2c ID each bus is registered with in i2c-dev interface. As a result of this, many userspace tools break and there is no consistent manner to fix the same if the i2c dev interface have no consistent numbering. Since this could happen for other OMAP derivatives, provide i2c alias for all OMAP3+ SoCs to allow ordering the i2c devices correctly. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-17 04:21:03 +08:00
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
i2c3 = &i2c4;
ARM: omap: pass minimal SoC/board data for UART from dt Pass minimal data needed for console boot, from dt, for OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the static initialization from generic board file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-14 19:55:46 +08:00
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
};
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
cpus {
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
#address-cells = <1>;
#size-cells = <0>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
cpu@0 {
compatible = "arm,cortex-a9";
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
device_type = "cpu";
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 20:27:34 +08:00
next-level-cache = <&L2>;
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
reg = <0x0>;
ARM: dts: OMAP3+: add clock nodes for CPU OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock. OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use dpll_mpu clock. Latency used is the generic latency defined in omap-cpufreq driver. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-30 02:19:17 +08:00
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
};
cpu@1 {
compatible = "arm,cortex-a9";
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
device_type = "cpu";
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 20:27:34 +08:00
next-level-cache = <&L2>;
ARM: dts: omap: cpus/cpu nodes dts updates This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-04-19 01:35:59 +08:00
reg = <0x1>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
};
};
ARM: dts: Configure pmu without interrupt for omap4430 On omap4430, the PMU is not configure unlike on omap4460 because of the missing handling. The missing pmu node with the missing ti,hwmods entry will cause boot time errors when the legacy platform data is removed as the SoC interconnect code needs it. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Let's fix the issue by configuring PMU but without the interrupts. Then when cross trigger interface (CTI) is supported, we can add interrupts also for omap4430. Cc: Jon Hunter <jonathanh@nvidia.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-30 23:19:38 +08:00
/*
* Note that 4430 needs cross trigger interface (CTI) supported
* before we can configure the interrupts. This means sampling
* events are not supported for pmu. Note that 4460 does not use
* CTI, see also 4460.dtsi.
*/
pmu {
compatible = "arm,cortex-a9-pmu";
ti,hwmods = "debugss";
};
ARM: dts: OMAP4: Cleanup and move GIC outside of the OCP Remove some useless comment and move GIC controller outside of the OCP node since it does use the MPU internal bus and not the OCP. This will not change the functionality but will reflect the reality more accurately. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-03 23:56:32 +08:00
gic: interrupt-controller@48241000 {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x48241000 0x1000>,
<0x48240100 0x0100>;
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupt-parent = <&gic>;
ARM: dts: OMAP4: Cleanup and move GIC outside of the OCP Remove some useless comment and move GIC controller outside of the OCP node since it does use the MPU internal bus and not the OCP. This will not change the functionality but will reflect the reality more accurately. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-03 23:56:32 +08:00
};
ARM: OMAP4: Add L2 Cache Controller in Device Tree Provide PL310 Level 2 Cache Controller Device Tree support for OMAP4 based devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 20:27:34 +08:00
L2: l2-cache-controller@48242000 {
compatible = "arm,pl310-cache";
reg = <0x48242000 0x1000>;
cache-unified;
cache-level = <2>;
};
ARM: dts: Remove '0x's from OMAP4 DTS file Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-07-22 18:52:36 +08:00
local-timer@48240600 {
ARM: OMAP4: Add local timer support for Device Tree Add cortex-a9 local timer support for all OMAP4 based SOCs using DT. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 21:02:32 +08:00
compatible = "arm,cortex-a9-twd-timer";
ARM: dts: omap4: add twd clock to DT Booting Linux 3.14 on Pandaboard currently gets the following message displayed: smp_twd: clock not found -2 Define "mpu_periphclk" as the twd clock in omap4 dts to avoid this. Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-04-08 04:05:39 +08:00
clocks = <&mpu_periphclk>;
ARM: OMAP4: Add local timer support for Device Tree Add cortex-a9 local timer support for all OMAP4 based SOCs using DT. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 21:02:32 +08:00
reg = <0x48240600 0x20>;
ARM: OMAP: Correct interrupt type for ARM TWD The ARM TWD interrupt is a private peripheral interrupt (PPI) and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For OMAP4 devices the PPI type cannot be set and so when we attempt to set the type for the ARM TWD interrupt it fails. This has done unnoticed because it fails silently and because we cannot re-configure the type it has had no impact. Nevertheless fix the type for the TWD interrupt so that it matches the hardware configuration. Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-03-17 22:19:06 +08:00
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
ARM: omap: convert wakeupgen to stacked domains OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-03-11 23:43:49 +08:00
interrupt-parent = <&gic>;
};
wakeupgen: interrupt-controller@48281000 {
compatible = "ti,omap4-wugen-mpu";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x48281000 0x1000>;
interrupt-parent = <&gic>;
ARM: OMAP4: Add local timer support for Device Tree Add cortex-a9 local timer support for all OMAP4 based SOCs using DT. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-04 21:02:32 +08:00
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
/*
ARM: dts: Grammar /is uses/ is used/ Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-28 18:11:37 +08:00
* The soc node represents the soc top level view. It is used for IPs
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
mpu {
compatible = "ti,omap4-mpu";
ti,hwmods = "mpu";
ARM: OMAP4+: Remove static iotable mappings for SRAM In order to handle errata I688, a page of sram was reserved by doing a static iotable map. Now that we use gen_pool to manage sram, we can completely remove all of these static mappings and use gen_pool_alloc() to get the one page of sram space needed to implement errata I688. omap_bus_sync will be NOP until SRAM initialization happens. Suggested-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-11 00:04:04 +08:00
sram = <&ocmcram>;
arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
2011-08-16 17:49:08 +08:00
};
dsp {
compatible = "ti,omap3-c64";
ti,hwmods = "dsp";
};
iva {
compatible = "ti,ivahd";
ti,hwmods = "iva";
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
};
/*
* XXX: Use a flat representation of the OMAP4 interconnect.
* The real OMAP interconnect network is quite complex.
ARM: dts: Grammar /that will/it will/ Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-28 18:11:39 +08:00
* Since it will not bring real advantage to represent that in DT for
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/
ocp {
arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2011-08-12 19:48:47 +08:00
compatible = "ti,omap4-l3-noc", "simple-bus";
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
#address-cells = <1>;
#size-cells = <1>;
ranges;
arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
2011-08-12 19:48:47 +08:00
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
ARM: dts: OMAP4/5: Update l3-noc DT nodes Add l3-noc node for OMAP4 and OMAP5 devices. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt number for the L3 interrupts to account for per processor interrupts (PPI) and software generated interrupts (SGI) which typically are mapped to the first 32 interrupts in the ARM GIC. This is not necessary because the first parameter of the ARM GIC interrupt property specifies the GIC interrupt type (ie. SGI, PPI, etc). Hence, fix the interrupt number for the L3 interrupts by substracting 32] Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-26 20:06:14 +08:00
reg = <0x44000000 0x1000>,
<0x44800000 0x2000>,
<0x45000000 0x1000>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc With l4 interconnect hierarchy and ti-sysc interconnect target module data in place, we can simply move all the related child devices to their proper location and enable probing using ti-sysc. In general the first child device address range starts at range 0 from the ti-sysc interconnect target so the move involves adjusting the child device reg properties for that. And we cannot yet move mmu_dsp until we have a proper reset controller driver for rstctrl registers. In case of any regressions, problem devices can be reverted to probe with legacy platform data as needed by moving them back and removing the related interconnect target module node. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-06 14:19:37 +08:00
l4_wkup: interconnect@4a300000 {
};
ARM: dts: Add missing properties for omap4 control modules On omap4, we are missing several ti,hwmods properties and IO ranges for system control modules. These are needed by the SoC interconnect code. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. In order to add these, we need to move omap4_pmx_wkup to be a child of omap4_padconf_wkup. On omap4 there are separate modules for control module and control module pads. For control module core, we have this already configured except for the missing ti,hwmods and reg entries. Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-30 23:19:39 +08:00
ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc With l4 interconnect hierarchy and ti-sysc interconnect target module data in place, we can simply move all the related child devices to their proper location and enable probing using ti-sysc. In general the first child device address range starts at range 0 from the ti-sysc interconnect target so the move involves adjusting the child device reg properties for that. And we cannot yet move mmu_dsp until we have a proper reset controller driver for rstctrl registers. In case of any regressions, problem devices can be reverted to probe with legacy platform data as needed by moving them back and removing the related interconnect target module node. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-06 14:19:37 +08:00
l4_cfg: interconnect@4a000000 {
};
ARM: dts: Add missing properties for omap4 control modules On omap4, we are missing several ti,hwmods properties and IO ranges for system control modules. These are needed by the SoC interconnect code. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. In order to add these, we need to move omap4_pmx_wkup to be a child of omap4_padconf_wkup. On omap4 there are separate modules for control module and control module pads. For control module core, we have this already configured except for the missing ti,hwmods and reg entries. Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-30 23:19:39 +08:00
ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc With l4 interconnect hierarchy and ti-sysc interconnect target module data in place, we can simply move all the related child devices to their proper location and enable probing using ti-sysc. In general the first child device address range starts at range 0 from the ti-sysc interconnect target so the move involves adjusting the child device reg properties for that. And we cannot yet move mmu_dsp until we have a proper reset controller driver for rstctrl registers. In case of any regressions, problem devices can be reverted to probe with legacy platform data as needed by moving them back and removing the related interconnect target module node. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-06 14:19:37 +08:00
l4_per: interconnect@48000000 {
ARM: dts: add pbias dt node Add pbias regulator node as a child of system control module - syscon. Signed-off-by: Balaji T K <balajitk@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Stefan Roese <sr@denx.de> Signed-off-by: Chris Ball <chris@printf.net>
2014-02-19 22:56:40 +08:00
};
ARM: OMAP4+: Move SRAM data to DT Use drivers/misc/sram.c driver to manage SRAM on all DT only OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of the existing private plat-omap/sram.c Address and size related data is removed from mach-omap2/sram.c and now passed to drivers/misc/sram.c from DT. Users can hence use general purpose allocator apis instead of OMAP private ones to manage and use SRAM. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-11 00:04:03 +08:00
ocmcram: ocmcram@40304000 {
compatible = "mmio-sram";
reg = <0x40304000 0xa000>; /* 40k */
};
ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5 Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-23 05:33:31 +08:00
gpmc: gpmc@50000000 {
compatible = "ti,omap4430-gpmc";
reg = <0x50000000 0x1000>;
#address-cells = <2>;
#size-cells = <1>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: am437x/am33xx/omap/dm816x: Add gpmc dma channel Add dma channel information to the gpmc. Although not enabled by default this will allow prefetch-dma to be used. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-10-16 01:37:27 +08:00
dmas = <&sdma 4>;
dma-names = "rxtx";
ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5 Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-23 05:33:31 +08:00
gpmc,num-cs = <8>;
gpmc,num-waitpins = <4>;
ti,hwmods = "gpmc";
ARM: dts: omap: Add reset/idle on init bindings for OMAP On OMAP we have co-processor IPs, memory controllers, GPIOs which control regulators and power switches to PMIC, and SoC internal Bus IPs, some or most of which should either not be reset or idled or both at init. (In some cases there are erratas which prevent an IP from being reset) Have a way to pass this information from DT. Update the am33xx/omap4 and omap5 dtsi files with the new bindings for modules which either should not be idled. reset or both. A later patch would cleanup the same information that exists today as part of the hwmod data files. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-15 15:07:50 +08:00
ti,no-idle-on-init;
ARM: dts: omap4/5: Use l3_ick for the gpmc node The GPMC clock is derived from l3_ick. The simplest solution is to reference directly l3_ick to provide the GPMC fck in order to get correct timings. The real management of the clock is left to hwmod. Cc: stable@vger.kernel.org # v3.14+ Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-02-26 18:38:09 +08:00
clocks = <&l3_div_ck>;
clock-names = "fck";
ARM: dts: omap4: Enable gpio and interrupt controller for GPMC GPMC driver provides interrupts and gpio for the GPMC_WAIT pins. Mark it as gpio and interrupt capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-07 18:25:29 +08:00
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5 Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-02-23 05:33:31 +08:00
};
ARM: dts: OMAP4: Add IOMMU nodes Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 08:24:18 +08:00
mmu_dsp: mmu@4a066000 {
compatible = "ti,omap4-iommu";
reg = <0x4a066000 0x100>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmu_dsp";
ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs Add missing #iommu-cells property to the DSP and IPU IOMMU nodes for OMAP4 platforms. This property is required as per the generic iommu binding. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-11 01:28:55 +08:00
#iommu-cells = <0>;
ARM: dts: OMAP4: Add IOMMU nodes Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 08:24:18 +08:00
};
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
target-module@52000000 {
ARM: dts: Add generic ti,sysc compatible in addition to the custom ones Otherwise we cannot use generic OF_DEV_AUXDATA match without listing all the compatibles separately for OF_DEV_AUXDATA. Let's also update the binding accordingly. Let's also fix omap4.dtsi to use "ti,sysc-omap4-sr" compatible as we have documented in the binding. This was not noticed earlier as we're still probing SmartReflex driver with platform data. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-14 08:36:47 +08:00
compatible = "ti,sysc-omap4", "ti,sysc";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
ti,hwmods = "iss";
reg = <0x52000000 0x4>,
<0x52000010 0x4>;
reg-names = "rev", "sysc";
ARM: dts: Update ti-sysc data for existing users Let's update the existing users with features and clock data as specified in the binding. This is currently the smartreflex for most part, and also few omap4 modules with no child device driver like mcasp, abe iss and gfx. Note that we had few mistakes that did not get noticed as we're still probing the SmartReflex driver with legacy platform data and using "ti,hwmods" legacy property for ti-sysc driver. So let's fix the omap4 and dra7 smartreflex registers as there is no no revision register. And on omap4, the mcasp module has a revision register according to the TRM. And for omap34xx we need a different configuration compared to 36xx. And the smartreflex on 3517 we've always kept disabled so let's remove any references to it. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-01-12 08:04:03 +08:00
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
ti,sysc-delay-us = <2>;
clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
clock-names = "fck";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x52000000 0x1000000>;
/* No child device binding, driver in staging */
};
ARM: dts: OMAP4: Add IOMMU nodes Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 08:24:18 +08:00
mmu_ipu: mmu@55082000 {
compatible = "ti,omap4-iommu";
reg = <0x55082000 0x100>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmu_ipu";
ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs Add missing #iommu-cells property to the DSP and IPU IOMMU nodes for OMAP4 platforms. This property is required as per the generic iommu binding. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-11 01:28:55 +08:00
#iommu-cells = <0>;
ARM: dts: OMAP4: Add IOMMU nodes Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-06 08:24:18 +08:00
ti,iommu-bus-err-back;
};
ARM: dts: omap4: Probe watchdog 3 with ti-sysc Before updating wdt2 to probe with ti-sysc we want to have wdt3 probed with ti-sysc to avoid having them unnecessarily swap order. With ti-sysc, we probe child devices at module_init time while and until l4 abe interconnect is converted to use ti-sysc, wdt3 will probe earlier with legacy platform data. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-06 17:55:34 +08:00
target-module@40130000 {
compatible = "ti,sysc-omap2", "ti,sysc";
ARM: dts: Add missing wdt3 node for omap4 On omap4 we're missing the wdt3 node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-30 23:19:46 +08:00
ti,hwmods = "wd_timer3";
ARM: dts: omap4: Probe watchdog 3 with ti-sysc Before updating wdt2 to probe with ti-sysc we want to have wdt3 probed with ti-sysc to avoid having them unnecessarily swap order. With ti-sysc, we probe child devices at module_init time while and until l4 abe interconnect is converted to use ti-sysc, wdt3 will probe earlier with legacy platform data. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-06 17:55:34 +08:00
reg = <0x40130000 0x4>,
<0x40130010 0x4>,
<0x40130014 0x4>;
reg-names = "rev", "sysc", "syss";
ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
SYSC_OMAP2_SOFTRESET)>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
ti,syss-mask = <1>;
/* Domains (V, P, C): abe, abe_pwrdm, abe_clkdm */
clocks = <&abe_clkctrl OMAP4_WD_TIMER3_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x40130000 0x1000>, /* MPU private access */
<0x49030000 0x49030000 0x0080>; /* L3 Interconnect */
wdt3: wdt@0 {
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
reg = <0x0 0x80>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
};
ARM: dts: Add missing wdt3 node for omap4 On omap4 we're missing the wdt3 node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-30 23:19:46 +08:00
};
arm/dts: omap4: Add entry for OMAP McPDM IP McPDM is used on OMAP4 based boards to communicate with an external audio codec (twl6040). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:01:59 +08:00
mcpdm: mcpdm@40132000 {
compatible = "ti,omap4-mcpdm";
reg = <0x40132000 0x7f>, /* MPU private access */
<0x49032000 0x7f>; /* L3 Interconnect */
ARM: dts: omap4: Add reg-names for McPDM and DMIC In order to get the memory areas by name when booted with DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-29 21:31:06 +08:00
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: omap4: Add entry for OMAP McPDM IP McPDM is used on OMAP4 based boards to communicate with an external audio codec (twl6040). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:01:59 +08:00
ti,hwmods = "mcpdm";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 65>,
<&sdma 66>;
dma-names = "up_link", "dn_link";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
arm/dts: omap4: Add entry for OMAP McPDM IP McPDM is used on OMAP4 based boards to communicate with an external audio codec (twl6040). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:01:59 +08:00
};
arm/dts: omap4: Add entry for OMAP DMIC IP DMIC IP is used to connect up to 6 digital microphones directly to OMAP. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:02:00 +08:00
dmic: dmic@4012e000 {
compatible = "ti,omap4-dmic";
reg = <0x4012e000 0x7f>, /* MPU private access */
<0x4902e000 0x7f>; /* L3 Interconnect */
ARM: dts: omap4: Add reg-names for McPDM and DMIC In order to get the memory areas by name when booted with DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-08-29 21:31:06 +08:00
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
arm/dts: omap4: Add entry for OMAP DMIC IP DMIC IP is used to connect up to 6 digital microphones directly to OMAP. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:02:00 +08:00
ti,hwmods = "dmic";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 67>;
dma-names = "up_link";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
arm/dts: omap4: Add entry for OMAP DMIC IP DMIC IP is used to connect up to 6 digital microphones directly to OMAP. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-08 22:02:00 +08:00
};
ARM: dts: omap4-sdp: Add keypad data Add keypad data node in omap4 device tree file. Also fill the device tree binding parameters with the required value in "omap4-sdp" dts file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> [b-cousson@ti.com: Re-align the entries and the comments]
2012-08-14 19:15:37 +08:00
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
mcbsp1: mcbsp@40122000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40122000 0xff>, /* MPU private access */
<0x49022000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
interrupt-names = "common";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp1";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 33>,
<&sdma 34>;
dma-names = "tx", "rx";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
};
mcbsp2: mcbsp@40124000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40124000 0xff>, /* MPU private access */
<0x49024000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
interrupt-names = "common";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp2";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 17>,
<&sdma 18>;
dma-names = "tx", "rx";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
};
mcbsp3: mcbsp@40126000 {
compatible = "ti,omap4-mcbsp";
reg = <0x40126000 0xff>, /* MPU private access */
<0x49026000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma";
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
interrupt-names = "common";
ti,buffer-size = <128>;
ti,hwmods = "mcbsp3";
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings Populate DMA client information for McBSP DMIC and McPDM periperhal on OMAP2+ devices. Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-11 15:50:21 +08:00
dmas = <&sdma 19>,
<&sdma 20>;
dma-names = "tx", "rx";
ARM: dts: omap4: Set all audio related IP's status to disabled as default Board dts files will need to enable the IP nodes which they are using and does not have to care about the not used ones (to disable them). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-01-24 16:19:01 +08:00
status = "disabled";
ARM: dts: omap4: Add McBSP entries Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-07-26 22:13:21 +08:00
};
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
target-module@40128000 {
ARM: dts: Add generic ti,sysc compatible in addition to the custom ones Otherwise we cannot use generic OF_DEV_AUXDATA match without listing all the compatibles separately for OF_DEV_AUXDATA. Let's also update the binding accordingly. Let's also fix omap4.dtsi to use "ti,sysc-omap4-sr" compatible as we have documented in the binding. This was not noticed earlier as we're still probing SmartReflex driver with platform data. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-14 08:36:47 +08:00
compatible = "ti,sysc-mcasp", "ti,sysc";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
ti,hwmods = "mcasp";
ARM: dts: Update ti-sysc data for existing users Let's update the existing users with features and clock data as specified in the binding. This is currently the smartreflex for most part, and also few omap4 modules with no child device driver like mcasp, abe iss and gfx. Note that we had few mistakes that did not get noticed as we're still probing the SmartReflex driver with legacy platform data and using "ti,hwmods" legacy property for ti-sysc driver. So let's fix the omap4 and dra7 smartreflex registers as there is no no revision register. And on omap4, the mcasp module has a revision register according to the TRM. And for omap34xx we need a different configuration compared to 36xx. And the smartreflex on 3517 we've always kept disabled so let's remove any references to it. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-01-12 08:04:03 +08:00
reg = <0x40128000 0x4>,
<0x40128004 0x4>;
reg-names = "rev", "sysc";
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
clock-names = "fck";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
<0x49028000 0x49028000 0x1000>; /* L3 */
/*
* Child device unsupported by davinci-mcasp. At least
ARM: dts: Fix typo for omap4 mcasp rx path As reported by Peter Ujfalusi <peter.ujfalusi@ti.com>, the rx path on macsp is disabled and only tx is usable if the davinci-mcasp driver is updated for it. Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-14 00:43:22 +08:00
* RX path is disabled for omap4, and only DIT mode
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
* works with no I2S. See also old Android kernel
* omap-mcasp driver for more information.
*/
};
target-module@4012c000 {
ARM: dts: Add generic ti,sysc compatible in addition to the custom ones Otherwise we cannot use generic OF_DEV_AUXDATA match without listing all the compatibles separately for OF_DEV_AUXDATA. Let's also update the binding accordingly. Let's also fix omap4.dtsi to use "ti,sysc-omap4-sr" compatible as we have documented in the binding. This was not noticed earlier as we're still probing SmartReflex driver with platform data. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-14 08:36:47 +08:00
compatible = "ti,sysc-omap4", "ti,sysc";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
ti,hwmods = "slimbus1";
reg = <0x4012c000 0x4>,
<0x4012c010 0x4>;
reg-names = "rev", "sysc";
ARM: dts: Update ti-sysc data for existing users Let's update the existing users with features and clock data as specified in the binding. This is currently the smartreflex for most part, and also few omap4 modules with no child device driver like mcasp, abe iss and gfx. Note that we had few mistakes that did not get noticed as we're still probing the SmartReflex driver with legacy platform data and using "ti,hwmods" legacy property for ti-sysc driver. So let's fix the omap4 and dra7 smartreflex registers as there is no no revision register. And on omap4, the mcasp module has a revision register according to the TRM. And for omap34xx we need a different configuration compared to 36xx. And the smartreflex on 3517 we've always kept disabled so let's remove any references to it. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-01-12 08:04:03 +08:00
ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
clock-names = "fck";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
<0x4902c000 0x4902c000 0x1000>; /* L3 */
/* No child device binding or driver in mainline */
};
target-module@401f1000 {
ARM: dts: Add generic ti,sysc compatible in addition to the custom ones Otherwise we cannot use generic OF_DEV_AUXDATA match without listing all the compatibles separately for OF_DEV_AUXDATA. Let's also update the binding accordingly. Let's also fix omap4.dtsi to use "ti,sysc-omap4-sr" compatible as we have documented in the binding. This was not noticed earlier as we're still probing SmartReflex driver with platform data. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-14 08:36:47 +08:00
compatible = "ti,sysc-omap4", "ti,sysc";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
ti,hwmods = "aess";
reg = <0x401f1000 0x4>,
<0x401f1010 0x4>;
reg-names = "rev", "sysc";
ARM: dts: Update ti-sysc data for existing users Let's update the existing users with features and clock data as specified in the binding. This is currently the smartreflex for most part, and also few omap4 modules with no child device driver like mcasp, abe iss and gfx. Note that we had few mistakes that did not get noticed as we're still probing the SmartReflex driver with legacy platform data and using "ti,hwmods" legacy property for ti-sysc driver. So let's fix the omap4 and dra7 smartreflex registers as there is no no revision register. And on omap4, the mcasp module has a revision register according to the TRM. And for omap34xx we need a different configuration compared to 36xx. And the smartreflex on 3517 we've always kept disabled so let's remove any references to it. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-01-12 08:04:03 +08:00
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 0>;
clock-names = "fck";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
<0x490f1000 0x490f1000 0x1000>; /* L3 */
/*
* No child device binding or driver in mainline.
* See Android tree and related upstreaming efforts
* for the old driver.
*/
};
ARM: dts: omap4+: Add DMM bindings Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 and DRA7x devices. DMM only requires address and irq information. Add documentation for the DMM bindings. Originally worked on by Andy Gross <andygro@gmail.com> Cc: Andy Gross <andygro@gmail.com> Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-12-17 18:02:21 +08:00
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0 113 0x4>;
ti,hwmods = "dmm";
};
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
emif1: emif@4c000000 {
compatible = "ti,emif-4d";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4c000000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
ti,hwmods = "emif1";
ARM: dts: omap: Add reset/idle on init bindings for OMAP On OMAP we have co-processor IPs, memory controllers, GPIOs which control regulators and power switches to PMIC, and SoC internal Bus IPs, some or most of which should either not be reset or idled or both at init. (In some cases there are erratas which prevent an IP from being reset) Have a way to pass this information from DT. Update the am33xx/omap4 and omap5 dtsi files with the new bindings for modules which either should not be idled. reset or both. A later patch would cleanup the same information that exists today as part of the hwmod data files. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-15 15:07:50 +08:00
ti,no-idle-on-init;
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
phy-type = <1>;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
};
emif2: emif@4d000000 {
compatible = "ti,emif-4d";
ARM: dts: OMAP4: Add reg and interrupts for every nodes Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix (ARM: OMAP: omap_device: Fix up resource names when booted with devicetre), we can now specify reg and interrupts using standard device tree attributes. Update the OMAP4 dtsi file with missing reg and interrupts attributes. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-09-05 17:38:23 +08:00
reg = <0x4d000000 0x100>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
ti,hwmods = "emif2";
ARM: dts: omap: Add reset/idle on init bindings for OMAP On OMAP we have co-processor IPs, memory controllers, GPIOs which control regulators and power switches to PMIC, and SoC internal Bus IPs, some or most of which should either not be reset or idled or both at init. (In some cases there are erratas which prevent an IP from being reset) Have a way to pass this information from DT. Update the am33xx/omap4 and omap5 dtsi files with the new bindings for modules which either should not be idled. reset or both. A later patch would cleanup the same information that exists today as part of the hwmod data files. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-10-15 15:07:50 +08:00
ti,no-idle-on-init;
ARM: dts: EMIF and LPDDR2 device tree data for OMAP4 boards Device tree data for the EMIF sdram controllers in OMAP4 and LPDDR2 memory devices attached to OMAP4 boards. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> [santosh.shilimkar@ti.com: Rebased against 3.6-rc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [b-cousson@ti.com: Use label in board to access EMIF nodes] Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-01-20 23:05:26 +08:00
phy-type = <1>;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
};
ARM: soc: driver specific changes - A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQaO48AAoJEIwa5zzehBx3excP/ieEkRhvfnWxdYST6ekvGIQr nEyskOh2rVjgYKmSXUJyKSbvG+7bZ8VIxvPvojeAJ/R84pTFMzbR2F0CaPKzAuSW inDt6c0Bnx1NZlfUTAoXcz7feyq9zHYNs9BCLoPU0bYNchCCqcWSKzqnpXk2ph/P LFnmNa0j6a4E3QJYAjM2zFvc3Tgk+MWTq1fWwNFvsWTh2WbQtmB/iGnzT5Xs4XQh u1SSx5tz0lcF5zQRGmJhXgL5+nnIP4sRwRUBAkpe3Gv5cM6WBVEBRDANa5QpbUL2 RXK5YyCTIln2Me4bPk32zEBLjiZ/WXbmiA2uwoqVgy6XToubemDXd0PtKmjj5tZ1 BkTD1DND7BKBEQnJj/GBECEdvx2FbrKfruoPcJHvXPZ7Svn5Dt/MWYJQIkRFkuhL zlVNoDGWlU8nScGrgmTM56UvWmGWC3UFsWSgdVQNfW9yEva+G1FvRUwUH02Ip5Ad 4r28JFIn6zyjtM99ZHipU6C6Rze2ordC7fl5X5LBLkVOobioblxCAhIhcqkhfKsk rFriNsdfYs7SrJA7mK7GzvaMEJgp/5o1noJKXI7ZBcLI8yYagzbQbPu/vGi6G6d3 0xC7NaTEJbtoXoDAtmtilLRxmw0YCXgVBBGua0K2YKpcRwnzCHNbV4gsLMnDuOXS HP4M96LxLHJlLGCxhEme =ck7M -----END PGP SIGNATURE----- Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc driver specific changes from Olof Johansson: - A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer Fix up conflicts as per Olof. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: bus: omap_l3: use resources instead of hardcoded irqs pinctrl: exynos: Fix wakeup IRQ domain registration check pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data pinctrl: exynos: Correct the detection of wakeup-eint node pinctrl: exynos: Mark exynos_irq_demux_eint as inline pinctrl: exynos: Handle only unmasked wakeup interrupts pinctrl: exynos: Fix typos in gpio/wkup _irq_mask pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa drivers: bus: Move the OMAP interconnect driver to drivers/bus/ i2c: tegra: dynamically control fast clk i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20 ARM: tegra: clock: remove unused clock entry for i2c ARM: tegra: clock: add connection name in i2c clock entry i2c: tegra: pass proper name for getting clock ARM: tegra: clock: add i2c fast clock entry in clock table ARM: EXYNOS: Adds G-Scaler device from Device Tree ARM: EXYNOS: Add clock support for G-Scaler ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used ...
2012-10-02 09:46:13 +08:00
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
timer5: timer@40138000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
reg = <0x40138000 0x80>,
<0x49038000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer5";
ti,timer-dsp;
};
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
timer6: timer@4013a000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
reg = <0x4013a000 0x80>,
<0x4903a000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer6";
ti,timer-dsp;
};
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
timer7: timer@4013c000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
reg = <0x4013c000 0x80>,
<0x4903c000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer7";
ti,timer-dsp;
};
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
timer8: timer@4013e000 {
ARM: dts: OMAP2+: Update DMTIMER compatibility property Update the DMTIMER compatibility property to reflect the register level compatibilty between devices and update the various OMAP/AM timer bindings with the appropriate compatibility string. By doing this we can add platform specific data applicable to specific timer versions to the driver. For example, errata flags can be populated for the timer versions that are impacted. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-03-20 01:38:18 +08:00
compatible = "ti,omap4430-timer";
ARM: dts: OMAP4: Update timer addresses For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-11-01 21:57:08 +08:00
reg = <0x4013e000 0x80>,
<0x4903e000 0x80>;
ARM: dts: OMAP4/5: Use existing constants for IRQs Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-05-31 20:32:57 +08:00
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
ARM: dts: OMAP: Add timer nodes Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
2012-10-19 22:59:00 +08:00
ti,hwmods = "timer8";
ti,timer-pwm;
ti,timer-dsp;
};
ARM: dts: omap4: Fix aes entry OMAP4 has a second aes module, so let's use proper name for the first instance. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-13 17:28:43 +08:00
aes1: aes@4b501000 {
ARM: dts: OMAP4: Add AES node OMAP4 has an AES module that uses the omap-aes crypto driver. Add DT entries for the same. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-07-12 07:20:05 +08:00
compatible = "ti,omap4-aes";
ARM: dts: omap4: Fix aes entry OMAP4 has a second aes module, so let's use proper name for the first instance. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-13 17:28:43 +08:00
ti,hwmods = "aes1";
ARM: dts: OMAP4: Add AES node OMAP4 has an AES module that uses the omap-aes crypto driver. Add DT entries for the same. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-07-12 07:20:05 +08:00
reg = <0x4b501000 0xa0>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 111>, <&sdma 110>;
dma-names = "tx", "rx";
};
ARM: dts: OMAP4: Add DES3DES node OMAP4 has an DES3DES module that uses the omap-des crypto driver. Add DT entries for the same. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-09-25 04:23:33 +08:00
ARM: dts: omap4: add aes2 instance OMAP4 has AES2 instance, so add its integration data under DT. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-13 21:45:48 +08:00
aes2: aes@4b701000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes2";
reg = <0x4b701000 0xa0>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 114>, <&sdma 113>;
dma-names = "tx", "rx";
};
ARM: dts: OMAP4: Add DES3DES node OMAP4 has an DES3DES module that uses the omap-des crypto driver. Add DT entries for the same. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
2013-09-25 04:23:33 +08:00
des: des@480a5000 {
compatible = "ti,omap4-des";
ti,hwmods = "des";
reg = <0x480a5000 0xa0>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 117>, <&sdma 116>;
dma-names = "tx", "rx";
};
ARM: dts: OMAP4: Add device nodes for ABB Add ABB device nodes for OMAP443x family of devices. abb_iva is populated, but disabled as it is not used on current OMAP443x family, but the node is used on OMAP446x family. Data is based on OMAP443x Technical Reference Manual revision AN (April 2013). ABB device nodes for OMAP4460 device Data is based on OMAP4460 Technical Reference Manual revision Z (April 2013) [nm@ti.com: co-developer] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-03 22:50:22 +08:00
ARM: dts: omap4: add SHAM node Add SHAM crypto accelerator. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-13 21:45:49 +08:00
sham: sham@4b100000 {
compatible = "ti,omap4-sham";
ti,hwmods = "sham";
reg = <0x4b100000 0x300>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 119>;
dma-names = "rx";
};
ARM: dts: OMAP4: Add device nodes for ABB Add ABB device nodes for OMAP443x family of devices. abb_iva is populated, but disabled as it is not used on current OMAP443x family, but the node is used on OMAP446x family. Data is based on OMAP443x Technical Reference Manual revision AN (April 2013). ABB device nodes for OMAP4460 device Data is based on OMAP4460 Technical Reference Manual revision Z (April 2013) [nm@ti.com: co-developer] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-03 22:50:22 +08:00
abb_mpu: regulator-abb-mpu {
compatible = "ti,abb-v2";
regulator-name = "abb_mpu";
#address-cells = <0>;
#size-cells = <0>;
ti,tranxdone-status-mask = <0x80>;
clocks = <&sys_clkin_ck>;
ti,settling-time = <50>;
ti,clock-cycles = <16>;
status = "disabled";
};
abb_iva: regulator-abb-iva {
compatible = "ti,abb-v2";
regulator-name = "abb_iva";
#address-cells = <0>;
#size-cells = <0>;
ti,tranxdone-status-mask = <0x80000000>;
clocks = <&sys_clkin_ck>;
ti,settling-time = <50>;
ti,clock-cycles = <16>;
status = "disabled";
};
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
target-module@56000000 {
ARM: dts: Add generic ti,sysc compatible in addition to the custom ones Otherwise we cannot use generic OF_DEV_AUXDATA match without listing all the compatibles separately for OF_DEV_AUXDATA. Let's also update the binding accordingly. Let's also fix omap4.dtsi to use "ti,sysc-omap4-sr" compatible as we have documented in the binding. This was not noticed earlier as we're still probing SmartReflex driver with platform data. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-14 08:36:47 +08:00
compatible = "ti,sysc-omap4", "ti,sysc";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
ti,hwmods = "gpu";
reg = <0x5601fc00 0x4>,
<0x5601fc10 0x4>;
reg-names = "rev", "sysc";
ARM: dts: Update ti-sysc data for existing users Let's update the existing users with features and clock data as specified in the binding. This is currently the smartreflex for most part, and also few omap4 modules with no child device driver like mcasp, abe iss and gfx. Note that we had few mistakes that did not get noticed as we're still probing the SmartReflex driver with legacy platform data and using "ti,hwmods" legacy property for ti-sysc driver. So let's fix the omap4 and dra7 smartreflex registers as there is no no revision register. And on omap4, the mcasp module has a revision register according to the TRM. And for omap34xx we need a different configuration compared to 36xx. And the smartreflex on 3517 we've always kept disabled so let's remove any references to it. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-01-12 08:04:03 +08:00
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
clock-names = "fck";
ARM: dts: Add nodes for missing omap4 interconnect target modules On omap4 we are missing dts nodes for several interconnect target modules that we are idling on init. This currently works with the legacy platform data still around. To fix this, let's add the interconnect target modules so we can idle the unused interconnect target module on init. Also note that adding the interconnect target module node does not necessarily mean that there is a driver available for the child IP block, or that the child IP block is even functional. In the SGX case, the PowerVR driver is closed source. And McASP on omap4 has at least the TX path disabled and is not supported by the davinci-mcasp driver. For AESS there is old Android 3.4 kernel driver available. For smarflex, we are still probing with platform data and the driver needs more work before we can add the device ip child nodes. And finally, we're not yet using the interconnet ranges. I will be posting separate patches for those later on. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-11 05:14:50 +08:00
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x56000000 0x2000000>;
/*
* Closed source PowerVR driver, no child device
* binding or driver in mainline
*/
};
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
dss: dss@58000000 {
compatible = "ti,omap4-dss";
reg = <0x58000000 0x80>;
status = "disabled";
ti,hwmods = "dss_core";
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges;
dispc@58001000 {
compatible = "ti,omap4-dispc";
reg = <0x58001000 0x1000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "dss_dispc";
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
clock-names = "fck";
};
rfbi: encoder@58002000 {
compatible = "ti,omap4-rfbi";
reg = <0x58002000 0x1000>;
status = "disabled";
ti,hwmods = "dss_rfbi";
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>, <&l3_div_ck>;
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
clock-names = "fck", "ick";
};
venc: encoder@58003000 {
compatible = "ti,omap4-venc";
reg = <0x58003000 0x1000>;
status = "disabled";
ti,hwmods = "dss_venc";
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
clock-names = "fck";
};
dsi1: encoder@58004000 {
compatible = "ti,omap4-dsi";
reg = <0x58004000 0x200>,
<0x58004200 0x40>,
<0x58004300 0x20>;
reg-names = "proto", "phy", "pll";
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_dsi1";
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
<&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
clock-names = "fck", "sys_clk";
};
dsi2: encoder@58005000 {
compatible = "ti,omap4-dsi";
reg = <0x58005000 0x200>,
<0x58005200 0x40>,
<0x58005300 0x20>;
reg-names = "proto", "phy", "pll";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_dsi2";
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
<&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
clock-names = "fck", "sys_clk";
};
hdmi: encoder@58006000 {
compatible = "ti,omap4-hdmi";
reg = <0x58006000 0x200>,
<0x58006200 0x100>,
<0x58006300 0x100>,
<0x58006400 0x1000>;
reg-names = "wp", "pll", "phy", "core";
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_hdmi";
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
<&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
clock-names = "fck", "sys_clk";
ARM: omap4.dtsi: Add audio related parametes to hdmi node Adds HDMI audio sDMA properties. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2014-05-12 17:12:24 +08:00
dmas = <&sdma 76>;
dma-names = "audio_tx";
ARM: omap4.dtsi: add omapdss information Add DT data for OMAP4 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder (two independent modules) rfbi - MIPI DBI encoder venc - analog TV encoder hdmi - HDMI encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2012-08-21 20:34:50 +08:00
};
};
arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: G, Manjunath Kondaiah <manjugk@ti.com>
2011-08-09 23:15:17 +08:00
};
};
ARM: dts: omap4 clock data This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-18 17:42:02 +08:00
ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc With l4 interconnect hierarchy and ti-sysc interconnect target module data in place, we can simply move all the related child devices to their proper location and enable probing using ti-sysc. In general the first child device address range starts at range 0 from the ti-sysc interconnect target so the move involves adjusting the child device reg properties for that. And we cannot yet move mmu_dsp until we have a proper reset controller driver for rstctrl registers. In case of any regressions, problem devices can be reverted to probe with legacy platform data as needed by moving them back and removing the related interconnect target module node. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-06 14:19:37 +08:00
#include "omap4-l4.dtsi"
ARM: dts: omap4: add clkctrl nodes Add clkctrl nodes for OMAP4 SoC. These are going to be acting as replacement for part of the existing clock data and the existing clkctrl hooks under hwmod data. This patch also removes any obsolete clock nodes, and reroutes all users for these to use the new clkctrl clocks instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-08 23:17:27 +08:00
#include "omap44xx-clocks.dtsi"
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