2018-03-15 19:03:52 +08:00
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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2015-01-09 02:11:33 +08:00
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/*
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* Device Tree file for Marvell Armada 385 development board
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* (RD-88F6820-GP)
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*
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* Copyright (C) 2014 Marvell
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*
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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*/
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/dts-v1/;
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#include "armada-388.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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2015-12-21 22:41:55 +08:00
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model = "Marvell Armada 388 DB-88F6820-GP";
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compatible = "marvell,a388-gp", "marvell,armada388", "marvell,armada380";
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2015-01-09 02:11:33 +08:00
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chosen {
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2015-03-03 22:41:02 +08:00
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stdout-path = "serial0:115200n8";
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2015-01-09 02:11:33 +08:00
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x80000000>; /* 2 GB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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2015-08-18 16:08:59 +08:00
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MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
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2016-03-14 16:38:58 +08:00
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MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
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MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
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2015-01-09 02:11:33 +08:00
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internal-regs {
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i2c@11000 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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clock-frequency = <100000>;
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expander0: pca9555@20 {
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compatible = "nxp,pca9555";
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pinctrl-names = "default";
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pinctrl-0 = <&pca0_pins>;
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interrupt-parent = <&gpio0>;
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2017-07-12 19:23:11 +08:00
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interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
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2015-01-09 02:11:33 +08:00
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x20>;
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};
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expander1: pca9555@21 {
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compatible = "nxp,pca9555";
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pinctrl-names = "default";
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interrupt-parent = <&gpio0>;
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2017-07-12 19:23:11 +08:00
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interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
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2015-01-09 02:11:33 +08:00
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x21>;
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};
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2015-06-18 20:38:40 +08:00
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eeprom@57 {
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compatible = "atmel,24c64";
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reg = <0x57>;
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};
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2015-01-09 02:11:33 +08:00
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};
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serial@12000 {
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/*
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* Exported on the micro USB connector CON16
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* through an FTDI
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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/* GE1 CON15 */
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ethernet@30000 {
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pinctrl-names = "default";
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pinctrl-0 = <&ge1_rgmii_pins>;
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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2016-03-14 16:38:58 +08:00
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buffer-manager = <&bm>;
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bm,pool-long = <2>;
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bm,pool-short = <3>;
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2015-01-09 02:11:33 +08:00
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};
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/* CON4 */
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2015-03-03 22:40:57 +08:00
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usb@58000 {
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2015-01-09 02:11:33 +08:00
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vcc-supply = <®_usb2_0_vbus>;
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status = "okay";
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};
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/* GE0 CON1 */
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ethernet@70000 {
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pinctrl-names = "default";
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/*
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* The Reference Clock 0 is used to provide a
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* clock to the PHY
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*/
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pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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2016-03-14 16:38:58 +08:00
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buffer-manager = <&bm>;
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bm,pool-long = <0>;
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bm,pool-short = <1>;
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2015-01-09 02:11:33 +08:00
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};
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mdio@72004 {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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phy0: ethernet-phy@1 {
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reg = <1>;
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};
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phy1: ethernet-phy@0 {
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reg = <0>;
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};
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};
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sata@a8000 {
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pinctrl-names = "default";
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pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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2015-01-15 22:09:38 +08:00
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sata0: sata-port@0 {
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reg = <0>;
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target-supply = <®_5v_sata0>;
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};
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sata1: sata-port@1 {
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reg = <1>;
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target-supply = <®_5v_sata1>;
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};
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2015-01-09 02:11:33 +08:00
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};
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2016-03-14 16:38:58 +08:00
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bm@c8000 {
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status = "okay";
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};
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2015-01-09 02:11:33 +08:00
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sata@e0000 {
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pinctrl-names = "default";
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pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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2015-01-15 22:09:38 +08:00
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sata2: sata-port@0 {
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reg = <0>;
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target-supply = <®_5v_sata2>;
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};
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sata3: sata-port@1 {
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reg = <1>;
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target-supply = <®_5v_sata3>;
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};
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2015-01-09 02:11:33 +08:00
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};
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sdhci@d8000 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdhci_pins>;
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no-1-8-v;
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2015-10-16 00:25:44 +08:00
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/*
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* A388-GP board v1.5 and higher replace
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* hitherto card detection method based on GPIO
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* with the one using DAT3 pin. As they are
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* incompatible, software-based polling is
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* enabled with 'broken-cd' property. For boards
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* older than v1.5 it can be replaced with:
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* 'cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;',
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* whereas for the newer ones following can be
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* used instead:
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* 'dat3-cd;'
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* 'cd-inverted;'
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*/
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broken-cd;
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2015-01-09 02:11:33 +08:00
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wp-inverted;
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bus-width = <8>;
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status = "okay";
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};
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/* CON5 */
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usb3@f0000 {
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2015-12-23 22:05:41 +08:00
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usb-phy = <&usb2_1_phy>;
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2015-01-09 02:11:33 +08:00
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status = "okay";
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};
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/* CON7 */
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usb3@f8000 {
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2015-12-23 22:05:41 +08:00
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usb-phy = <&usb3_phy>;
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2015-01-09 02:11:33 +08:00
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status = "okay";
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};
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};
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2016-03-14 16:38:58 +08:00
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bm-bppi {
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status = "okay";
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};
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2017-07-27 05:09:37 +08:00
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pcie {
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2015-01-09 02:11:33 +08:00
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status = "okay";
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/*
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* One PCIe units is accessible through
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* standard PCIe slot on the board.
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*/
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/*
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* The two other PCIe units are accessible
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* through mini PCIe slot on the board.
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*/
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pcie@2,0 {
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/* Port 1, Lane 0 */
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status = "okay";
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};
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pcie@3,0 {
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/* Port 2, Lane 0 */
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status = "okay";
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};
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};
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gpio-fan {
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compatible = "gpio-fan";
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gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
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gpio-fan,speed-map = < 0 0
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3000 1>;
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};
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};
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2015-12-23 22:05:41 +08:00
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usb2_1_phy: usb2_1_phy {
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compatible = "usb-nop-xceiv";
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vcc-supply = <®_usb2_1_vbus>;
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2017-11-10 06:26:11 +08:00
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#phy-cells = <0>;
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2015-12-23 22:05:41 +08:00
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};
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usb3_phy: usb3_phy {
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compatible = "usb-nop-xceiv";
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vcc-supply = <®_usb3_vbus>;
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2017-11-10 06:26:11 +08:00
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#phy-cells = <0>;
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2015-12-23 22:05:41 +08:00
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};
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2015-01-09 02:11:33 +08:00
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reg_usb3_vbus: usb3-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb3-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
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};
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reg_usb2_0_vbus: v5-vbus0 {
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compatible = "regulator-fixed";
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regulator-name = "v5.0-vbus0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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regulator-always-on;
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gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
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};
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reg_usb2_1_vbus: v5-vbus1 {
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compatible = "regulator-fixed";
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regulator-name = "v5.0-vbus1";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
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};
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2015-01-15 22:09:38 +08:00
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reg_sata0: pwr-sata0 {
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compatible = "regulator-fixed";
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regulator-name = "pwr_en_sata0";
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2015-06-18 20:38:39 +08:00
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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2015-01-15 22:09:38 +08:00
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enable-active-high;
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ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
Really, what we meant by regulator-always-on is that the regulators
are already turned on by the bootloader, for which regulator-boot-on
is a better description.
A net advantage of using regulator-boot-on is that the regulator is
not touched at boot time by the kernel, which avoids having the hard
drives spinning down and then up again, taking several (~5) seconds of
additional boot time.
In addition, there is no need to have such properties on the child
regulators used for SATA. Having it on the parent regulator that
really controls the GPIO is sufficient.
Without the patch:
[ 3.945866] ata2: SATA link down (SStatus 0 SControl 300)
[ 3.995862] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.005863] ata4: SATA link down (SStatus 0 SControl 300)
[ 9.125861] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 9.144575] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 9.151471] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
(and you can hear the disk spinning down and up during this 5.1
seconds delay)
With the patch:
[ 3.945988] ata2: SATA link down (SStatus 0 SControl 300)
[ 4.005980] ata4: SATA link down (SStatus 0 SControl 300)
[ 4.011404] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.145978] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 4.153701] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 4.160597] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-12-22 22:28:42 +08:00
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regulator-boot-on;
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2015-06-18 20:38:39 +08:00
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gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
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2015-01-15 22:09:38 +08:00
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};
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|
|
|
|
|
|
|
|
|
reg_5v_sata0: v5-sata0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "v5.0-sata0";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
vin-supply = <®_sata0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_12v_sata0: v12-sata0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "v12.0-sata0";
|
|
|
|
|
regulator-min-microvolt = <12000000>;
|
|
|
|
|
regulator-max-microvolt = <12000000>;
|
|
|
|
|
vin-supply = <®_sata0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_sata1: pwr-sata1 {
|
|
|
|
|
regulator-name = "pwr_en_sata1";
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-min-microvolt = <12000000>;
|
|
|
|
|
regulator-max-microvolt = <12000000>;
|
|
|
|
|
enable-active-high;
|
ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
Really, what we meant by regulator-always-on is that the regulators
are already turned on by the bootloader, for which regulator-boot-on
is a better description.
A net advantage of using regulator-boot-on is that the regulator is
not touched at boot time by the kernel, which avoids having the hard
drives spinning down and then up again, taking several (~5) seconds of
additional boot time.
In addition, there is no need to have such properties on the child
regulators used for SATA. Having it on the parent regulator that
really controls the GPIO is sufficient.
Without the patch:
[ 3.945866] ata2: SATA link down (SStatus 0 SControl 300)
[ 3.995862] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.005863] ata4: SATA link down (SStatus 0 SControl 300)
[ 9.125861] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 9.144575] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 9.151471] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
(and you can hear the disk spinning down and up during this 5.1
seconds delay)
With the patch:
[ 3.945988] ata2: SATA link down (SStatus 0 SControl 300)
[ 4.005980] ata4: SATA link down (SStatus 0 SControl 300)
[ 4.011404] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.145978] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 4.153701] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 4.160597] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-12-22 22:28:42 +08:00
|
|
|
regulator-boot-on;
|
2015-01-15 22:09:38 +08:00
|
|
|
gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_5v_sata1: v5-sata1 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "v5.0-sata1";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
vin-supply = <®_sata1>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_12v_sata1: v12-sata1 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "v12.0-sata1";
|
|
|
|
|
regulator-min-microvolt = <12000000>;
|
|
|
|
|
regulator-max-microvolt = <12000000>;
|
|
|
|
|
vin-supply = <®_sata1>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_sata2: pwr-sata2 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "pwr_en_sata2";
|
|
|
|
|
enable-active-high;
|
ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
Really, what we meant by regulator-always-on is that the regulators
are already turned on by the bootloader, for which regulator-boot-on
is a better description.
A net advantage of using regulator-boot-on is that the regulator is
not touched at boot time by the kernel, which avoids having the hard
drives spinning down and then up again, taking several (~5) seconds of
additional boot time.
In addition, there is no need to have such properties on the child
regulators used for SATA. Having it on the parent regulator that
really controls the GPIO is sufficient.
Without the patch:
[ 3.945866] ata2: SATA link down (SStatus 0 SControl 300)
[ 3.995862] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.005863] ata4: SATA link down (SStatus 0 SControl 300)
[ 9.125861] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 9.144575] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 9.151471] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
(and you can hear the disk spinning down and up during this 5.1
seconds delay)
With the patch:
[ 3.945988] ata2: SATA link down (SStatus 0 SControl 300)
[ 4.005980] ata4: SATA link down (SStatus 0 SControl 300)
[ 4.011404] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.145978] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 4.153701] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 4.160597] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-12-22 22:28:42 +08:00
|
|
|
regulator-boot-on;
|
2015-01-15 22:09:38 +08:00
|
|
|
gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_5v_sata2: v5-sata2 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "v5.0-sata2";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
vin-supply = <®_sata2>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_12v_sata2: v12-sata2 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "v12.0-sata2";
|
|
|
|
|
regulator-min-microvolt = <12000000>;
|
|
|
|
|
regulator-max-microvolt = <12000000>;
|
|
|
|
|
vin-supply = <®_sata2>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_sata3: pwr-sata3 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "pwr_en_sata3";
|
|
|
|
|
enable-active-high;
|
ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
Really, what we meant by regulator-always-on is that the regulators
are already turned on by the bootloader, for which regulator-boot-on
is a better description.
A net advantage of using regulator-boot-on is that the regulator is
not touched at boot time by the kernel, which avoids having the hard
drives spinning down and then up again, taking several (~5) seconds of
additional boot time.
In addition, there is no need to have such properties on the child
regulators used for SATA. Having it on the parent regulator that
really controls the GPIO is sufficient.
Without the patch:
[ 3.945866] ata2: SATA link down (SStatus 0 SControl 300)
[ 3.995862] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.005863] ata4: SATA link down (SStatus 0 SControl 300)
[ 9.125861] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 9.144575] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 9.151471] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
(and you can hear the disk spinning down and up during this 5.1
seconds delay)
With the patch:
[ 3.945988] ata2: SATA link down (SStatus 0 SControl 300)
[ 4.005980] ata4: SATA link down (SStatus 0 SControl 300)
[ 4.011404] ata3: SATA link down (SStatus 0 SControl 300)
[ 4.145978] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 4.153701] ata1.00: ATA-8: WDC WD5003ABYX-01WERA1, 01.01S02, max UDMA/133
[ 4.160597] ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 31/32)
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-12-22 22:28:42 +08:00
|
|
|
regulator-boot-on;
|
2015-01-15 22:09:38 +08:00
|
|
|
gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_5v_sata3: v5-sata3 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "v5.0-sata3";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
vin-supply = <®_sata3>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
reg_12v_sata3: v12-sata3 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "v12.0-sata3";
|
|
|
|
|
regulator-min-microvolt = <12000000>;
|
|
|
|
|
regulator-max-microvolt = <12000000>;
|
|
|
|
|
vin-supply = <®_sata3>;
|
|
|
|
|
};
|
2015-01-09 02:11:33 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&pinctrl {
|
|
|
|
|
pca0_pins: pca0_pins {
|
|
|
|
|
marvell,pins = "mpp18";
|
|
|
|
|
marvell,function = "gpio";
|
|
|
|
|
};
|
|
|
|
|
};
|
2016-07-13 17:55:18 +08:00
|
|
|
|
|
|
|
|
&spi0 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&spi0_pins>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
spi-flash@0 {
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
compatible = "st,m25p128", "jedec,spi-nor";
|
|
|
|
|
reg = <0>; /* Chip select 0 */
|
|
|
|
|
spi-max-frequency = <50000000>;
|
|
|
|
|
m25p,fast-read;
|
|
|
|
|
};
|
|
|
|
|
};
|
