2018-07-26 10:37:32 +08:00
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// SPDX-License-Identifier: GPL-2.0+
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2013-06-19 19:54:11 +08:00
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/*
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* rcar_du_drv.c -- R-Car Display Unit DRM driver
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*
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2015-09-07 22:34:26 +08:00
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* Copyright (C) 2013-2015 Renesas Electronics Corporation
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2013-06-19 19:54:11 +08:00
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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2014-01-21 22:57:26 +08:00
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#include <linux/of_device.h>
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2013-06-19 19:54:11 +08:00
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/slab.h>
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2015-02-23 07:02:15 +08:00
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#include <linux/wait.h>
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2013-06-19 19:54:11 +08:00
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#include <drm/drmP.h>
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2017-09-16 00:42:06 +08:00
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#include <drm/drm_atomic_helper.h>
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2013-06-19 19:54:11 +08:00
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#include <drm/drm_crtc_helper.h>
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2013-03-15 05:45:22 +08:00
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#include <drm/drm_fb_cma_helper.h>
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2013-06-19 19:54:11 +08:00
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#include <drm/drm_gem_cma_helper.h>
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#include "rcar_du_drv.h"
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#include "rcar_du_kms.h"
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2018-01-10 11:47:42 +08:00
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#include "rcar_du_of.h"
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2013-06-19 19:54:11 +08:00
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#include "rcar_du_regs.h"
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2014-01-21 22:57:26 +08:00
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/* -----------------------------------------------------------------------------
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* Device Information
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*/
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2017-10-13 23:22:20 +08:00
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static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
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.gen = 2,
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(1) | BIT(0),
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2017-10-13 23:22:20 +08:00
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.routes = {
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/*
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* R8A7743 has one RGB output and one LVDS output
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(1) | BIT(0),
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.port = 0,
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},
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[RCAR_DU_OUTPUT_LVDS0] = {
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.possible_crtcs = BIT(0),
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.port = 1,
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},
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},
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.num_lvds = 1,
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};
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2017-10-13 23:22:22 +08:00
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static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
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.gen = 2,
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(1) | BIT(0),
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2017-10-13 23:22:22 +08:00
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.routes = {
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/*
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* R8A7745 has two RGB outputs
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(0),
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.port = 0,
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},
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[RCAR_DU_OUTPUT_DPAD1] = {
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.possible_crtcs = BIT(1),
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.port = 1,
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},
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},
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};
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2014-01-21 22:57:26 +08:00
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static const struct rcar_du_device_info rcar_du_r8a7779_info = {
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2015-09-07 22:34:26 +08:00
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.gen = 2,
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2018-08-21 00:00:44 +08:00
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.features = RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(1) | BIT(0),
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2014-01-21 22:57:26 +08:00
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.routes = {
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2017-07-11 06:13:20 +08:00
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/*
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* R8A7779 has two RGB outputs and one (currently unsupported)
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2014-01-21 22:57:26 +08:00
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* TCON output.
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(0),
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.port = 0,
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},
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[RCAR_DU_OUTPUT_DPAD1] = {
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.possible_crtcs = BIT(1) | BIT(0),
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.port = 1,
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},
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},
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};
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static const struct rcar_du_device_info rcar_du_r8a7790_info = {
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2015-09-07 22:34:26 +08:00
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.gen = 2,
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2014-12-09 06:21:12 +08:00
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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| RCAR_DU_FEATURE_INTERLACED,
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2018-01-10 11:47:42 +08:00
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.quirks = RCAR_DU_QUIRK_ALIGN_128B,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(2) | BIT(1) | BIT(0),
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2014-01-21 22:57:26 +08:00
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.routes = {
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2017-07-11 06:13:20 +08:00
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/*
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* R8A7790 has one RGB output, two LVDS outputs and one
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2014-01-21 22:57:26 +08:00
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* (currently unsupported) TCON output.
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(2) | BIT(1) | BIT(0),
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.port = 0,
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},
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[RCAR_DU_OUTPUT_LVDS0] = {
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.possible_crtcs = BIT(0),
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.port = 1,
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},
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[RCAR_DU_OUTPUT_LVDS1] = {
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.possible_crtcs = BIT(2) | BIT(1),
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.port = 2,
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},
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},
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.num_lvds = 2,
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};
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2015-07-17 15:44:33 +08:00
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/* M2-W (r8a7791) and M2-N (r8a7793) are identical */
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2014-01-21 22:57:26 +08:00
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static const struct rcar_du_device_info rcar_du_r8a7791_info = {
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2015-09-07 22:34:26 +08:00
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.gen = 2,
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2014-12-09 06:21:12 +08:00
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(1) | BIT(0),
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2014-01-21 22:57:26 +08:00
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.routes = {
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2017-07-11 06:13:20 +08:00
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/*
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* R8A779[13] has one RGB output, one LVDS output and one
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2014-01-21 22:57:26 +08:00
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* (currently unsupported) TCON output.
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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2015-04-28 20:26:33 +08:00
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.possible_crtcs = BIT(1) | BIT(0),
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2014-01-21 22:57:26 +08:00
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.port = 0,
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},
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[RCAR_DU_OUTPUT_LVDS0] = {
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.possible_crtcs = BIT(0),
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.port = 1,
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},
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},
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.num_lvds = 1,
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};
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2016-08-05 06:01:02 +08:00
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static const struct rcar_du_device_info rcar_du_r8a7792_info = {
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.gen = 2,
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(1) | BIT(0),
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2016-08-05 06:01:02 +08:00
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.routes = {
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/* R8A7792 has two RGB outputs. */
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(0),
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.port = 0,
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},
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[RCAR_DU_OUTPUT_DPAD1] = {
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.possible_crtcs = BIT(1),
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.port = 1,
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},
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},
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};
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2015-07-17 15:44:33 +08:00
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static const struct rcar_du_device_info rcar_du_r8a7794_info = {
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2015-09-07 22:34:26 +08:00
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.gen = 2,
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2015-07-17 15:44:33 +08:00
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(1) | BIT(0),
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2015-07-17 15:44:33 +08:00
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.routes = {
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2017-07-11 06:13:20 +08:00
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/*
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* R8A7794 has two RGB outputs and one (currently unsupported)
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2015-07-17 15:44:33 +08:00
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* TCON output.
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(0),
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.port = 0,
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},
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[RCAR_DU_OUTPUT_DPAD1] = {
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.possible_crtcs = BIT(1),
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.port = 1,
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},
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},
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};
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2015-09-07 22:34:26 +08:00
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static const struct rcar_du_device_info rcar_du_r8a7795_info = {
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.gen = 3,
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_VSP1_SOURCE
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
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2015-09-07 22:34:26 +08:00
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.routes = {
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2017-07-11 06:13:20 +08:00
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/*
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* R8A7795 has one RGB output, two HDMI outputs and one
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2016-11-12 01:07:39 +08:00
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* LVDS output.
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2015-09-07 22:34:26 +08:00
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(3),
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.port = 0,
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},
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2016-11-12 01:07:39 +08:00
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[RCAR_DU_OUTPUT_HDMI0] = {
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.possible_crtcs = BIT(1),
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.port = 1,
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},
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[RCAR_DU_OUTPUT_HDMI1] = {
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.possible_crtcs = BIT(2),
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.port = 2,
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},
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2015-07-28 19:12:43 +08:00
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[RCAR_DU_OUTPUT_LVDS0] = {
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.possible_crtcs = BIT(0),
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.port = 3,
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},
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2015-09-07 22:34:26 +08:00
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},
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2015-07-28 19:12:43 +08:00
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.num_lvds = 1,
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2018-08-22 15:21:47 +08:00
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.dpll_mask = BIT(2) | BIT(1),
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2015-09-07 22:34:26 +08:00
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};
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2016-09-06 07:11:43 +08:00
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static const struct rcar_du_device_info rcar_du_r8a7796_info = {
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.gen = 3,
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_VSP1_SOURCE
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(2) | BIT(1) | BIT(0),
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2016-09-06 07:11:43 +08:00
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.routes = {
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2017-07-11 06:13:20 +08:00
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/*
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2017-06-20 04:34:40 +08:00
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* R8A7796 has one RGB output, one LVDS output and one HDMI
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* output.
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2016-09-06 07:11:43 +08:00
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(2),
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.port = 0,
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},
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2017-06-20 04:34:40 +08:00
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[RCAR_DU_OUTPUT_HDMI0] = {
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.possible_crtcs = BIT(1),
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.port = 1,
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},
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2016-09-06 07:11:43 +08:00
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[RCAR_DU_OUTPUT_LVDS0] = {
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.possible_crtcs = BIT(0),
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.port = 2,
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},
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},
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.num_lvds = 1,
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2018-08-22 15:21:47 +08:00
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.dpll_mask = BIT(1),
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2016-09-06 07:11:43 +08:00
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};
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2018-04-28 06:21:54 +08:00
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static const struct rcar_du_device_info rcar_du_r8a77965_info = {
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.gen = 3,
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_VSP1_SOURCE
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:54 +08:00
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.channels_mask = BIT(3) | BIT(1) | BIT(0),
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.routes = {
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/*
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* R8A77965 has one RGB output, one LVDS output and one HDMI
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* output.
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(2),
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.port = 0,
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},
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[RCAR_DU_OUTPUT_HDMI0] = {
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.possible_crtcs = BIT(1),
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.port = 1,
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},
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[RCAR_DU_OUTPUT_LVDS0] = {
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.possible_crtcs = BIT(0),
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.port = 2,
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},
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},
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.num_lvds = 1,
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2018-08-22 15:21:47 +08:00
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.dpll_mask = BIT(1),
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2018-04-28 06:21:54 +08:00
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};
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2018-01-19 05:05:59 +08:00
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static const struct rcar_du_device_info rcar_du_r8a77970_info = {
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.gen = 3,
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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| RCAR_DU_FEATURE_EXT_CTRL_REGS
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2018-08-21 00:00:44 +08:00
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| RCAR_DU_FEATURE_VSP1_SOURCE
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| RCAR_DU_FEATURE_INTERLACED,
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2018-04-28 06:21:52 +08:00
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.channels_mask = BIT(0),
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2018-01-19 05:05:59 +08:00
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.routes = {
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/* R8A77970 has one RGB output and one LVDS output. */
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[RCAR_DU_OUTPUT_DPAD0] = {
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.possible_crtcs = BIT(0),
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.port = 0,
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},
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|
|
|
[RCAR_DU_OUTPUT_LVDS0] = {
|
|
|
|
.possible_crtcs = BIT(0),
|
|
|
|
.port = 1,
|
|
|
|
},
|
|
|
|
},
|
|
|
|
.num_lvds = 1,
|
|
|
|
};
|
|
|
|
|
2014-01-21 22:57:26 +08:00
|
|
|
static const struct of_device_id rcar_du_of_table[] = {
|
2017-10-13 23:22:20 +08:00
|
|
|
{ .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
|
2017-10-13 23:22:22 +08:00
|
|
|
{ .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info },
|
2014-01-21 22:57:26 +08:00
|
|
|
{ .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
|
|
|
|
{ .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
|
|
|
|
{ .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
|
2016-08-05 06:01:02 +08:00
|
|
|
{ .compatible = "renesas,du-r8a7792", .data = &rcar_du_r8a7792_info },
|
2015-07-17 15:44:33 +08:00
|
|
|
{ .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
|
2015-07-17 15:44:33 +08:00
|
|
|
{ .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
|
2015-09-07 22:34:26 +08:00
|
|
|
{ .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
|
2016-09-06 07:11:43 +08:00
|
|
|
{ .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },
|
2018-04-28 06:21:54 +08:00
|
|
|
{ .compatible = "renesas,du-r8a77965", .data = &rcar_du_r8a77965_info },
|
2018-01-19 05:05:59 +08:00
|
|
|
{ .compatible = "renesas,du-r8a77970", .data = &rcar_du_r8a77970_info },
|
2014-01-21 22:57:26 +08:00
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_DEVICE_TABLE(of, rcar_du_of_table);
|
|
|
|
|
2013-06-19 19:54:11 +08:00
|
|
|
/* -----------------------------------------------------------------------------
|
|
|
|
* DRM operations
|
|
|
|
*/
|
|
|
|
|
2013-03-15 05:45:22 +08:00
|
|
|
static void rcar_du_lastclose(struct drm_device *dev)
|
2013-06-19 19:54:11 +08:00
|
|
|
{
|
|
|
|
struct rcar_du_device *rcdu = dev->dev_private;
|
|
|
|
|
2013-03-15 05:45:22 +08:00
|
|
|
drm_fbdev_cma_restore_mode(rcdu->fbdev);
|
2013-06-19 19:54:11 +08:00
|
|
|
}
|
|
|
|
|
2017-03-08 22:12:56 +08:00
|
|
|
DEFINE_DRM_GEM_CMA_FOPS(rcar_du_fops);
|
2013-06-19 19:54:11 +08:00
|
|
|
|
|
|
|
static struct drm_driver rcar_du_driver = {
|
2015-02-27 03:22:10 +08:00
|
|
|
.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME
|
|
|
|
| DRIVER_ATOMIC,
|
2013-03-15 05:45:22 +08:00
|
|
|
.lastclose = rcar_du_lastclose,
|
2016-05-31 01:53:02 +08:00
|
|
|
.gem_free_object_unlocked = drm_gem_cma_free_object,
|
2013-06-19 19:54:11 +08:00
|
|
|
.gem_vm_ops = &drm_gem_cma_vm_ops,
|
|
|
|
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
|
|
|
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
2013-07-10 21:23:35 +08:00
|
|
|
.gem_prime_import = drm_gem_prime_import,
|
|
|
|
.gem_prime_export = drm_gem_prime_export,
|
|
|
|
.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
|
|
|
|
.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
|
|
|
|
.gem_prime_vmap = drm_gem_cma_prime_vmap,
|
|
|
|
.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
|
|
|
|
.gem_prime_mmap = drm_gem_cma_prime_mmap,
|
2013-07-05 02:05:51 +08:00
|
|
|
.dumb_create = rcar_du_dumb_create,
|
2013-06-19 19:54:11 +08:00
|
|
|
.fops = &rcar_du_fops,
|
|
|
|
.name = "rcar-du",
|
|
|
|
.desc = "Renesas R-Car Display Unit",
|
|
|
|
.date = "20130110",
|
|
|
|
.major = 1,
|
|
|
|
.minor = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
|
|
* Power management
|
|
|
|
*/
|
|
|
|
|
2014-07-13 19:18:58 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2013-06-19 19:54:11 +08:00
|
|
|
static int rcar_du_pm_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct rcar_du_device *rcdu = dev_get_drvdata(dev);
|
2017-09-16 00:42:06 +08:00
|
|
|
struct drm_atomic_state *state;
|
2013-06-19 19:54:11 +08:00
|
|
|
|
|
|
|
drm_kms_helper_poll_disable(rcdu->ddev);
|
2017-09-16 00:42:06 +08:00
|
|
|
drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, true);
|
|
|
|
|
|
|
|
state = drm_atomic_helper_suspend(rcdu->ddev);
|
|
|
|
if (IS_ERR(state)) {
|
|
|
|
drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, false);
|
|
|
|
drm_kms_helper_poll_enable(rcdu->ddev);
|
|
|
|
return PTR_ERR(state);
|
|
|
|
}
|
|
|
|
|
|
|
|
rcdu->suspend_state = state;
|
2013-06-19 19:54:11 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rcar_du_pm_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct rcar_du_device *rcdu = dev_get_drvdata(dev);
|
|
|
|
|
2017-09-16 00:42:06 +08:00
|
|
|
drm_atomic_helper_resume(rcdu->ddev, rcdu->suspend_state);
|
|
|
|
drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, false);
|
2013-06-19 19:54:11 +08:00
|
|
|
drm_kms_helper_poll_enable(rcdu->ddev);
|
2017-09-16 00:42:06 +08:00
|
|
|
|
2013-06-19 19:54:11 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static const struct dev_pm_ops rcar_du_pm_ops = {
|
|
|
|
SET_SYSTEM_SLEEP_PM_OPS(rcar_du_pm_suspend, rcar_du_pm_resume)
|
|
|
|
};
|
|
|
|
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
|
|
* Platform driver
|
|
|
|
*/
|
|
|
|
|
2015-09-28 23:39:53 +08:00
|
|
|
static int rcar_du_remove(struct platform_device *pdev)
|
2013-06-19 19:54:11 +08:00
|
|
|
{
|
2015-09-28 23:39:53 +08:00
|
|
|
struct rcar_du_device *rcdu = platform_get_drvdata(pdev);
|
|
|
|
struct drm_device *ddev = rcdu->ddev;
|
|
|
|
|
|
|
|
drm_dev_unregister(ddev);
|
|
|
|
|
|
|
|
if (rcdu->fbdev)
|
|
|
|
drm_fbdev_cma_fini(rcdu->fbdev);
|
|
|
|
|
|
|
|
drm_kms_helper_poll_fini(ddev);
|
|
|
|
drm_mode_config_cleanup(ddev);
|
|
|
|
|
|
|
|
drm_dev_unref(ddev);
|
|
|
|
|
|
|
|
return 0;
|
2013-06-19 19:54:11 +08:00
|
|
|
}
|
|
|
|
|
2015-09-28 23:39:53 +08:00
|
|
|
static int rcar_du_probe(struct platform_device *pdev)
|
2013-06-19 19:54:11 +08:00
|
|
|
{
|
2015-09-28 23:39:53 +08:00
|
|
|
struct rcar_du_device *rcdu;
|
|
|
|
struct drm_device *ddev;
|
|
|
|
struct resource *mem;
|
|
|
|
int ret;
|
|
|
|
|
2016-10-19 05:51:35 +08:00
|
|
|
/* Allocate and initialize the R-Car device structure. */
|
2015-09-28 23:39:53 +08:00
|
|
|
rcdu = devm_kzalloc(&pdev->dev, sizeof(*rcdu), GFP_KERNEL);
|
|
|
|
if (rcdu == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
rcdu->dev = &pdev->dev;
|
2016-10-16 16:01:47 +08:00
|
|
|
rcdu->info = of_device_get_match_data(rcdu->dev);
|
2015-09-28 23:39:53 +08:00
|
|
|
|
|
|
|
platform_set_drvdata(pdev, rcdu);
|
|
|
|
|
|
|
|
/* I/O resources */
|
|
|
|
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem);
|
2016-10-19 05:51:35 +08:00
|
|
|
if (IS_ERR(rcdu->mmio))
|
|
|
|
return PTR_ERR(rcdu->mmio);
|
2015-09-28 23:39:53 +08:00
|
|
|
|
|
|
|
/* DRM/KMS objects */
|
2016-10-19 05:51:35 +08:00
|
|
|
ddev = drm_dev_alloc(&rcar_du_driver, &pdev->dev);
|
|
|
|
if (IS_ERR(ddev))
|
|
|
|
return PTR_ERR(ddev);
|
|
|
|
|
|
|
|
rcdu->ddev = ddev;
|
|
|
|
ddev->dev_private = rcdu;
|
|
|
|
|
2015-09-28 23:39:53 +08:00
|
|
|
ret = rcar_du_modeset_init(rcdu);
|
|
|
|
if (ret < 0) {
|
2016-05-25 08:41:18 +08:00
|
|
|
if (ret != -EPROBE_DEFER)
|
|
|
|
dev_err(&pdev->dev,
|
|
|
|
"failed to initialize DRM/KMS (%d)\n", ret);
|
2015-09-28 23:39:53 +08:00
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
ddev->irq_enabled = 1;
|
|
|
|
|
2017-07-11 06:13:20 +08:00
|
|
|
/*
|
|
|
|
* Register the DRM device with the core and the connectors with
|
2015-09-28 23:39:53 +08:00
|
|
|
* sysfs.
|
|
|
|
*/
|
|
|
|
ret = drm_dev_register(ddev, 0);
|
|
|
|
if (ret)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
DRM_INFO("Device %s probed\n", dev_name(&pdev->dev));
|
2013-06-19 19:54:11 +08:00
|
|
|
|
|
|
|
return 0;
|
2015-09-28 23:39:53 +08:00
|
|
|
|
|
|
|
error:
|
|
|
|
rcar_du_remove(pdev);
|
|
|
|
|
|
|
|
return ret;
|
2013-06-19 19:54:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver rcar_du_platform_driver = {
|
|
|
|
.probe = rcar_du_probe,
|
|
|
|
.remove = rcar_du_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "rcar-du",
|
|
|
|
.pm = &rcar_du_pm_ops,
|
2014-01-21 22:57:26 +08:00
|
|
|
.of_match_table = rcar_du_of_table,
|
2013-06-19 19:54:11 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-01-10 11:47:42 +08:00
|
|
|
static int __init rcar_du_init(void)
|
|
|
|
{
|
|
|
|
rcar_du_of_init(rcar_du_of_table);
|
|
|
|
|
|
|
|
return platform_driver_register(&rcar_du_platform_driver);
|
|
|
|
}
|
|
|
|
module_init(rcar_du_init);
|
|
|
|
|
|
|
|
static void __exit rcar_du_exit(void)
|
|
|
|
{
|
|
|
|
platform_driver_unregister(&rcar_du_platform_driver);
|
|
|
|
}
|
|
|
|
module_exit(rcar_du_exit);
|
2013-06-19 19:54:11 +08:00
|
|
|
|
|
|
|
MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
|
|
|
|
MODULE_DESCRIPTION("Renesas R-Car Display Unit DRM Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|