linux/arch/arm64/configs/defconfig

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CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_AUDIT=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BPF_SYSCALL=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_BPF_JIT=y
CONFIG_PREEMPT=y
arm64: defconfig: enable fine-grained task level IRQ time accounting Tests showed, that under certain conditions, the summary number of jiffies spent on softirq/idle, which are counted by system statistics can be even below 10% of expected value, resulting in false load presentation. The issue was observed on the quad-core Marvell Armada 8k SoC, whose two 10G ports were bound into L2 bridge. Load was controlled by bidirectional UDP traffic, produced by a packet generator. Under such condition, the dominant load is softirq. With 100% single CPU occupation or without any activity (all CPUs 100% idle), total number of jiffies is 10000 (2500 per each core) in 10s interval. Also with other kind of load this was true. However below a saturation threshold it was observed, that with CPU which was occupied almost by softirqs only, the statistic were awkward. See the mpstat output: CPU %usr %nice %sys %iowait %irq %soft %steal %guest %gnice %idle all 0.00 0.00 0.13 0.00 0.00 0.55 0.00 0.00 0.00 99.32 0 0.00 0.00 0.00 0.00 0.00 23.08 0.00 0.00 0.00 76.92 1 0.00 0.00 0.40 0.00 0.00 0.00 0.00 0.00 0.00 99.60 2 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 100.00 3 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 100.00 Above would mean basically no total load, debug CPU0 occupied in 25%. Raw statistics, printed every 10s from /proc/stat unveiled a root cause - summary idle/softirq jiffies on loaded CPU were below 200, i.e. over 90% samples lost. All problems were gone after enabling fine granulity IRQ time accounting. This patch fixes possible wrong statistics processing by enabling CONFIG_IRQ_TIME_ACCOUNTING for arm64 platfroms, which is by default done on other architectures, e.g. x86 and arm. Tests showed no noticeable performance penalty, nor stability impact. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-08-01 04:22:11 +08:00
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_NUMA_BALANCING=y
CONFIG_MEMCG=y
CONFIG_BLK_CGROUP=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_HUGETLB=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_BPF=y
CONFIG_USER_NS=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_COMPAT_BRK is not set
CONFIG_PROFILING=y
CONFIG_ARCH_ACTIONS=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_ALPINE=y
CONFIG_ARCH_APPLE=y
CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_BCM4908=y
CONFIG_ARCH_BCM_IPROC=y
CONFIG_ARCH_BERLIN=y
CONFIG_ARCH_BRCMSTB=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_K3=y
CONFIG_ARCH_LAYERSCAPE=y
CONFIG_ARCH_LG1K=y
CONFIG_ARCH_HISI=y
CONFIG_ARCH_KEEMBAY=y
CONFIG_ARCH_MEDIATEK=y
CONFIG_ARCH_MESON=y
CONFIG_ARCH_MVEBU=y
CONFIG_ARCH_MXC=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_RENESAS=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ARCH_S32=y
CONFIG_ARCH_SEATTLE=y
CONFIG_ARCH_INTEL_SOCFPGA=y
CONFIG_ARCH_SYNQUACER=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_TESLA_FSD=y
CONFIG_ARCH_SPRD=y
CONFIG_ARCH_THUNDER=y
CONFIG_ARCH_THUNDER2=y
CONFIG_ARCH_UNIPHIER=y
CONFIG_ARCH_VEXPRESS=y
CONFIG_ARCH_VISCONTI=y
CONFIG_ARCH_XGENE=y
CONFIG_ARCH_ZYNQMP=y
CONFIG_ARM64_VA_BITS_48=y
CONFIG_SCHED_MC=y
arm64: defconfig: enable CONFIG_SCHED_SMT The (CFS) scheduler has some extra logic catering to systems with SMT, but that logic won't be compiled in unless the above config is set. Note that the SMT-centric codepaths are gated by the sched_smt_present static key, and the SMT sched_domains will only survive if the platform has SMT. As such, the only impact on !SMT platforms should be a slightly bigger kernel - no behavioural change. Distro kernels already enable it, which makes sense since there already are things like ThunderX2 out in the wild. Enable it for the defconfig. Some deltas =========== FWIW my ELF symbol table diff looks something like this: NAME BEFORE AFTER DELTA update_sd_lb_stats.constprop.135 0 1864 +1864 find_idlest_group.isra.115 0 1808 +1808 update_numa_stats.isra.121 0 628 +628 select_task_rq_fair 3236 3732 +496 compute_energy.isra.112 0 420 +420 score_nearby_nodes.part.120 0 380 +380 __update_idle_core 0 232 +232 nohz_balance_exit_idle.part.127 0 216 +216 sched_slice.isra.99 0 172 +172 update_load_avg.part.107 0 116 +116 wakeup_preempt_entity.isra.101 0 92 +92 sched_cpu_activate 340 396 +56 pick_next_task_idle 8 56 +48 sched_cpu_deactivate 252 292 +40 show_smt_active 44 80 +36 cpu_smt_mask 0 28 +28 set_next_task_idle 4 32 +28 task_numa_work 680 692 +12 cpu_smt_flags 0 8 +8 enqueue_task_fair 2608 2612 +4 wakeup_preempt_entity.isra.104 92 0 -92 update_load_avg 1028 932 -96 task_numa_migrate 1824 1728 -96 sched_slice.isra.102 172 0 -172 nohz_balance_exit_idle.part.130 216 0 -216 task_numa_find_cpu 2116 1868 -248 score_nearby_nodes.part.123 380 0 -380 compute_energy.isra.115 420 0 -420 update_numa_stats.isra.124 472 0 -472 find_idlest_group.isra.118 1808 0 -1808 update_sd_lb_stats.constprop.138 1864 0 -1864 ------------------------------------------------------------------ DELTA SUM +820 As for the sched_domains, this is on a hikey960: before: $ cat /proc/sys/kernel/sched_domain/cpu*/domain*/name | sort | uniq DIE MC after: $ cat /proc/sys/kernel/sched_domain/cpu*/domain*/name | sort | uniq DIE MC Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Signed-off-by: Valentin Schneider <valentin.schneider@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lkml.kernel.org/r/20200227191433.31994-3-valentin.schneider@arm.com
2020-02-28 03:14:33 +08:00
CONFIG_SCHED_SMT=y
CONFIG_NUMA=y
CONFIG_KEXEC=y
CONFIG_KEXEC_FILE=y
CONFIG_CRASH_DUMP=y
CONFIG_XEN=y
CONFIG_COMPAT=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_HIBERNATION=y
CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
CONFIG_ENERGY_MODEL=y
CONFIG_ARM_CPUIDLE=y
CONFIG_ARM_PSCI_CPUIDLE=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
CONFIG_CPUFREQ_DT=y
CONFIG_ACPI_CPPC_CPUFREQ=m
CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=m
CONFIG_ARM_ARMADA_37XX_CPUFREQ=y
CONFIG_ARM_SCPI_CPUFREQ=y
CONFIG_ARM_IMX_CPUFREQ_DT=m
CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y
CONFIG_ARM_QCOM_CPUFREQ_HW=y
CONFIG_ARM_RASPBERRYPI_CPUFREQ=m
CONFIG_ARM_SCMI_CPUFREQ=y
CONFIG_ARM_TEGRA186_CPUFREQ=y
CONFIG_ARM_MEDIATEK_CPUFREQ=y
CONFIG_QORIQ_CPUFREQ=y
CONFIG_ACPI=y
CONFIG_ACPI_APEI=y
CONFIG_ACPI_APEI_GHES=y
CONFIG_ACPI_APEI_PCIEAER=y
CONFIG_ACPI_APEI_MEMORY_FAILURE=y
CONFIG_ACPI_APEI_EINJ=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=y
CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y
CONFIG_CRYPTO_SHA512_ARM64_CE=m
CONFIG_CRYPTO_SHA3_ARM64=m
CONFIG_CRYPTO_SM3_ARM64_CE=m
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_CHACHA20_NEON=m
CONFIG_CRYPTO_AES_ARM64_BS=m
CONFIG_JUMP_LABEL=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_SECCOMP=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_KSM=y
CONFIG_MEMORY_FAILURE=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IPV6=m
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_LOG=m
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP6_NF_IPTABLES=m
CONFIG_IP6_NF_FILTER=m
CONFIG_IP6_NF_TARGET_REJECT=m
CONFIG_IP6_NF_MANGLE=m
CONFIG_IP6_NF_NAT=m
CONFIG_IP6_NF_TARGET_MASQUERADE=m
CONFIG_BRIDGE=m
CONFIG_BRIDGE_VLAN_FILTERING=y
CONFIG_NET_DSA=m
CONFIG_VLAN_8021Q=m
CONFIG_VLAN_8021Q_GVRP=y
CONFIG_VLAN_8021Q_MVRP=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_CBS=m
CONFIG_NET_SCH_ETF=m
CONFIG_NET_SCH_TAPRIO=m
CONFIG_NET_SCH_MQPRIO=m
CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_FLOWER=m
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_GACT=m
CONFIG_NET_ACT_MIRRED=m
CONFIG_NET_ACT_GATE=m
CONFIG_QRTR=m
CONFIG_QRTR_SMD=m
CONFIG_QRTR_TUN=m
CONFIG_CAN=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_CAN_FLEXCAN=m
CONFIG_CAN_RCAR=m
CONFIG_CAN_RCAR_CANFD=m
arm64: defconfig: enable verdin-imx8mm relevant drivers as modules Enable various drivers which support peripherals as found on the Verdin iMX8M Mini et al. computer/system on modules: - CONFIG_CAN_MCP251XFD At least one Microchip MCP2518FDT SPI CAN controller which this driver also supports may be found on the Verdin iMX8M Mini computer/system on module. - CONFIG_BT_HCIUART_MRVL, CONFIG_BT_MRVL, CONFIG_BT_MRVL_SDIO and CONFIG_MWIFIEX_SDIO The AzureWave AW-CM276NF which these Bluetooth and Wi-Fi drivers also support may be found on the Verdin iMX8M Mini (as well as the Apalis iMX8, Colibri iMX8X and Verdin iMX8M Plus for that matter) computer/ system on module. - CONFIG_SENSORS_LM75 The TI TMP75C temperature sensor which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. - CONFIG_SND_SOC_NAU8822 The Nuvoton Technology Corporation (NTC) NAU88C22YG which this driver also supports may be found on the Verdin Development Board a carrier board for the Verdin family of computer/system on module which the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) may be mated in. - CONFIG_TI_ADS1015 The TLA2024 ADC which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:58 +08:00
CONFIG_CAN_MCP251XFD=m
CONFIG_BT=m
CONFIG_BT_HIDP=m
# CONFIG_BT_LE is not set
CONFIG_BT_LEDS=y
# CONFIG_BT_DEBUGFS is not set
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_LL=y
CONFIG_BT_HCIUART_BCM=y
CONFIG_BT_HCIUART_QCA=y
arm64: defconfig: enable verdin-imx8mm relevant drivers as modules Enable various drivers which support peripherals as found on the Verdin iMX8M Mini et al. computer/system on modules: - CONFIG_CAN_MCP251XFD At least one Microchip MCP2518FDT SPI CAN controller which this driver also supports may be found on the Verdin iMX8M Mini computer/system on module. - CONFIG_BT_HCIUART_MRVL, CONFIG_BT_MRVL, CONFIG_BT_MRVL_SDIO and CONFIG_MWIFIEX_SDIO The AzureWave AW-CM276NF which these Bluetooth and Wi-Fi drivers also support may be found on the Verdin iMX8M Mini (as well as the Apalis iMX8, Colibri iMX8X and Verdin iMX8M Plus for that matter) computer/ system on module. - CONFIG_SENSORS_LM75 The TI TMP75C temperature sensor which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. - CONFIG_SND_SOC_NAU8822 The Nuvoton Technology Corporation (NTC) NAU88C22YG which this driver also supports may be found on the Verdin Development Board a carrier board for the Verdin family of computer/system on module which the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) may be mated in. - CONFIG_TI_ADS1015 The TLA2024 ADC which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:58 +08:00
CONFIG_BT_HCIUART_MRVL=y
CONFIG_BT_MRVL=m
CONFIG_BT_MRVL_SDIO=m
CONFIG_BT_QCOMSMD=m
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_MAC80211_LEDS=y
CONFIG_RFKILL=m
CONFIG_NET_9P=y
CONFIG_NET_9P_VIRTIO=y
CONFIG_NFC=m
CONFIG_NFC_NCI=m
CONFIG_NFC_S3FWRN5_I2C=m
CONFIG_PCI=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIEAER=y
CONFIG_PCI_IOV=y
CONFIG_PCI_PASID=y
CONFIG_HOTPLUG_PCI=y
CONFIG_HOTPLUG_PCI_ACPI=y
CONFIG_PCI_AARDVARK=y
CONFIG_PCI_TEGRA=y
CONFIG_PCIE_RCAR_HOST=y
CONFIG_PCIE_RCAR_EP=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCI_XGENE=y
CONFIG_PCIE_ALTERA=y
CONFIG_PCIE_ALTERA_MSI=y
CONFIG_PCI_HOST_THUNDER_PEM=y
CONFIG_PCI_HOST_THUNDER_ECAM=y
CONFIG_PCIE_ROCKCHIP_HOST=m
CONFIG_PCIE_BRCMSTB=m
CONFIG_PCI_IMX6=y
CONFIG_PCI_LAYERSCAPE=y
CONFIG_PCI_HISI=y
CONFIG_PCIE_QCOM=y
CONFIG_PCIE_ARMADA_8K=y
CONFIG_PCIE_KIRIN=y
CONFIG_PCIE_HISI_STB=y
CONFIG_PCIE_TEGRA194_HOST=m
CONFIG_PCIE_VISCONTI_HOST=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_PCI_ENDPOINT=y
CONFIG_PCI_ENDPOINT_CONFIGFS=y
CONFIG_PCI_EPF_TEST=m
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER_USER_HELPER=y
CONFIG_HISILICON_LPC=y
CONFIG_TEGRA_ACONNECT=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_ARM_SCMI_PROTOCOL=y
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_INTEL_STRATIX10_SERVICE=y
CONFIG_INTEL_STRATIX10_RSU=m
CONFIG_EFI_CAPSULE_LOADER=y
CONFIG_IMX_SCU=y
CONFIG_IMX_SCU_PD=y
CONFIG_GNSS=m
CONFIG_GNSS_MTK_SERIAL=m
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_SST25L=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_BRCMNAND=m
CONFIG_MTD_NAND_DENALI_DT=y
CONFIG_MTD_NAND_MARVELL=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_NAND_QCOM=y
CONFIG_MTD_SPI_NOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=m
CONFIG_VIRTIO_BLK=y
CONFIG_BLK_DEV_NVME=m
CONFIG_QCOM_COINCELL=m
CONFIG_QCOM_FASTRPC=m
CONFIG_SRAM=y
CONFIG_PCI_ENDPOINT_TEST=m
CONFIG_EEPROM_AT24=m
CONFIG_EEPROM_AT25=m
CONFIG_UACCE=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SAS_ATA=y
CONFIG_SCSI_HISI_SAS=y
CONFIG_SCSI_HISI_SAS_PCI=y
CONFIG_MEGARAID_SAS=y
CONFIG_SCSI_MPT3SAS=m
CONFIG_SCSI_UFSHCD=y
CONFIG_SCSI_UFSHCD_PLATFORM=y
CONFIG_SCSI_UFS_QCOM=m
CONFIG_SCSI_UFS_HISI=y
CONFIG_SCSI_UFS_EXYNOS=y
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_BRCM=m
CONFIG_AHCI_CEVA=y
CONFIG_AHCI_MVEBU=y
CONFIG_AHCI_XGENE=y
CONFIG_AHCI_QORIQ=y
CONFIG_SATA_SIL24=y
CONFIG_SATA_RCAR=y
CONFIG_PATA_PLATFORM=y
CONFIG_PATA_OF_PLATFORM=y
CONFIG_MD=y
CONFIG_BLK_DEV_MD=m
CONFIG_BLK_DEV_DM=m
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
CONFIG_NETDEVICES=y
CONFIG_MACVLAN=m
CONFIG_MACVTAP=m
CONFIG_TUN=y
CONFIG_VETH=m
CONFIG_VIRTIO_NET=y
CONFIG_NET_DSA_BCM_SF2=m
CONFIG_NET_DSA_MSCC_FELIX=m
CONFIG_AMD_XGBE=y
CONFIG_NET_XGENE=y
CONFIG_ATL1C=m
CONFIG_BCMGENET=m
CONFIG_SYSTEMPORT=m
CONFIG_BNX2X=m
CONFIG_MACB=y
CONFIG_THUNDER_NIC_PF=y
CONFIG_FEC=y
CONFIG_FSL_FMAN=y
CONFIG_FSL_DPAA_ETH=y
CONFIG_FSL_DPAA2_ETH=y
CONFIG_FSL_ENETC=y
CONFIG_FSL_ENETC_VF=y
CONFIG_FSL_ENETC_QOS=y
CONFIG_HIX5HD2_GMAC=y
CONFIG_HNS_DSAF=y
CONFIG_HNS_ENET=y
CONFIG_HNS3=y
CONFIG_HNS3_HCLGE=y
CONFIG_HNS3_ENET=y
CONFIG_E1000=y
CONFIG_E1000E=y
CONFIG_IGB=y
CONFIG_IGBVF=y
CONFIG_MVNETA=y
CONFIG_MVPP2=y
CONFIG_SKY2=y
CONFIG_MLX4_EN=m
CONFIG_MLX5_CORE=m
CONFIG_MLX5_CORE_EN=y
CONFIG_QCOM_EMAC=m
CONFIG_RMNET=m
CONFIG_R8169=m
CONFIG_SH_ETH=y
CONFIG_RAVB=y
CONFIG_SMC91X=y
CONFIG_SMSC911X=y
CONFIG_SNI_AVE=y
CONFIG_SNI_NETSEC=y
CONFIG_STMMAC_ETH=m
CONFIG_TI_K3_AM65_CPSW_NUSS=y
CONFIG_QCOM_IPA=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_MESON_GXL_PHY=m
CONFIG_AQUANTIA_PHY=y
CONFIG_BCM54140_PHY=m
CONFIG_MARVELL_PHY=m
CONFIG_MARVELL_10G_PHY=m
CONFIG_MICREL_PHY=y
CONFIG_MICROSEMI_PHY=y
CONFIG_AT803X_PHY=y
CONFIG_REALTEK_PHY=y
CONFIG_ROCKCHIP_PHY=y
CONFIG_DP83867_PHY=y
CONFIG_VITESSE_PHY=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_USB_BRCMSTB=m
CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m
CONFIG_USB_RTL8152=m
CONFIG_USB_LAN78XX=m
CONFIG_USB_USBNET=m
CONFIG_USB_NET_DM9601=m
CONFIG_USB_NET_SR9800=m
CONFIG_USB_NET_SMSC75XX=m
CONFIG_USB_NET_SMSC95XX=m
CONFIG_USB_NET_PLUSB=m
CONFIG_USB_NET_MCS7830=m
CONFIG_ATH10K=m
CONFIG_ATH10K_PCI=m
CONFIG_ATH10K_SNOC=m
CONFIG_WCN36XX=m
CONFIG_ATH11K=m
CONFIG_ATH11K_AHB=m
CONFIG_ATH11K_PCI=m
CONFIG_BRCMFMAC=m
CONFIG_MWIFIEX=m
arm64: defconfig: enable verdin-imx8mm relevant drivers as modules Enable various drivers which support peripherals as found on the Verdin iMX8M Mini et al. computer/system on modules: - CONFIG_CAN_MCP251XFD At least one Microchip MCP2518FDT SPI CAN controller which this driver also supports may be found on the Verdin iMX8M Mini computer/system on module. - CONFIG_BT_HCIUART_MRVL, CONFIG_BT_MRVL, CONFIG_BT_MRVL_SDIO and CONFIG_MWIFIEX_SDIO The AzureWave AW-CM276NF which these Bluetooth and Wi-Fi drivers also support may be found on the Verdin iMX8M Mini (as well as the Apalis iMX8, Colibri iMX8X and Verdin iMX8M Plus for that matter) computer/ system on module. - CONFIG_SENSORS_LM75 The TI TMP75C temperature sensor which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. - CONFIG_SND_SOC_NAU8822 The Nuvoton Technology Corporation (NTC) NAU88C22YG which this driver also supports may be found on the Verdin Development Board a carrier board for the Verdin family of computer/system on module which the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) may be mated in. - CONFIG_TI_ADS1015 The TLA2024 ADC which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:58 +08:00
CONFIG_MWIFIEX_SDIO=m
CONFIG_MWIFIEX_PCIE=m
CONFIG_WL18XX=m
CONFIG_WLCORE_SDIO=m
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_ADC=m
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_SNVS_PWRKEY=m
CONFIG_KEYBOARD_IMX_SC_KEY=m
CONFIG_KEYBOARD_CROS_EC=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
CONFIG_TOUCHSCREEN_GOODIX=m
CONFIG_TOUCHSCREEN_EDT_FT5X06=m
CONFIG_INPUT_MISC=y
CONFIG_INPUT_PM8941_PWRKEY=y
CONFIG_INPUT_PM8XXX_VIBRATOR=m
CONFIG_INPUT_PWM_BEEPER=m
CONFIG_INPUT_PWM_VIBRA=m
CONFIG_INPUT_HISI_POWERKEY=y
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIO_AMBAKMI=y
CONFIG_LEGACY_PTY_COUNT=16
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_BCM2835AUX=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_OMAP=y
CONFIG_SERIAL_8250_MT6577=y
CONFIG_SERIAL_8250_UNIPHIER=y
CONFIG_SERIAL_8250_EM=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_MESON=y
CONFIG_SERIAL_MESON_CONSOLE=y
CONFIG_SERIAL_SAMSUNG=y
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_TEGRA_TCU=y
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_QCOM_GENI=y
CONFIG_SERIAL_QCOM_GENI_CONSOLE=y
CONFIG_SERIAL_XILINX_PS_UART=y
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
CONFIG_SERIAL_FSL_LINFLEXUART=y
CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
CONFIG_SERIAL_MVEBU_UART=y
CONFIG_SERIAL_OWL=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_IPMI_HANDLER=m
CONFIG_IPMI_DEVICE_INTERFACE=m
CONFIG_IPMI_SI=m
CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_BCM2835=m
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_GPIO=m
CONFIG_I2C_IMX=y
CONFIG_I2C_IMX_LPI2C=y
CONFIG_I2C_MESON=y
CONFIG_I2C_MT65XX=y
CONFIG_I2C_MV64XXX=y
CONFIG_I2C_OMAP=y
CONFIG_I2C_OWL=y
CONFIG_I2C_PXA=y
CONFIG_I2C_QCOM_CCI=m
CONFIG_I2C_QCOM_GENI=m
CONFIG_I2C_QUP=y
CONFIG_I2C_RIIC=y
CONFIG_I2C_RK3X=y
CONFIG_I2C_S3C2410=y
CONFIG_I2C_SH_MOBILE=y
CONFIG_I2C_TEGRA=y
CONFIG_I2C_UNIPHIER_F=y
CONFIG_I2C_RCAR=y
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CADENCE=m
CONFIG_SPI=y
CONFIG_SPI_ARMADA_3700=y
CONFIG_SPI_BCM2835=m
CONFIG_SPI_BCM2835AUX=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_SPI_CADENCE_QUADSPI=y
CONFIG_SPI_DESIGNWARE=m
CONFIG_SPI_DW_DMA=y
CONFIG_SPI_DW_MMIO=m
CONFIG_SPI_FSL_LPSPI=y
CONFIG_SPI_FSL_QUADSPI=y
CONFIG_SPI_NXP_FLEXSPI=y
CONFIG_SPI_IMX=m
CONFIG_SPI_FSL_DSPI=y
CONFIG_SPI_MESON_SPICC=m
CONFIG_SPI_MESON_SPIFC=m
CONFIG_SPI_ORION=y
CONFIG_SPI_PL022=y
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_RPCIF=m
CONFIG_SPI_RSPI=m
CONFIG_SPI_QCOM_QSPI=m
CONFIG_SPI_QUP=y
CONFIG_SPI_QCOM_GENI=m
CONFIG_SPI_S3C64XX=y
CONFIG_SPI_SH_MSIOF=m
CONFIG_SPI_SUN6I=y
CONFIG_SPI_SPIDEV=m
CONFIG_SPMI=y
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_PINCTRL_MAX77620=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_PINCTRL_SINGLE=y
CONFIG_PINCTRL_OWL=y
CONFIG_PINCTRL_S700=y
CONFIG_PINCTRL_S900=y
CONFIG_PINCTRL_IMX8MM=y
CONFIG_PINCTRL_IMX8MN=y
CONFIG_PINCTRL_IMX8MP=y
CONFIG_PINCTRL_IMX8MQ=y
CONFIG_PINCTRL_IMX8QM=y
CONFIG_PINCTRL_IMX8QXP=y
CONFIG_PINCTRL_IMX8DXL=y
CONFIG_PINCTRL_IMX8ULP=y
pinctrl: qcom: Kconfig: Rework PINCTRL_MSM to be a depenency rather then a selected config This patch reworks PINCTRL_MSM to be a visible option, and instead of having the various SoC specific drivers select PINCTRL_MSM, this switches those configs to depend on PINCTRL_MSM. This is useful, as it will be needed in order to cleanly support having the qcom-scm driver, which pinctrl-msm calls into, configured as a module. Without this change, we would eventually have to add dependency lines to every config that selects PINCTRL_MSM, and that would becomes a maintenance headache. We also add PINCTRL_MSM to the arm64 defconfig to avoid surprises as otherwise PINCTRL_MSM/IPQ* options previously enabled, will be off. Signed-off-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <maz@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: Kalle Valo <kvalo@codeaurora.org> Cc: Maulik Shah <mkshah@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Todd Kjos <tkjos@google.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-arm-msm@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-gpio@vger.kernel.org Link: https://lore.kernel.org/r/20201106042710.55979-1-john.stultz@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-06 12:27:08 +08:00
CONFIG_PINCTRL_MSM=y
CONFIG_PINCTRL_IPQ8074=y
CONFIG_PINCTRL_IPQ6018=y
CONFIG_PINCTRL_MSM8916=y
CONFIG_PINCTRL_MSM8994=y
CONFIG_PINCTRL_MSM8996=y
CONFIG_PINCTRL_MSM8998=y
CONFIG_PINCTRL_QCS404=y
CONFIG_PINCTRL_QDF2XXX=y
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
CONFIG_PINCTRL_SC7180=y
CONFIG_PINCTRL_SC7280=y
CONFIG_PINCTRL_SDM845=y
CONFIG_PINCTRL_SM8150=y
CONFIG_PINCTRL_SM8250=y
CONFIG_PINCTRL_SM8350=y
CONFIG_PINCTRL_SM8450=y
CONFIG_PINCTRL_LPASS_LPI=m
CONFIG_GPIO_ALTERA=m
CONFIG_GPIO_DAVINCI=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_MB86S7X=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_MXC=y
CONFIG_GPIO_PL061=y
CONFIG_GPIO_RCAR=y
CONFIG_GPIO_UNIPHIER=y
CONFIG_GPIO_VISCONTI=y
CONFIG_GPIO_WCD934X=m
CONFIG_GPIO_XGENE=y
CONFIG_GPIO_XGENE_SB=y
CONFIG_GPIO_MAX732X=y
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GPIO_BD9571MWV=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_GPIO_MAX77620=y
CONFIG_GPIO_SL28CPLD=m
CONFIG_POWER_RESET_MSM=y
CONFIG_POWER_RESET_QCOM_PON=m
CONFIG_POWER_RESET_XGENE=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_SYSCON_REBOOT_MODE=y
CONFIG_BATTERY_SBS=m
CONFIG_BATTERY_BQ27XXX=y
CONFIG_BATTERY_MAX17042=m
CONFIG_CHARGER_MT6360=m
CONFIG_CHARGER_BQ25890=m
CONFIG_CHARGER_BQ25980=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_SENSORS_ARM_SCMI=y
CONFIG_SENSORS_ARM_SCPI=y
CONFIG_SENSORS_JC42=m
arm64: defconfig: enable verdin-imx8mm relevant drivers as modules Enable various drivers which support peripherals as found on the Verdin iMX8M Mini et al. computer/system on modules: - CONFIG_CAN_MCP251XFD At least one Microchip MCP2518FDT SPI CAN controller which this driver also supports may be found on the Verdin iMX8M Mini computer/system on module. - CONFIG_BT_HCIUART_MRVL, CONFIG_BT_MRVL, CONFIG_BT_MRVL_SDIO and CONFIG_MWIFIEX_SDIO The AzureWave AW-CM276NF which these Bluetooth and Wi-Fi drivers also support may be found on the Verdin iMX8M Mini (as well as the Apalis iMX8, Colibri iMX8X and Verdin iMX8M Plus for that matter) computer/ system on module. - CONFIG_SENSORS_LM75 The TI TMP75C temperature sensor which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. - CONFIG_SND_SOC_NAU8822 The Nuvoton Technology Corporation (NTC) NAU88C22YG which this driver also supports may be found on the Verdin Development Board a carrier board for the Verdin family of computer/system on module which the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) may be mated in. - CONFIG_TI_ADS1015 The TLA2024 ADC which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:58 +08:00
CONFIG_SENSORS_LM75=m
CONFIG_SENSORS_LM90=m
CONFIG_SENSORS_PWM_FAN=m
CONFIG_SENSORS_RASPBERRYPI_HWMON=m
CONFIG_SENSORS_SL28CPLD=m
CONFIG_SENSORS_INA2XX=m
CONFIG_SENSORS_INA3221=m
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
CONFIG_CPU_THERMAL=y
CONFIG_THERMAL_EMULATION=y
CONFIG_IMX_SC_THERMAL=m
CONFIG_IMX8MM_THERMAL=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_QORIQ_THERMAL=m
CONFIG_SUN8I_THERMAL=y
CONFIG_ROCKCHIP_THERMAL=m
CONFIG_RCAR_THERMAL=y
CONFIG_RCAR_GEN3_THERMAL=y
CONFIG_RZG2L_THERMAL=y
CONFIG_ARMADA_THERMAL=y
CONFIG_BCM2711_THERMAL=m
CONFIG_BCM2835_THERMAL=m
CONFIG_BRCMSTB_THERMAL=m
CONFIG_EXYNOS_THERMAL=y
CONFIG_TEGRA_SOCTHERM=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_TEGRA_BPMP_THERMAL=m
CONFIG_QCOM_TSENS=y
CONFIG_QCOM_SPMI_TEMP_ALARM=m
CONFIG_QCOM_LMH=m
CONFIG_QCOM_SPMI_ADC_TM5=m
CONFIG_UNIPHIER_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_SL28CPLD_WATCHDOG=m
CONFIG_ARM_SP805_WATCHDOG=y
CONFIG_ARM_SBSA_WATCHDOG=y
CONFIG_S3C2410_WATCHDOG=y
CONFIG_BCM7038_WDT=m
CONFIG_DW_WATCHDOG=y
CONFIG_SUNXI_WATCHDOG=m
CONFIG_IMX2_WDT=y
CONFIG_IMX_SC_WDT=m
CONFIG_QCOM_WDT=m
CONFIG_MESON_GXBB_WATCHDOG=m
CONFIG_MESON_WATCHDOG=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_ARM_SMC_WATCHDOG=y
CONFIG_RENESAS_WDT=y
CONFIG_RENESAS_RZG2LWDT=y
CONFIG_UNIPHIER_WATCHDOG=y
CONFIG_PM8916_WATCHDOG=m
CONFIG_BCM2835_WDT=y
CONFIG_MFD_ALTERA_SYSMGR=y
CONFIG_MFD_BD9571MWV=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_AXP20X_RSB=y
CONFIG_MFD_EXYNOS_LPASS=m
CONFIG_MFD_HI6421_PMIC=y
CONFIG_MFD_HI655X_PMIC=y
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_MFD_MAX77620=y
CONFIG_MFD_MT6360=y
CONFIG_MFD_MT6397=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_MFD_RK808=y
CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_SL28CPLD=y
CONFIG_MFD_ROHM_BD718XX=y
CONFIG_MFD_WCD934X=m
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_AXP20X=y
CONFIG_REGULATOR_BD718XX=y
CONFIG_REGULATOR_BD9571MWV=y
CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_HI6421V530=y
CONFIG_REGULATOR_HI655X=y
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_REGULATOR_MAX77620=y
CONFIG_REGULATOR_MAX8973=y
CONFIG_REGULATOR_MP8859=y
CONFIG_REGULATOR_MT6358=y
CONFIG_REGULATOR_MT6359=y
CONFIG_REGULATOR_MT6360=y
CONFIG_REGULATOR_MT6397=y
CONFIG_REGULATOR_PCA9450=y
CONFIG_REGULATOR_PF8X00=y
CONFIG_REGULATOR_PFUZE100=y
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_QCOM_RPMH=y
CONFIG_REGULATOR_QCOM_SMD_RPM=y
CONFIG_REGULATOR_QCOM_SPMI=y
CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_S2MPS11=y
CONFIG_REGULATOR_TPS65132=m
CONFIG_REGULATOR_VCTRL=m
CONFIG_RC_CORE=m
CONFIG_RC_DECODERS=y
CONFIG_RC_DEVICES=y
CONFIG_IR_MESON=m
CONFIG_IR_SUNXI=m
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
CONFIG_MEDIA_SDR_SUPPORT=y
CONFIG_MEDIA_PLATFORM_SUPPORT=y
# CONFIG_DVB_NET is not set
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_V4L_PLATFORM_DRIVERS=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_VIDEO_QCOM_CAMSS=m
CONFIG_VIDEO_RCAR_CSI2=m
CONFIG_VIDEO_RCAR_VIN=m
CONFIG_VIDEO_SUN6I_CSI=m
CONFIG_VIDEO_RCAR_ISP=m
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m
CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
CONFIG_VIDEO_RENESAS_FDP1=m
CONFIG_VIDEO_RENESAS_FCP=m
CONFIG_VIDEO_RENESAS_VSP1=m
CONFIG_VIDEO_QCOM_VENUS=m
CONFIG_SDR_PLATFORM_DRIVERS=y
CONFIG_VIDEO_RCAR_DRIF=m
CONFIG_VIDEO_IMX219=m
CONFIG_VIDEO_OV5640=m
CONFIG_VIDEO_OV5645=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_DRM=m
CONFIG_DRM_I2C_NXP_TDA998X=m
CONFIG_DRM_HDLCD=m
CONFIG_DRM_MALI_DISPLAY=m
CONFIG_DRM_KOMEDA=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_DRM_NOUVEAU=m
CONFIG_DRM_EXYNOS=m
CONFIG_DRM_EXYNOS5433_DECON=y
CONFIG_DRM_EXYNOS7_DECON=y
CONFIG_DRM_EXYNOS_DSI=y
# CONFIG_DRM_EXYNOS_DP is not set
CONFIG_DRM_EXYNOS_HDMI=y
CONFIG_DRM_EXYNOS_MIC=y
CONFIG_DRM_ROCKCHIP=m
CONFIG_ROCKCHIP_ANALOGIX_DP=y
CONFIG_ROCKCHIP_CDN_DP=y
CONFIG_ROCKCHIP_DW_HDMI=y
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
CONFIG_ROCKCHIP_INNO_HDMI=y
CONFIG_ROCKCHIP_LVDS=y
CONFIG_DRM_RCAR_DU=m
CONFIG_DRM_RCAR_DW_HDMI=m
CONFIG_DRM_RCAR_MIPI_DSI=m
CONFIG_DRM_SUN4I=m
CONFIG_DRM_SUN6I_DSI=m
CONFIG_DRM_SUN8I_DW_HDMI=m
CONFIG_DRM_SUN8I_MIXER=m
CONFIG_DRM_MSM=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_DRM_TEGRA=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
CONFIG_DRM_PANEL_LVDS=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_PANEL_EDP=m
CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
CONFIG_DRM_PANEL_SITRONIX_ST7703=m
CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
CONFIG_DRM_LONTIUM_LT8912B=m
CONFIG_DRM_LONTIUM_LT9611=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_DRM_LONTIUM_LT9611UXC=m
CONFIG_DRM_NWL_MIPI_DSI=m
CONFIG_DRM_PARADE_PS8640=m
CONFIG_DRM_SII902X=m
CONFIG_DRM_SIMPLE_BRIDGE=m
CONFIG_DRM_THINE_THC63LVD1024=m
CONFIG_DRM_TI_SN65DSI86=m
CONFIG_DRM_I2C_ADV7511=m
CONFIG_DRM_I2C_ADV7511_AUDIO=y
CONFIG_DRM_CDNS_MHDP8546=m
CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
CONFIG_DRM_DW_HDMI_CEC=m
CONFIG_DRM_IMX_DCSS=m
CONFIG_DRM_VC4=m
CONFIG_DRM_ETNAVIV=m
CONFIG_DRM_HISI_HIBMC=m
CONFIG_DRM_HISI_KIRIN=m
CONFIG_DRM_MEDIATEK=m
CONFIG_DRM_MEDIATEK_HDMI=m
CONFIG_DRM_MXSFB=m
CONFIG_DRM_MESON=m
CONFIG_DRM_PL111=m
CONFIG_DRM_LIMA=m
CONFIG_DRM_PANFROST=m
CONFIG_DRM_TIDSS=m
CONFIG_FB=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_EFI=y
CONFIG_BACKLIGHT_PWM=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_BACKLIGHT_LP855X=m
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_HDA_TEGRA=m
CONFIG_SND_HDA_CODEC_HDMI=m
CONFIG_SND_SOC=y
CONFIG_SND_BCM2835_SOC_I2S=m
CONFIG_SND_SOC_FSL_ASRC=m
CONFIG_SND_SOC_FSL_MICFIL=m
CONFIG_SND_SOC_FSL_EASRC=m
CONFIG_SND_IMX_SOC=m
CONFIG_SND_SOC_IMX_SGTL5000=m
CONFIG_SND_SOC_IMX_SPDIF=m
CONFIG_SND_SOC_FSL_ASOC_CARD=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_SND_SOC_IMX_AUDMIX=m
CONFIG_SND_MESON_AXG_SOUND_CARD=m
CONFIG_SND_MESON_GX_SOUND_CARD=m
CONFIG_SND_SOC_QCOM=m
CONFIG_SND_SOC_APQ8016_SBC=m
CONFIG_SND_SOC_MSM8996=m
CONFIG_SND_SOC_SDM845=m
CONFIG_SND_SOC_SM8250=m
CONFIG_SND_SOC_ROCKCHIP=m
CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
CONFIG_SND_SOC_ROCKCHIP_RT5645=m
CONFIG_SND_SOC_RK3399_GRU_SOUND=m
CONFIG_SND_SOC_SAMSUNG=y
CONFIG_SND_SOC_RCAR=m
CONFIG_SND_SOC_RZ=m
CONFIG_SND_SUN4I_I2S=m
CONFIG_SND_SUN4I_SPDIF=m
CONFIG_SND_SOC_TEGRA=m
CONFIG_SND_SOC_TEGRA210_AHUB=m
CONFIG_SND_SOC_TEGRA210_DMIC=m
CONFIG_SND_SOC_TEGRA210_I2S=m
CONFIG_SND_SOC_TEGRA186_ASRC=m
CONFIG_SND_SOC_TEGRA186_DSPK=m
CONFIG_SND_SOC_TEGRA210_ADMAIF=m
CONFIG_SND_SOC_TEGRA210_MVC=m
CONFIG_SND_SOC_TEGRA210_SFC=m
CONFIG_SND_SOC_TEGRA210_AMX=m
CONFIG_SND_SOC_TEGRA210_ADX=m
CONFIG_SND_SOC_TEGRA210_MIXER=m
CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=m
CONFIG_SND_SOC_AK4613=m
CONFIG_SND_SOC_ES7134=m
CONFIG_SND_SOC_ES7241=m
CONFIG_SND_SOC_GTM601=m
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
CONFIG_SND_SOC_PCM3168A_I2C=m
CONFIG_SND_SOC_RT5659=m
CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
CONFIG_SND_SOC_SIMPLE_MUX=m
CONFIG_SND_SOC_TAS571X=m
CONFIG_SND_SOC_TLV320AIC32X4_I2C=m
CONFIG_SND_SOC_WCD9335=m
CONFIG_SND_SOC_WCD934X=m
CONFIG_SND_SOC_WM8524=m
CONFIG_SND_SOC_WM8904=m
CONFIG_SND_SOC_WM8960=m
CONFIG_SND_SOC_WM8962=m
CONFIG_SND_SOC_WM8978=m
CONFIG_SND_SOC_WSA881X=m
arm64: defconfig: enable verdin-imx8mm relevant drivers as modules Enable various drivers which support peripherals as found on the Verdin iMX8M Mini et al. computer/system on modules: - CONFIG_CAN_MCP251XFD At least one Microchip MCP2518FDT SPI CAN controller which this driver also supports may be found on the Verdin iMX8M Mini computer/system on module. - CONFIG_BT_HCIUART_MRVL, CONFIG_BT_MRVL, CONFIG_BT_MRVL_SDIO and CONFIG_MWIFIEX_SDIO The AzureWave AW-CM276NF which these Bluetooth and Wi-Fi drivers also support may be found on the Verdin iMX8M Mini (as well as the Apalis iMX8, Colibri iMX8X and Verdin iMX8M Plus for that matter) computer/ system on module. - CONFIG_SENSORS_LM75 The TI TMP75C temperature sensor which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. - CONFIG_SND_SOC_NAU8822 The Nuvoton Technology Corporation (NTC) NAU88C22YG which this driver also supports may be found on the Verdin Development Board a carrier board for the Verdin family of computer/system on module which the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) may be mated in. - CONFIG_TI_ADS1015 The TLA2024 ADC which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:58 +08:00
CONFIG_SND_SOC_NAU8822=m
CONFIG_SND_SOC_LPASS_WSA_MACRO=m
CONFIG_SND_SOC_LPASS_VA_MACRO=m
CONFIG_SND_SOC_LPASS_RX_MACRO=m
CONFIG_SND_SOC_LPASS_TX_MACRO=m
CONFIG_SND_SIMPLE_CARD=m
CONFIG_SND_AUDIO_GRAPH_CARD=m
CONFIG_SND_AUDIO_GRAPH_CARD2=m
CONFIG_HID_MULTITOUCH=m
CONFIG_I2C_HID_ACPI=m
CONFIG_I2C_HID_OF=m
CONFIG_USB=y
CONFIG_USB_OTG=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI_RENESAS=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_USB_XHCI_TEGRA=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_EXYNOS=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_EXYNOS=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_RENESAS_USBHS_HCD=m
CONFIG_USB_RENESAS_USBHS=m
CONFIG_USB_ACM=m
CONFIG_USB_STORAGE=y
CONFIG_USB_CDNS_SUPPORT=m
CONFIG_USB_CDNS3=m
CONFIG_USB_CDNS3_GADGET=y
CONFIG_USB_CDNS3_HOST=y
CONFIG_USB_MTU3=y
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_SUNXI=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC2=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_ISP1760=y
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_CP210X=m
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_OPTION=m
CONFIG_USB_HSIC_USB3503=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GADGET=y
CONFIG_USB_RENESAS_USBHS_UDC=m
CONFIG_USB_RENESAS_USB3=m
CONFIG_USB_TEGRA_XUDC=m
CONFIG_USB_CONFIGFS=m
CONFIG_USB_CONFIGFS_SERIAL=y
CONFIG_USB_CONFIGFS_ACM=y
CONFIG_USB_CONFIGFS_OBEX=y
CONFIG_USB_CONFIGFS_NCM=y
CONFIG_USB_CONFIGFS_ECM=y
CONFIG_USB_CONFIGFS_ECM_SUBSET=y
CONFIG_USB_CONFIGFS_RNDIS=y
CONFIG_USB_CONFIGFS_EEM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_TYPEC=m
CONFIG_TYPEC_TCPM=m
CONFIG_TYPEC_TCPCI=m
CONFIG_TYPEC_FUSB302=m
CONFIG_TYPEC_TPS6598X=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_TYPEC_HD3SS3220=m
CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ACPI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_MMC_SDHCI_OF_ESDHC=y
CONFIG_MMC_SDHCI_CADENCE=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SDHCI_TEGRA=y
CONFIG_MMC_SDHCI_F_SDH30=y
CONFIG_MMC_MESON_GX=y
CONFIG_MMC_SDHCI_MSM=y
CONFIG_MMC_SPI=y
CONFIG_MMC_SDHI=y
CONFIG_MMC_UNIPHIER=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_EXYNOS=y
CONFIG_MMC_DW_HI3798CV200=y
CONFIG_MMC_DW_K3=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SUNXI=y
CONFIG_MMC_BCM2835=y
CONFIG_MMC_MTK=y
CONFIG_MMC_SDHCI_XENON=y
CONFIG_MMC_SDHCI_AM654=y
CONFIG_MMC_OWL=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_LM3692X=m
CONFIG_LEDS_PCA9532=m
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
CONFIG_LEDS_SYSCON=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_DISK=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_EDAC=y
CONFIG_EDAC_GHES=y
CONFIG_EDAC_LAYERSCAPE=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1307=m
CONFIG_RTC_DRV_HYM8563=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_RTC_DRV_MAX77686=y
CONFIG_RTC_DRV_RK808=m
CONFIG_RTC_DRV_PCF85063=m
CONFIG_RTC_DRV_PCF85363=m
CONFIG_RTC_DRV_M41T80=m
CONFIG_RTC_DRV_RX8581=m
CONFIG_RTC_DRV_RV3028=m
CONFIG_RTC_DRV_RV8803=m
CONFIG_RTC_DRV_S5M=y
CONFIG_RTC_DRV_DS3232=y
CONFIG_RTC_DRV_PCF2127=m
CONFIG_RTC_DRV_EFI=y
CONFIG_RTC_DRV_CROS_EC=y
CONFIG_RTC_DRV_FSL_FTM_ALARM=m
CONFIG_RTC_DRV_S3C=y
CONFIG_RTC_DRV_PL031=y
CONFIG_RTC_DRV_SUN6I=y
CONFIG_RTC_DRV_ARMADA38X=y
CONFIG_RTC_DRV_PM8XXX=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_RTC_DRV_TEGRA=y
CONFIG_RTC_DRV_SNVS=m
CONFIG_RTC_DRV_IMX_SC=m
CONFIG_RTC_DRV_XGENE=y
CONFIG_RTC_DRV_MT6397=m
CONFIG_DMADEVICES=y
CONFIG_DMA_BCM2835=y
CONFIG_DMA_SUN6I=m
CONFIG_FSL_EDMA=y
CONFIG_IMX_SDMA=m
CONFIG_K3_DMA=y
CONFIG_MV_XOR=y
CONFIG_MV_XOR_V2=y
CONFIG_OWL_DMA=y
CONFIG_PL330_DMA=y
CONFIG_TEGRA186_GPC_DMA=m
CONFIG_TEGRA20_APB_DMA=y
CONFIG_TEGRA210_ADMA=m
CONFIG_QCOM_BAM_DMA=y
CONFIG_QCOM_GPI_DMA=m
CONFIG_QCOM_HIDMA_MGMT=y
CONFIG_QCOM_HIDMA=y
CONFIG_RCAR_DMAC=y
CONFIG_RENESAS_USB_DMAC=m
CONFIG_RZ_DMAC=y
CONFIG_TI_K3_UDMA=y
CONFIG_TI_K3_UDMA_GLUE_LAYER=y
CONFIG_VFIO=y
CONFIG_VFIO_PCI=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_BALLOON=y
CONFIG_VIRTIO_MMIO=y
CONFIG_XEN_GNTDEV=y
CONFIG_XEN_GRANT_DEV_ALLOC=y
CONFIG_STAGING=y
CONFIG_STAGING_MEDIA=y
CONFIG_VIDEO_HANTRO=m
CONFIG_VIDEO_IMX_MEDIA=m
CONFIG_VIDEO_MAX96712=m
CONFIG_CHROME_PLATFORMS=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_I2C=y
CONFIG_CROS_EC_SPI=y
CONFIG_CROS_EC_CHARDEV=m
CONFIG_COMMON_CLK_RK808=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_COMMON_CLK_SCMI=y
CONFIG_COMMON_CLK_SCPI=y
CONFIG_COMMON_CLK_CS2000_CP=y
CONFIG_COMMON_CLK_FSL_SAI=y
CONFIG_COMMON_CLK_S2MPS11=y
CONFIG_COMMON_CLK_PWM=y
CONFIG_COMMON_CLK_VC5=y
CONFIG_COMMON_CLK_BD718XX=m
CONFIG_CLK_RASPBERRYPI=m
CONFIG_CLK_IMX8MM=y
CONFIG_CLK_IMX8MN=y
CONFIG_CLK_IMX8MP=y
CONFIG_CLK_IMX8MQ=y
CONFIG_CLK_IMX8QXP=y
CONFIG_CLK_IMX8ULP=y
CONFIG_TI_SCI_CLK=y
CONFIG_COMMON_CLK_QCOM=y
CONFIG_QCOM_A53PLL=y
CONFIG_QCOM_CLK_APCS_MSM8916=y
CONFIG_QCOM_CLK_APCC_MSM8996=y
CONFIG_QCOM_CLK_SMD_RPM=y
CONFIG_QCOM_CLK_RPMH=y
CONFIG_IPQ_GCC_6018=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_IPQ_GCC_8074=y
CONFIG_MSM_GCC_8916=y
CONFIG_MSM_GCC_8994=y
CONFIG_MSM_MMCC_8996=y
CONFIG_MSM_GCC_8998=y
CONFIG_QCS_GCC_404=y
CONFIG_SC_GCC_7180=y
CONFIG_SC_GCC_7280=y
CONFIG_SDM_CAMCC_845=m
CONFIG_SDM_GPUCC_845=y
CONFIG_SDM_VIDEOCC_845=y
CONFIG_SDM_DISPCC_845=y
CONFIG_SM_GCC_8350=y
CONFIG_SM_GCC_8450=y
CONFIG_SM_GPUCC_8150=y
CONFIG_SM_GPUCC_8250=y
CONFIG_SM_DISPCC_8250=y
CONFIG_SM_VIDEOCC_8250=y
CONFIG_QCOM_HFPLL=y
CONFIG_CLK_GFM_LPASS_SM8250=m
CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_RENESAS_OSTM=y
CONFIG_ARM_MHU=y
CONFIG_IMX_MBOX=y
CONFIG_PLATFORM_MHU=y
CONFIG_BCM2835_MBOX=y
CONFIG_QCOM_APCS_IPC=y
CONFIG_QCOM_IPCC=y
CONFIG_ROCKCHIP_IOMMU=y
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_ARM_SMMU=y
CONFIG_ARM_SMMU_V3=y
CONFIG_MTK_IOMMU=y
CONFIG_QCOM_IOMMU=y
CONFIG_REMOTEPROC=y
CONFIG_QCOM_Q6V5_MSS=m
CONFIG_QCOM_Q6V5_PAS=m
CONFIG_QCOM_SYSMON=m
CONFIG_QCOM_WCNSS_PIL=m
CONFIG_RPMSG_CHAR=m
CONFIG_RPMSG_QCOM_GLINK_RPM=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=m
CONFIG_RPMSG_QCOM_SMD=y
CONFIG_SOUNDWIRE=m
CONFIG_SOUNDWIRE_QCOM=m
CONFIG_OWL_PM_DOMAINS=y
CONFIG_RASPBERRYPI_POWER=y
CONFIG_FSL_DPAA=y
CONFIG_FSL_MC_DPIO=y
CONFIG_FSL_RCPM=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_MTK_DEVAPC=m
CONFIG_MTK_PMIC_WRAP=y
CONFIG_MAILBOX=y
CONFIG_QCOM_AOSS_QMP=y
CONFIG_QCOM_COMMAND_DB=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_QCOM_CPR=y
CONFIG_QCOM_GENI_SE=y
CONFIG_QCOM_RMTFS_MEM=m
CONFIG_QCOM_RPMH=y
CONFIG_QCOM_RPMHPD=y
CONFIG_QCOM_RPMPD=y
CONFIG_QCOM_SMEM=y
CONFIG_QCOM_SMD_RPM=y
CONFIG_QCOM_SMP2P=y
CONFIG_QCOM_SMSM=y
CONFIG_QCOM_SOCINFO=m
CONFIG_QCOM_STATS=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_QCOM_WCNSS_CTRL=m
CONFIG_QCOM_APR=m
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_ARCH_R8A77995=y
CONFIG_ARCH_R8A77990=y
CONFIG_ARCH_R8A77950=y
CONFIG_ARCH_R8A77951=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_ARCH_R8A77965=y
CONFIG_ARCH_R8A77960=y
CONFIG_ARCH_R8A77961=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_ARCH_R8A779F0=y
CONFIG_ARCH_R8A77980=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_ARCH_R8A77970=y
CONFIG_ARCH_R8A779A0=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_ARCH_R8A774C0=y
CONFIG_ARCH_R8A774E1=y
CONFIG_ARCH_R8A774A1=y
CONFIG_ARCH_R8A774B1=y
CONFIG_ARCH_R9A07G043=y
CONFIG_ARCH_R9A07G044=y
CONFIG_ARCH_R9A07G054=y
CONFIG_ARCH_R9A09G011=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y
CONFIG_ARCH_TEGRA_186_SOC=y
CONFIG_ARCH_TEGRA_194_SOC=y
CONFIG_ARCH_TEGRA_234_SOC=y
CONFIG_TI_SCI_PM_DOMAINS=y
CONFIG_ARM_IMX_BUS_DEVFREQ=m
CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m
CONFIG_EXTCON_PTN5150=m
CONFIG_EXTCON_USB_GPIO=y
CONFIG_EXTCON_USBC_CROS_EC=y
CONFIG_RENESAS_RPCIF=m
CONFIG_IIO=y
CONFIG_EXYNOS_ADC=y
CONFIG_MAX9611=m
CONFIG_QCOM_SPMI_VADC=m
CONFIG_QCOM_SPMI_ADC5=m
CONFIG_ROCKCHIP_SARADC=m
CONFIG_RZG2L_ADC=m
arm64: defconfig: enable verdin-imx8mm relevant drivers as modules Enable various drivers which support peripherals as found on the Verdin iMX8M Mini et al. computer/system on modules: - CONFIG_CAN_MCP251XFD At least one Microchip MCP2518FDT SPI CAN controller which this driver also supports may be found on the Verdin iMX8M Mini computer/system on module. - CONFIG_BT_HCIUART_MRVL, CONFIG_BT_MRVL, CONFIG_BT_MRVL_SDIO and CONFIG_MWIFIEX_SDIO The AzureWave AW-CM276NF which these Bluetooth and Wi-Fi drivers also support may be found on the Verdin iMX8M Mini (as well as the Apalis iMX8, Colibri iMX8X and Verdin iMX8M Plus for that matter) computer/ system on module. - CONFIG_SENSORS_LM75 The TI TMP75C temperature sensor which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. - CONFIG_SND_SOC_NAU8822 The Nuvoton Technology Corporation (NTC) NAU88C22YG which this driver also supports may be found on the Verdin Development Board a carrier board for the Verdin family of computer/system on module which the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) may be mated in. - CONFIG_TI_ADS1015 The TLA2024 ADC which this driver also supports may be found on the Verdin iMX8M Mini (as well as the Verdin iMX8M Plus for that matter) computer/system on module. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:58 +08:00
CONFIG_TI_ADS1015=m
CONFIG_IIO_CROS_EC_SENSORS_CORE=m
CONFIG_IIO_CROS_EC_SENSORS=m
CONFIG_IIO_ST_LSM6DSX=m
CONFIG_IIO_CROS_EC_LIGHT_PROX=m
CONFIG_SENSORS_ISL29018=m
CONFIG_VCNL4000=m
CONFIG_IIO_ST_MAGN_3AXIS=m
CONFIG_IIO_CROS_EC_BARO=m
CONFIG_MPL3115=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_PWM=y
CONFIG_PWM_BCM2835=m
CONFIG_PWM_BRCMSTB=m
CONFIG_PWM_CROS_EC=m
CONFIG_PWM_IMX27=m
CONFIG_PWM_MESON=m
CONFIG_PWM_MTK_DISP=m
CONFIG_PWM_MEDIATEK=m
CONFIG_PWM_RCAR=m
CONFIG_PWM_RENESAS_TPU=m
CONFIG_PWM_ROCKCHIP=y
CONFIG_PWM_SAMSUNG=y
CONFIG_PWM_SL28CPLD=m
CONFIG_PWM_SUN4I=m
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_PWM_TEGRA=m
CONFIG_PWM_VISCONTI=m
CONFIG_SL28CPLD_INTC=y
CONFIG_QCOM_PDC=y
CONFIG_RESET_IMX7=y
CONFIG_RESET_QCOM_AOSS=y
CONFIG_RESET_QCOM_PDC=m
CONFIG_RESET_RZG2L_USBPHY_CTRL=y
CONFIG_RESET_TI_SCI=y
CONFIG_PHY_XGENE=y
CONFIG_PHY_SUN4I_USB=y
CONFIG_PHY_CADENCE_TORRENT=m
CONFIG_PHY_CADENCE_SIERRA=m
CONFIG_PHY_MIXEL_MIPI_DPHY=m
CONFIG_PHY_FSL_IMX8M_PCIE=y
CONFIG_PHY_HI6220_USB=y
CONFIG_PHY_HISTB_COMBPHY=y
CONFIG_PHY_HISI_INNO_USB2=y
CONFIG_PHY_MVEBU_CP110_COMPHY=y
CONFIG_PHY_MTK_TPHY=y
CONFIG_PHY_QCOM_PCIE2=m
CONFIG_PHY_QCOM_QMP=m
CONFIG_PHY_QCOM_QUSB2=m
CONFIG_PHY_QCOM_USB_HS=y
CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y
CONFIG_PHY_RCAR_GEN3_PCIE=y
CONFIG_PHY_RCAR_GEN3_USB2=y
CONFIG_PHY_RCAR_GEN3_USB3=m
CONFIG_PHY_ROCKCHIP_EMMC=y
CONFIG_PHY_ROCKCHIP_INNO_HDMI=m
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m
CONFIG_PHY_ROCKCHIP_PCIE=m
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_SAMSUNG_UFS=y
CONFIG_PHY_UNIPHIER_USB2=y
CONFIG_PHY_UNIPHIER_USB3=y
CONFIG_PHY_TEGRA_XUSB=y
CONFIG_PHY_AM654_SERDES=m
CONFIG_PHY_J721E_WIZ=m
CONFIG_ARM_SMMU_V3_PMU=m
CONFIG_FSL_IMX8_DDR_PMU=m
CONFIG_QCOM_L2_PMU=y
CONFIG_QCOM_L3_PMU=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_HISI_PMU=y
CONFIG_NVMEM_IMX_OCOTP=y
CONFIG_NVMEM_IMX_OCOTP_SCU=y
CONFIG_MTK_EFUSE=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_QCOM_QFPROM=y
CONFIG_ROCKCHIP_EFUSE=y
CONFIG_NVMEM_SUNXI_SID=y
CONFIG_UNIPHIER_EFUSE=y
CONFIG_MESON_EFUSE=m
CONFIG_NVMEM_RMEM=m
CONFIG_NVMEM_LAYERSCAPE_SFP=m
CONFIG_FPGA=y
CONFIG_FPGA_MGR_ALTERA_CVP=m
CONFIG_FPGA_MGR_STRATIX10_SOC=m
CONFIG_FPGA_BRIDGE=m
CONFIG_ALTERA_FREEZE_BRIDGE=m
CONFIG_FPGA_REGION=m
CONFIG_OF_FPGA_REGION=m
CONFIG_TEE=y
CONFIG_OPTEE=y
arm64: defconfig: re-order default configuration Use "make defconfig", "make savedefconfig" and friends to just assess re-ordering of configuration items in defconfig. This re-ordered the following configuration options: CONFIG_BPF_JIT=y CONFIG_SECCOMP=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_INTEL_STRATIX10_RSU=m CONFIG_QCOM_SCM=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y CONFIG_IMX_SCU_PD=y CONFIG_CAN_FLEXCAN=m CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_FSL_MC_BUS=y CONFIG_MTK_DEVAPC=m CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_MDIO_BUS_MUX_MMIOREG=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MESON_GXL_PHY=m CONFIG_PINCTRL_SINGLE=y CONFIG_QCOM_CPR=y CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_SENSORS_ARM_SCMI=y CONFIG_QORIQ_THERMAL=m CONFIG_SUN8I_THERMAL=y CONFIG_TEGRA_BPMP_THERMAL=m CONFIG_ARM_SMC_WATCHDOG=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m CONFIG_DRM_NWL_MIPI_DSI=m CONFIG_DRM_LONTIUM_LT9611UXC=m CONFIG_SND_SOC_FSL_SAI=m CONFIG_SND_SOC_IMX_AUDMIX=m CONFIG_TYPEC_HD3SS3220=m CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_ZYNQMP=y CONFIG_IPQ_GCC_8074=y CONFIG_SM_DISPCC_8250=y CONFIG_QCOM_WCNSS_CTRL=m CONFIG_ARCH_R8A774A1=y CONFIG_ARCH_R8A774B1=y CONFIG_ARCH_R8A774C0=y CONFIG_ARCH_R8A774E1=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77965=y CONFIG_ARCH_R8A77970=y CONFIG_ARCH_R8A779F0=y CONFIG_HISI_PMU=y CONFIG_QCOM_QFPROM=y CONFIG_MUX_MMIO=y Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29 00:00:52 +08:00
CONFIG_MUX_MMIO=y
CONFIG_SLIMBUS=m
CONFIG_SLIM_QCOM_CTRL=m
CONFIG_SLIM_QCOM_NGD_CTRL=m
CONFIG_INTERCONNECT=y
CONFIG_INTERCONNECT_IMX=m
CONFIG_INTERCONNECT_IMX8MM=m
CONFIG_INTERCONNECT_IMX8MN=m
CONFIG_INTERCONNECT_IMX8MQ=m
CONFIG_INTERCONNECT_QCOM=y
CONFIG_INTERCONNECT_QCOM_MSM8916=m
CONFIG_INTERCONNECT_QCOM_OSM_L3=m
CONFIG_INTERCONNECT_QCOM_SC7280=y
CONFIG_INTERCONNECT_QCOM_SDM845=y
CONFIG_INTERCONNECT_QCOM_SM8150=m
CONFIG_INTERCONNECT_QCOM_SM8250=m
CONFIG_INTERCONNECT_QCOM_SM8350=m
CONFIG_INTERCONNECT_QCOM_SM8450=m
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_BTRFS_FS=m
CONFIG_BTRFS_FS_POSIX_ACL=y
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA=y
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=m
CONFIG_CUSE=m
CONFIG_OVERLAY_FS=m
CONFIG_VFAT_FS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_HUGETLBFS=y
CONFIG_CONFIGFS_FS=y
CONFIG_EFIVAR_FS=y
CONFIG_SQUASHFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
arm64: Update default configuration Enable a couple of drivers that are used on Jetson TX1: * GPIO_PCA953X, GPIO_PCA953X_IRQ: Two instances of this I2C GPIO expander are used on Jetson TX1 to expand the number of usable GPIOs on the I/O board. Enable the driver for this expander along with IRQ support. * MFD_MAX77620, REGULATOR_MAX77620, PINCTRL_MAX77620, GPIO_MAX77620, RTC_DRV_MAX77686: Enable support for the PMIC and various of its components found on the Jetson TX1 processor module (p2180). * RTC_DRV_TEGRA: This RTC is usually not hooked up to a battery on boards, but it can be useful as a wakeup source from suspend to RAM. * REGULATOR_PWM: The GPU is supplied by a regulator controlled via one of the Tegra's PWM channels. * DRM, DRM_NOUVEAU, DRM_TEGRA, DRM_PANEL_SIMPLE: Enable support for an optional DSI panel on Jetson TX1 as well as the GPU. * BACKLIGHT_GENERIC, BACKLIGHT_LP855X: The backlight on Jetson TX1, if shipped with a display module, is driver by an LP8557. * PHY_TEGRA_XUSB, USB_XHCI_TEGRA: Enable support for XUSB (USB 3.0) on Jetson TX1. * PWM, PWM_TEGRA: One of the PWM channels is used to control the voltage supplied to the GPU. * NFS_V4_1, NFS_V4_2: Support these newer versions of the NFS protocol to increase compatibility with distributions. * MFD_CROS_EC, MFD_CROS_EC_I2C and I2C_CROS_EC_TUNNEL: Used to enable the ChromeOS Embedded Controller and the I2C tunnel that allows the EC to function as an I2C bridge. * BATTERY_BQ27XXX: Support the battery charger and monitor found on the Google Pixel C. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-09 01:23:19 +08:00
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_ROOT_NFS=y
CONFIG_9P_FS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_SECURITY=y
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_DEV_SUN8I_CE=m
CONFIG_CRYPTO_DEV_FSL_CAAM=m
CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m
CONFIG_CRYPTO_DEV_QCOM_RNG=m
CONFIG_CRYPTO_DEV_CCREE=m
CONFIG_CRYPTO_DEV_HISI_SEC2=m
CONFIG_CRYPTO_DEV_HISI_ZIP=m
CONFIG_CRYPTO_DEV_HISI_HPRE=m
CONFIG_CRYPTO_DEV_HISI_TRNG=m
CONFIG_CMA_SIZE_MBYTES=32
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_MEMTEST=y