2012-02-10 12:12:21 +08:00
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/*
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* SAMSUNG EXYNOS5250 SoC device tree source
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
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* EXYNOS5250 based board files can include this file and provide
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* values for board specfic bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
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* additional nodes can be added to this file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "samsung,exynos5250";
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interrupt-parent = <&gic>;
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2012-07-14 09:45:36 +08:00
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aliases {
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spi0 = &spi_0;
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spi1 = &spi_1;
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spi2 = &spi_2;
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2012-09-07 13:13:08 +08:00
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gsc0 = &gsc_0;
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gsc1 = &gsc_1;
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gsc2 = &gsc_2;
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gsc3 = &gsc_3;
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2012-07-14 09:45:36 +08:00
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};
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2012-05-15 22:47:53 +08:00
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gic:interrupt-controller@10481000 {
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2012-02-10 12:12:21 +08:00
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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2012-05-15 22:47:53 +08:00
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reg = <0x10481000 0x1000>, <0x10482000 0x2000>;
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2012-02-10 12:12:21 +08:00
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};
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2012-05-18 11:59:35 +08:00
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combiner:interrupt-controller@10440000 {
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compatible = "samsung,exynos4210-combiner";
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#interrupt-cells = <2>;
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interrupt-controller;
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samsung,combiner-nr = <32>;
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reg = <0x10440000 0x1000>;
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interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
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<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
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<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
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<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
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<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
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<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
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<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
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<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
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};
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2012-02-10 12:12:21 +08:00
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watchdog {
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compatible = "samsung,s3c2410-wdt";
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reg = <0x101D0000 0x100>;
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interrupts = <0 42 0>;
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};
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2012-10-23 21:51:33 +08:00
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codec@11000000 {
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compatible = "samsung,mfc-v6";
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reg = <0x11000000 0x10000>;
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interrupts = <0 96 0>;
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};
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2012-02-10 12:12:21 +08:00
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rtc {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x101E0000 0x100>;
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interrupts = <0 43 0>, <0 44 0>;
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};
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serial@12C00000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C00000 0x100>;
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interrupts = <0 51 0>;
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};
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serial@12C10000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C10000 0x100>;
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interrupts = <0 52 0>;
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};
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serial@12C20000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C20000 0x100>;
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interrupts = <0 53 0>;
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};
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serial@12C30000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x12C30000 0x100>;
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interrupts = <0 54 0>;
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};
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i2c@12C60000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C60000 0x100>;
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interrupts = <0 56 0>;
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2012-05-15 22:47:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-02-10 12:12:21 +08:00
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};
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i2c@12C70000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C70000 0x100>;
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interrupts = <0 57 0>;
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2012-05-15 22:47:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-02-10 12:12:21 +08:00
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};
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i2c@12C80000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C80000 0x100>;
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interrupts = <0 58 0>;
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2012-05-15 22:47:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-02-10 12:12:21 +08:00
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};
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i2c@12C90000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12C90000 0x100>;
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interrupts = <0 59 0>;
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2012-05-15 22:47:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-02-10 12:12:21 +08:00
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};
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i2c@12CA0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CA0000 0x100>;
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interrupts = <0 60 0>;
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2012-05-15 22:47:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-02-10 12:12:21 +08:00
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};
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i2c@12CB0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CB0000 0x100>;
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interrupts = <0 61 0>;
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2012-05-15 22:47:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-02-10 12:12:21 +08:00
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};
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i2c@12CC0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CC0000 0x100>;
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interrupts = <0 62 0>;
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2012-05-15 22:47:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-02-10 12:12:21 +08:00
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};
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i2c@12CD0000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x12CD0000 0x100>;
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interrupts = <0 63 0>;
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2012-05-15 22:47:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2012-02-10 12:12:21 +08:00
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};
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2012-07-14 09:45:36 +08:00
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spi_0: spi@12d20000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x12d20000 0x100>;
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interrupts = <0 66 0>;
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2012-07-18 05:13:06 +08:00
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tx-dma-channel = <&pdma0 5>; /* preliminary */
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rx-dma-channel = <&pdma0 4>; /* preliminary */
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2012-07-14 09:45:36 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi_1: spi@12d30000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x12d30000 0x100>;
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interrupts = <0 67 0>;
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2012-07-18 05:13:06 +08:00
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tx-dma-channel = <&pdma1 5>; /* preliminary */
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rx-dma-channel = <&pdma1 4>; /* preliminary */
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2012-07-14 09:45:36 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi_2: spi@12d40000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x12d40000 0x100>;
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interrupts = <0 68 0>;
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2012-07-18 05:13:06 +08:00
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tx-dma-channel = <&pdma0 7>; /* preliminary */
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rx-dma-channel = <&pdma0 6>; /* preliminary */
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2012-07-14 09:45:36 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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};
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2012-09-26 08:02:59 +08:00
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dwmmc0@12200000 {
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compatible = "samsung,exynos5250-dw-mshc";
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reg = <0x12200000 0x1000>;
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interrupts = <0 75 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dwmmc1@12210000 {
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compatible = "samsung,exynos5250-dw-mshc";
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reg = <0x12210000 0x1000>;
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interrupts = <0 76 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dwmmc2@12220000 {
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compatible = "samsung,exynos5250-dw-mshc";
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reg = <0x12220000 0x1000>;
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dwmmc3@12230000 {
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compatible = "samsung,exynos5250-dw-mshc";
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reg = <0x12230000 0x1000>;
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interrupts = <0 78 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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2012-02-10 12:12:21 +08:00
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amba {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "arm,amba-bus";
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interrupt-parent = <&gic>;
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ranges;
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pdma0: pdma@121A0000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x121A0000 0x1000>;
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interrupts = <0 34 0>;
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};
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pdma1: pdma@121B0000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x121B0000 0x1000>;
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interrupts = <0 35 0>;
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};
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2012-05-15 22:47:53 +08:00
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mdma0: mdma@10800000 {
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2012-02-10 12:12:21 +08:00
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x10800000 0x1000>;
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interrupts = <0 33 0>;
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};
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2012-05-15 22:47:53 +08:00
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mdma1: mdma@11C10000 {
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2012-02-10 12:12:21 +08:00
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x11C10000 0x1000>;
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interrupts = <0 124 0>;
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};
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};
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gpio-controllers {
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#address-cells = <1>;
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#size-cells = <1>;
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gpio-controller;
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ranges;
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gpa0: gpio-controller@11400000 {
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compatible = "samsung,exynos4-gpio";
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reg = <0x11400000 0x20>;
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#gpio-cells = <4>;
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};
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gpa1: gpio-controller@11400020 {
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compatible = "samsung,exynos4-gpio";
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reg = <0x11400020 0x20>;
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#gpio-cells = <4>;
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};
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gpa2: gpio-controller@11400040 {
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compatible = "samsung,exynos4-gpio";
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reg = <0x11400040 0x20>;
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#gpio-cells = <4>;
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};
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gpb0: gpio-controller@11400060 {
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compatible = "samsung,exynos4-gpio";
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reg = <0x11400060 0x20>;
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#gpio-cells = <4>;
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};
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gpb1: gpio-controller@11400080 {
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compatible = "samsung,exynos4-gpio";
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reg = <0x11400080 0x20>;
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#gpio-cells = <4>;
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};
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gpb2: gpio-controller@114000A0 {
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compatible = "samsung,exynos4-gpio";
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reg = <0x114000A0 0x20>;
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#gpio-cells = <4>;
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};
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gpb3: gpio-controller@114000C0 {
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compatible = "samsung,exynos4-gpio";
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reg = <0x114000C0 0x20>;
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#gpio-cells = <4>;
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};
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gpc0: gpio-controller@114000E0 {
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compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x114000E0 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpc1: gpio-controller@11400100 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400100 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpc2: gpio-controller@11400120 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400120 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpc3: gpio-controller@11400140 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400140 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-15 22:47:53 +08:00
|
|
|
gpc4: gpio-controller@114002E0 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x114002E0 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-02-10 12:12:21 +08:00
|
|
|
gpd0: gpio-controller@11400160 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400160 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpd1: gpio-controller@11400180 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400180 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpy0: gpio-controller@114001A0 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x114001A0 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpy1: gpio-controller@114001C0 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x114001C0 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpy2: gpio-controller@114001E0 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x114001E0 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpy3: gpio-controller@11400200 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400200 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpy4: gpio-controller@11400220 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400220 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpy5: gpio-controller@11400240 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400240 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpy6: gpio-controller@11400260 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400260 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpx0: gpio-controller@11400C00 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400C00 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpx1: gpio-controller@11400C20 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400C20 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpx2: gpio-controller@11400C40 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400C40 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpx3: gpio-controller@11400C60 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x11400C60 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpe0: gpio-controller@13400000 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x13400000 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpe1: gpio-controller@13400020 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x13400020 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpf0: gpio-controller@13400040 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x13400040 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpf1: gpio-controller@13400060 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x13400060 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpg0: gpio-controller@13400080 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x13400080 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpg1: gpio-controller@134000A0 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x134000A0 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpg2: gpio-controller@134000C0 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x134000C0 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gph0: gpio-controller@134000E0 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x134000E0 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gph1: gpio-controller@13400100 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x13400100 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpv0: gpio-controller@10D10000 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x10D10000 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpv1: gpio-controller@10D10020 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x10D10020 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpv2: gpio-controller@10D10040 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
2012-05-15 22:47:53 +08:00
|
|
|
reg = <0x10D10060 0x20>;
|
2012-02-10 12:12:21 +08:00
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpv3: gpio-controller@10D10060 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
2012-05-15 22:47:53 +08:00
|
|
|
reg = <0x10D10080 0x20>;
|
2012-02-10 12:12:21 +08:00
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpv4: gpio-controller@10D10080 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
2012-05-15 22:47:53 +08:00
|
|
|
reg = <0x10D100C0 0x20>;
|
2012-02-10 12:12:21 +08:00
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpz: gpio-controller@03860000 {
|
|
|
|
|
compatible = "samsung,exynos4-gpio";
|
|
|
|
|
reg = <0x03860000 0x20>;
|
|
|
|
|
#gpio-cells = <4>;
|
|
|
|
|
};
|
|
|
|
|
};
|
2012-09-07 13:13:08 +08:00
|
|
|
|
|
|
|
|
gsc_0: gsc@0x13e00000 {
|
|
|
|
|
compatible = "samsung,exynos5-gsc";
|
|
|
|
|
reg = <0x13e00000 0x1000>;
|
|
|
|
|
interrupts = <0 85 0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gsc_1: gsc@0x13e10000 {
|
|
|
|
|
compatible = "samsung,exynos5-gsc";
|
|
|
|
|
reg = <0x13e10000 0x1000>;
|
|
|
|
|
interrupts = <0 86 0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gsc_2: gsc@0x13e20000 {
|
|
|
|
|
compatible = "samsung,exynos5-gsc";
|
|
|
|
|
reg = <0x13e20000 0x1000>;
|
|
|
|
|
interrupts = <0 87 0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gsc_3: gsc@0x13e30000 {
|
|
|
|
|
compatible = "samsung,exynos5-gsc";
|
|
|
|
|
reg = <0x13e30000 0x1000>;
|
|
|
|
|
interrupts = <0 88 0>;
|
|
|
|
|
};
|
2012-02-10 12:12:21 +08:00
|
|
|
};
|
