2015-04-24 23:58:30 +08:00
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/*
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* MMC35240 - MEMSIC 3-axis Magnetic Sensor
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*
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* Copyright (c) 2015, Intel Corporation.
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*
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* This file is subject to the terms and conditions of version 2 of
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* the GNU General Public License. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* IIO driver for MMC35240 (7-bit I2C slave address 0x30).
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*
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* TODO: offset, ACPI, continuous measurement mode, PM
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/delay.h>
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#include <linux/regmap.h>
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2015-04-24 23:58:32 +08:00
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#include <linux/acpi.h>
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2015-04-24 23:58:31 +08:00
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#include <linux/pm.h>
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2015-04-24 23:58:30 +08:00
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#define MMC35240_DRV_NAME "mmc35240"
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#define MMC35240_REGMAP_NAME "mmc35240_regmap"
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#define MMC35240_REG_XOUT_L 0x00
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#define MMC35240_REG_XOUT_H 0x01
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#define MMC35240_REG_YOUT_L 0x02
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#define MMC35240_REG_YOUT_H 0x03
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#define MMC35240_REG_ZOUT_L 0x04
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#define MMC35240_REG_ZOUT_H 0x05
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#define MMC35240_REG_STATUS 0x06
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#define MMC35240_REG_CTRL0 0x07
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#define MMC35240_REG_CTRL1 0x08
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#define MMC35240_REG_ID 0x20
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#define MMC35240_STATUS_MEAS_DONE_BIT BIT(0)
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#define MMC35240_CTRL0_REFILL_BIT BIT(7)
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#define MMC35240_CTRL0_RESET_BIT BIT(6)
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#define MMC35240_CTRL0_SET_BIT BIT(5)
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#define MMC35240_CTRL0_CMM_BIT BIT(1)
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#define MMC35240_CTRL0_TM_BIT BIT(0)
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/* output resolution bits */
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#define MMC35240_CTRL1_BW0_BIT BIT(0)
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#define MMC35240_CTRL1_BW1_BIT BIT(1)
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#define MMC35240_CTRL1_BW_MASK (MMC35240_CTRL1_BW0_BIT | \
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MMC35240_CTRL1_BW1_BIT)
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#define MMC35240_CTRL1_BW_SHIFT 0
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#define MMC35240_WAIT_CHARGE_PUMP 50000 /* us */
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#define MMC53240_WAIT_SET_RESET 1000 /* us */
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2015-06-05 19:03:15 +08:00
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/*
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* Memsic OTP process code piece is put here for reference:
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*
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* #define OTP_CONVERT(REG) ((float)((REG) >=32 ? (32 - (REG)) : (REG)) * 0.006
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* 1) For X axis, the COEFFICIENT is always 1.
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* 2) For Y axis, the COEFFICIENT is as below:
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* f_OTP_matrix[4] = OTP_CONVERT(((reg_data[1] & 0x03) << 4) |
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* (reg_data[2] >> 4)) + 1.0;
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* 3) For Z axis, the COEFFICIENT is as below:
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* f_OTP_matrix[8] = (OTP_CONVERT(reg_data[3] & 0x3f) + 1) * 1.35;
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* We implemented the OTP logic into driver.
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*/
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/* scale = 1000 here for Y otp */
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#define MMC35240_OTP_CONVERT_Y(REG) (((REG) >= 32 ? (32 - (REG)) : (REG)) * 6)
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/* 0.6 * 1.35 = 0.81, scale 10000 for Z otp */
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#define MMC35240_OTP_CONVERT_Z(REG) (((REG) >= 32 ? (32 - (REG)) : (REG)) * 81)
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#define MMC35240_X_COEFF(x) (x)
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#define MMC35240_Y_COEFF(y) (y + 1000)
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#define MMC35240_Z_COEFF(z) (z + 13500)
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#define MMC35240_OTP_START_ADDR 0x1B
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2015-04-24 23:58:30 +08:00
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enum mmc35240_resolution {
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2015-06-29 20:44:50 +08:00
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MMC35240_16_BITS_SLOW = 0, /* 7.92 ms */
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MMC35240_16_BITS_FAST, /* 4.08 ms */
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MMC35240_14_BITS, /* 2.16 ms */
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MMC35240_12_BITS, /* 1.20 ms */
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2015-04-24 23:58:30 +08:00
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};
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enum mmc35240_axis {
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AXIS_X = 0,
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AXIS_Y,
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AXIS_Z,
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};
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static const struct {
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int sens[3]; /* sensitivity per X, Y, Z axis */
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int nfo; /* null field output */
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} mmc35240_props_table[] = {
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2015-06-29 20:44:50 +08:00
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/* 16 bits, 125Hz ODR */
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2015-04-24 23:58:30 +08:00
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{
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2015-06-05 19:03:14 +08:00
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{1024, 1024, 1024},
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2015-04-24 23:58:30 +08:00
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32768,
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},
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2015-06-29 20:44:50 +08:00
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/* 16 bits, 250Hz ODR */
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2015-04-24 23:58:30 +08:00
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{
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{1024, 1024, 770},
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32768,
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},
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2015-06-29 20:44:50 +08:00
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/* 14 bits, 450Hz ODR */
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2015-04-24 23:58:30 +08:00
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{
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{256, 256, 193},
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8192,
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},
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2015-06-29 20:44:50 +08:00
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/* 12 bits, 800Hz ODR */
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2015-04-24 23:58:30 +08:00
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{
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{64, 64, 48},
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2048,
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},
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};
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struct mmc35240_data {
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struct i2c_client *client;
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struct mutex mutex;
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struct regmap *regmap;
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enum mmc35240_resolution res;
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2015-06-05 19:03:15 +08:00
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/* OTP compensation */
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int axis_coef[3];
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int axis_scale[3];
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2015-04-24 23:58:30 +08:00
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};
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2015-06-29 20:44:50 +08:00
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static const struct {
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int val;
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int val2;
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} mmc35240_samp_freq[] = { {1, 500000},
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{13, 0},
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{25, 0},
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{50, 0} };
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2015-04-24 23:58:30 +08:00
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2015-06-29 20:44:50 +08:00
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static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("1.5 13 25 50");
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2015-04-24 23:58:30 +08:00
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#define MMC35240_CHANNEL(_axis) { \
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.type = IIO_MAGN, \
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.modified = 1, \
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.channel2 = IIO_MOD_ ## _axis, \
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.address = AXIS_ ## _axis, \
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2015-06-05 19:03:12 +08:00
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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2015-04-24 23:58:30 +08:00
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}
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static const struct iio_chan_spec mmc35240_channels[] = {
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MMC35240_CHANNEL(X),
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MMC35240_CHANNEL(Y),
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MMC35240_CHANNEL(Z),
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};
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static struct attribute *mmc35240_attributes[] = {
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&iio_const_attr_sampling_frequency_available.dev_attr.attr,
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2015-06-05 19:03:11 +08:00
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NULL
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2015-04-24 23:58:30 +08:00
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};
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static const struct attribute_group mmc35240_attribute_group = {
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.attrs = mmc35240_attributes,
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};
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static int mmc35240_get_samp_freq_index(struct mmc35240_data *data,
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int val, int val2)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(mmc35240_samp_freq); i++)
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2015-06-29 20:44:50 +08:00
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if (mmc35240_samp_freq[i].val == val &&
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mmc35240_samp_freq[i].val2 == val2)
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2015-04-24 23:58:30 +08:00
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return i;
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return -EINVAL;
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}
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static int mmc35240_hw_set(struct mmc35240_data *data, bool set)
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{
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int ret;
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u8 coil_bit;
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/*
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* Recharge the capacitor at VCAP pin, requested to be issued
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* before a SET/RESET command.
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*/
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ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL0,
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MMC35240_CTRL0_REFILL_BIT,
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MMC35240_CTRL0_REFILL_BIT);
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if (ret < 0)
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return ret;
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usleep_range(MMC35240_WAIT_CHARGE_PUMP, MMC35240_WAIT_CHARGE_PUMP + 1);
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if (set)
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coil_bit = MMC35240_CTRL0_SET_BIT;
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else
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coil_bit = MMC35240_CTRL0_RESET_BIT;
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return regmap_update_bits(data->regmap, MMC35240_REG_CTRL0,
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2015-07-14 22:56:53 +08:00
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coil_bit, coil_bit);
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2015-04-24 23:58:30 +08:00
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}
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static int mmc35240_init(struct mmc35240_data *data)
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{
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2015-06-05 19:03:15 +08:00
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int ret, y_convert, z_convert;
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2015-04-24 23:58:30 +08:00
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unsigned int reg_id;
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2015-06-05 19:03:15 +08:00
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u8 otp_data[6];
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2015-04-24 23:58:30 +08:00
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ret = regmap_read(data->regmap, MMC35240_REG_ID, ®_id);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading product id\n");
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return ret;
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}
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dev_dbg(&data->client->dev, "MMC35240 chip id %x\n", reg_id);
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/*
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* make sure we restore sensor characteristics, by doing
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2015-07-14 22:56:54 +08:00
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* a SET/RESET sequence, the axis polarity being naturally
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* aligned after RESET
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2015-04-24 23:58:30 +08:00
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*/
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2015-07-14 22:56:54 +08:00
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ret = mmc35240_hw_set(data, true);
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2015-04-24 23:58:30 +08:00
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if (ret < 0)
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return ret;
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usleep_range(MMC53240_WAIT_SET_RESET, MMC53240_WAIT_SET_RESET + 1);
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2015-07-14 22:56:54 +08:00
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ret = mmc35240_hw_set(data, false);
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2015-04-24 23:58:30 +08:00
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if (ret < 0)
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return ret;
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/* set default sampling frequency */
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2015-06-05 19:03:15 +08:00
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ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL1,
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MMC35240_CTRL1_BW_MASK,
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data->res << MMC35240_CTRL1_BW_SHIFT);
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if (ret < 0)
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return ret;
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ret = regmap_bulk_read(data->regmap, MMC35240_OTP_START_ADDR,
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(u8 *)otp_data, sizeof(otp_data));
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if (ret < 0)
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return ret;
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y_convert = MMC35240_OTP_CONVERT_Y(((otp_data[1] & 0x03) << 4) |
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(otp_data[2] >> 4));
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z_convert = MMC35240_OTP_CONVERT_Z(otp_data[3] & 0x3f);
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data->axis_coef[0] = MMC35240_X_COEFF(1);
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data->axis_coef[1] = MMC35240_Y_COEFF(y_convert);
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data->axis_coef[2] = MMC35240_Z_COEFF(z_convert);
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data->axis_scale[0] = 1;
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data->axis_scale[1] = 1000;
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data->axis_scale[2] = 10000;
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return 0;
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2015-04-24 23:58:30 +08:00
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}
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static int mmc35240_take_measurement(struct mmc35240_data *data)
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{
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int ret, tries = 100;
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unsigned int reg_status;
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ret = regmap_write(data->regmap, MMC35240_REG_CTRL0,
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MMC35240_CTRL0_TM_BIT);
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if (ret < 0)
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return ret;
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while (tries-- > 0) {
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ret = regmap_read(data->regmap, MMC35240_REG_STATUS,
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®_status);
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if (ret < 0)
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return ret;
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if (reg_status & MMC35240_STATUS_MEAS_DONE_BIT)
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break;
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2015-06-05 19:03:13 +08:00
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/* minimum wait time to complete measurement is 10 ms */
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usleep_range(10000, 11000);
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2015-04-24 23:58:30 +08:00
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}
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if (tries < 0) {
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dev_err(&data->client->dev, "data not ready\n");
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return -EIO;
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}
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return 0;
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}
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static int mmc35240_read_measurement(struct mmc35240_data *data, __le16 buf[3])
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{
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int ret;
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ret = mmc35240_take_measurement(data);
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if (ret < 0)
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return ret;
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return regmap_bulk_read(data->regmap, MMC35240_REG_XOUT_L, (u8 *)buf,
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3 * sizeof(__le16));
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}
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2015-06-05 19:03:12 +08:00
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/**
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* mmc35240_raw_to_mgauss - convert raw readings to milli gauss. Also apply
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compensation for output value.
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*
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* @data: device private data
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* @index: axis index for which we want the conversion
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* @buf: raw data to be converted, 2 bytes in little endian format
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* @val: compensated output reading (unit is milli gauss)
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*
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* Returns: 0 in case of success, -EINVAL when @index is not valid
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*/
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static int mmc35240_raw_to_mgauss(struct mmc35240_data *data, int index,
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__le16 buf[], int *val)
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2015-04-24 23:58:30 +08:00
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{
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2015-07-31 22:27:24 +08:00
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int raw[3];
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int sens[3];
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2015-04-24 23:58:30 +08:00
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int nfo;
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2015-07-31 22:27:24 +08:00
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raw[AXIS_X] = le16_to_cpu(buf[AXIS_X]);
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raw[AXIS_Y] = le16_to_cpu(buf[AXIS_Y]);
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|
raw[AXIS_Z] = le16_to_cpu(buf[AXIS_Z]);
|
2015-04-24 23:58:30 +08:00
|
|
|
|
2015-07-31 22:27:24 +08:00
|
|
|
sens[AXIS_X] = mmc35240_props_table[data->res].sens[AXIS_X];
|
|
|
|
sens[AXIS_Y] = mmc35240_props_table[data->res].sens[AXIS_Y];
|
|
|
|
sens[AXIS_Z] = mmc35240_props_table[data->res].sens[AXIS_Z];
|
2015-04-24 23:58:30 +08:00
|
|
|
|
|
|
|
nfo = mmc35240_props_table[data->res].nfo;
|
|
|
|
|
|
|
|
switch (index) {
|
|
|
|
case AXIS_X:
|
2015-07-31 22:27:24 +08:00
|
|
|
*val = (raw[AXIS_X] - nfo) * 1000 / sens[AXIS_X];
|
2015-04-24 23:58:30 +08:00
|
|
|
break;
|
|
|
|
case AXIS_Y:
|
2015-07-31 22:27:24 +08:00
|
|
|
*val = (raw[AXIS_Y] - nfo) * 1000 / sens[AXIS_Y] -
|
|
|
|
(raw[AXIS_Z] - nfo) * 1000 / sens[AXIS_Z];
|
2015-04-24 23:58:30 +08:00
|
|
|
break;
|
|
|
|
case AXIS_Z:
|
2015-07-31 22:27:24 +08:00
|
|
|
*val = (raw[AXIS_Y] - nfo) * 1000 / sens[AXIS_Y] +
|
|
|
|
(raw[AXIS_Z] - nfo) * 1000 / sens[AXIS_Z];
|
2015-04-24 23:58:30 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2015-06-05 19:03:15 +08:00
|
|
|
/* apply OTP compensation */
|
|
|
|
*val = (*val) * data->axis_coef[index] / data->axis_scale[index];
|
|
|
|
|
2015-04-24 23:58:30 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mmc35240_read_raw(struct iio_dev *indio_dev,
|
|
|
|
struct iio_chan_spec const *chan, int *val,
|
|
|
|
int *val2, long mask)
|
|
|
|
{
|
|
|
|
struct mmc35240_data *data = iio_priv(indio_dev);
|
|
|
|
int ret, i;
|
|
|
|
unsigned int reg;
|
|
|
|
__le16 buf[3];
|
|
|
|
|
|
|
|
switch (mask) {
|
2015-06-05 19:03:12 +08:00
|
|
|
case IIO_CHAN_INFO_RAW:
|
2015-04-24 23:58:30 +08:00
|
|
|
mutex_lock(&data->mutex);
|
|
|
|
ret = mmc35240_read_measurement(data, buf);
|
|
|
|
mutex_unlock(&data->mutex);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2015-06-05 19:03:12 +08:00
|
|
|
ret = mmc35240_raw_to_mgauss(data, chan->address, buf, val);
|
2015-04-24 23:58:30 +08:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2015-06-05 19:03:12 +08:00
|
|
|
return IIO_VAL_INT;
|
|
|
|
case IIO_CHAN_INFO_SCALE:
|
|
|
|
*val = 0;
|
|
|
|
*val2 = 1000;
|
2015-04-24 23:58:30 +08:00
|
|
|
return IIO_VAL_INT_PLUS_MICRO;
|
|
|
|
case IIO_CHAN_INFO_SAMP_FREQ:
|
|
|
|
mutex_lock(&data->mutex);
|
|
|
|
ret = regmap_read(data->regmap, MMC35240_REG_CTRL1, ®);
|
|
|
|
mutex_unlock(&data->mutex);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
i = (reg & MMC35240_CTRL1_BW_MASK) >> MMC35240_CTRL1_BW_SHIFT;
|
2015-05-27 16:20:52 +08:00
|
|
|
if (i < 0 || i >= ARRAY_SIZE(mmc35240_samp_freq))
|
2015-04-24 23:58:30 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
2015-06-29 20:44:50 +08:00
|
|
|
*val = mmc35240_samp_freq[i].val;
|
|
|
|
*val2 = mmc35240_samp_freq[i].val2;
|
|
|
|
return IIO_VAL_INT_PLUS_MICRO;
|
2015-04-24 23:58:30 +08:00
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mmc35240_write_raw(struct iio_dev *indio_dev,
|
|
|
|
struct iio_chan_spec const *chan, int val,
|
|
|
|
int val2, long mask)
|
|
|
|
{
|
|
|
|
struct mmc35240_data *data = iio_priv(indio_dev);
|
|
|
|
int i, ret;
|
|
|
|
|
|
|
|
switch (mask) {
|
|
|
|
case IIO_CHAN_INFO_SAMP_FREQ:
|
|
|
|
i = mmc35240_get_samp_freq_index(data, val, val2);
|
|
|
|
if (i < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
mutex_lock(&data->mutex);
|
|
|
|
ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL1,
|
|
|
|
MMC35240_CTRL1_BW_MASK,
|
|
|
|
i << MMC35240_CTRL1_BW_SHIFT);
|
|
|
|
mutex_unlock(&data->mutex);
|
|
|
|
return ret;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct iio_info mmc35240_info = {
|
|
|
|
.driver_module = THIS_MODULE,
|
|
|
|
.read_raw = mmc35240_read_raw,
|
|
|
|
.write_raw = mmc35240_write_raw,
|
|
|
|
.attrs = &mmc35240_attribute_group,
|
|
|
|
};
|
|
|
|
|
|
|
|
static bool mmc35240_is_writeable_reg(struct device *dev, unsigned int reg)
|
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case MMC35240_REG_CTRL0:
|
|
|
|
case MMC35240_REG_CTRL1:
|
|
|
|
return true;
|
|
|
|
default:
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool mmc35240_is_readable_reg(struct device *dev, unsigned int reg)
|
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case MMC35240_REG_XOUT_L:
|
|
|
|
case MMC35240_REG_XOUT_H:
|
|
|
|
case MMC35240_REG_YOUT_L:
|
|
|
|
case MMC35240_REG_YOUT_H:
|
|
|
|
case MMC35240_REG_ZOUT_L:
|
|
|
|
case MMC35240_REG_ZOUT_H:
|
|
|
|
case MMC35240_REG_STATUS:
|
|
|
|
case MMC35240_REG_ID:
|
|
|
|
return true;
|
|
|
|
default:
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool mmc35240_is_volatile_reg(struct device *dev, unsigned int reg)
|
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case MMC35240_REG_CTRL0:
|
|
|
|
case MMC35240_REG_CTRL1:
|
|
|
|
return false;
|
|
|
|
default:
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct reg_default mmc35240_reg_defaults[] = {
|
|
|
|
{ MMC35240_REG_CTRL0, 0x00 },
|
|
|
|
{ MMC35240_REG_CTRL1, 0x00 },
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_config mmc35240_regmap_config = {
|
|
|
|
.name = MMC35240_REGMAP_NAME,
|
|
|
|
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
|
|
|
|
.max_register = MMC35240_REG_ID,
|
|
|
|
.cache_type = REGCACHE_FLAT,
|
|
|
|
|
|
|
|
.writeable_reg = mmc35240_is_writeable_reg,
|
|
|
|
.readable_reg = mmc35240_is_readable_reg,
|
|
|
|
.volatile_reg = mmc35240_is_volatile_reg,
|
|
|
|
|
|
|
|
.reg_defaults = mmc35240_reg_defaults,
|
|
|
|
.num_reg_defaults = ARRAY_SIZE(mmc35240_reg_defaults),
|
|
|
|
};
|
|
|
|
|
|
|
|
static int mmc35240_probe(struct i2c_client *client,
|
|
|
|
const struct i2c_device_id *id)
|
|
|
|
{
|
|
|
|
struct mmc35240_data *data;
|
|
|
|
struct iio_dev *indio_dev;
|
|
|
|
struct regmap *regmap;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
|
|
|
|
if (!indio_dev)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
regmap = devm_regmap_init_i2c(client, &mmc35240_regmap_config);
|
|
|
|
if (IS_ERR(regmap)) {
|
|
|
|
dev_err(&client->dev, "regmap initialization failed\n");
|
|
|
|
return PTR_ERR(regmap);
|
|
|
|
}
|
|
|
|
|
|
|
|
data = iio_priv(indio_dev);
|
2015-07-14 22:56:52 +08:00
|
|
|
i2c_set_clientdata(client, indio_dev);
|
2015-04-24 23:58:30 +08:00
|
|
|
data->client = client;
|
|
|
|
data->regmap = regmap;
|
|
|
|
data->res = MMC35240_16_BITS_SLOW;
|
|
|
|
|
|
|
|
mutex_init(&data->mutex);
|
|
|
|
|
|
|
|
indio_dev->dev.parent = &client->dev;
|
|
|
|
indio_dev->info = &mmc35240_info;
|
|
|
|
indio_dev->name = MMC35240_DRV_NAME;
|
|
|
|
indio_dev->channels = mmc35240_channels;
|
|
|
|
indio_dev->num_channels = ARRAY_SIZE(mmc35240_channels);
|
|
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
|
|
|
|
ret = mmc35240_init(data);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(&client->dev, "mmc35240 chip init failed\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
return devm_iio_device_register(&client->dev, indio_dev);
|
|
|
|
}
|
|
|
|
|
2015-04-24 23:58:31 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int mmc35240_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
|
|
|
|
struct mmc35240_data *data = iio_priv(indio_dev);
|
|
|
|
|
|
|
|
regcache_cache_only(data->regmap, true);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mmc35240_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
|
|
|
|
struct mmc35240_data *data = iio_priv(indio_dev);
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
regcache_mark_dirty(data->regmap);
|
|
|
|
ret = regcache_sync_region(data->regmap, MMC35240_REG_CTRL0,
|
|
|
|
MMC35240_REG_CTRL1);
|
|
|
|
if (ret < 0)
|
|
|
|
dev_err(dev, "Failed to restore control registers\n");
|
|
|
|
|
|
|
|
regcache_cache_only(data->regmap, false);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static const struct dev_pm_ops mmc35240_pm_ops = {
|
|
|
|
SET_SYSTEM_SLEEP_PM_OPS(mmc35240_suspend, mmc35240_resume)
|
|
|
|
};
|
|
|
|
|
2015-07-17 16:34:35 +08:00
|
|
|
static const struct of_device_id mmc35240_of_match[] = {
|
|
|
|
{ .compatible = "memsic,mmc35240", },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, mmc35240_of_match);
|
|
|
|
|
2015-04-24 23:58:32 +08:00
|
|
|
static const struct acpi_device_id mmc35240_acpi_match[] = {
|
|
|
|
{"MMC35240", 0},
|
|
|
|
{ },
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(acpi, mmc35240_acpi_match);
|
|
|
|
|
2015-04-24 23:58:30 +08:00
|
|
|
static const struct i2c_device_id mmc35240_id[] = {
|
2015-06-05 19:03:10 +08:00
|
|
|
{"mmc35240", 0},
|
2015-04-24 23:58:30 +08:00
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, mmc35240_id);
|
|
|
|
|
|
|
|
static struct i2c_driver mmc35240_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = MMC35240_DRV_NAME,
|
2015-07-17 16:34:35 +08:00
|
|
|
.of_match_table = mmc35240_of_match,
|
2015-04-24 23:58:31 +08:00
|
|
|
.pm = &mmc35240_pm_ops,
|
2015-04-24 23:58:32 +08:00
|
|
|
.acpi_match_table = ACPI_PTR(mmc35240_acpi_match),
|
2015-04-24 23:58:30 +08:00
|
|
|
},
|
|
|
|
.probe = mmc35240_probe,
|
|
|
|
.id_table = mmc35240_id,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_i2c_driver(mmc35240_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
|
|
|
|
MODULE_DESCRIPTION("MEMSIC MMC35240 magnetic sensor driver");
|
|
|
|
MODULE_LICENSE("GPL v2");
|