2019-06-03 23:23:31 +08:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// Ingenic JZ47xx KMS driver
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//
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// Copyright (C) 2019, Paul Cercueil <paul@crapouillou.net>
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2020-07-17 00:38:41 +08:00
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#include "ingenic-drm.h"
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drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
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#include <linux/component.h>
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2019-06-03 23:23:31 +08:00
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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2021-05-24 01:04:15 +08:00
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#include <linux/io.h>
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2019-06-03 23:23:31 +08:00
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#include <linux/module.h>
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drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
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#include <linux/mutex.h>
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2019-06-03 23:23:31 +08:00
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#include <linux/of_device.h>
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2020-09-27 01:04:56 +08:00
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#include <linux/of_reserved_mem.h>
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2019-06-03 23:23:31 +08:00
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#include <linux/platform_device.h>
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2020-11-29 01:16:06 +08:00
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#include <linux/pm.h>
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2019-06-03 23:23:31 +08:00
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#include <linux/regmap.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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2019-08-26 23:26:29 +08:00
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#include <drm/drm_bridge.h>
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2020-09-28 03:36:45 +08:00
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#include <drm/drm_color_mgmt.h>
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2019-06-03 23:23:31 +08:00
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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2021-05-24 01:04:15 +08:00
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#include <drm/drm_damage_helper.h>
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2019-06-03 23:23:31 +08:00
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#include <drm/drm_drv.h>
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2021-03-27 19:57:42 +08:00
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#include <drm/drm_encoder.h>
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2019-06-03 23:23:31 +08:00
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_fourcc.h>
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2021-02-22 22:17:56 +08:00
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#include <drm/drm_gem_atomic_helper.h>
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2019-06-03 23:23:31 +08:00
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#include <drm/drm_gem_framebuffer_helper.h>
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2020-03-23 22:49:15 +08:00
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#include <drm/drm_managed.h>
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2019-06-03 23:23:31 +08:00
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_plane.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_vblank.h>
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2021-10-27 02:12:35 +08:00
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#define HWDESC_PALETTE 2
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2019-06-03 23:23:31 +08:00
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struct ingenic_dma_hwdesc {
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u32 next;
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u32 addr;
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u32 id;
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u32 cmd;
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2020-09-27 01:04:57 +08:00
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} __aligned(16);
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struct ingenic_dma_hwdescs {
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2021-10-27 02:12:35 +08:00
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struct ingenic_dma_hwdesc hwdesc[3];
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2020-09-28 03:36:45 +08:00
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u16 palette[256] __aligned(16);
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2020-09-27 01:04:57 +08:00
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};
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2019-06-03 23:23:31 +08:00
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struct jz_soc_info {
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bool needs_dev_clk;
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2020-07-17 00:38:43 +08:00
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bool has_osd;
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2021-05-24 01:04:15 +08:00
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bool map_noncoherent;
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2019-12-10 22:41:41 +08:00
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unsigned int max_width, max_height;
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2020-09-27 01:04:58 +08:00
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const u32 *formats_f0, *formats_f1;
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unsigned int num_formats_f0, num_formats_f1;
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2019-06-03 23:23:31 +08:00
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};
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2021-10-27 02:12:36 +08:00
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struct ingenic_drm_private_state {
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struct drm_private_state base;
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};
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2019-06-03 23:23:31 +08:00
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struct ingenic_drm {
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struct drm_device drm;
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2020-07-17 00:38:43 +08:00
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/*
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* f1 (aka. foreground1) is our primary plane, on top of which
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* f0 (aka. foreground0) can be overlayed. Z-order is fixed in
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* hardware and cannot be changed.
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*/
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drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
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struct drm_plane f0, f1, *ipu_plane;
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2019-06-03 23:23:31 +08:00
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struct drm_crtc crtc;
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struct device *dev;
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struct regmap *map;
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struct clk *lcd_clk, *pix_clk;
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2019-12-10 22:41:41 +08:00
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const struct jz_soc_info *soc_info;
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2019-06-03 23:23:31 +08:00
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2020-09-27 01:04:57 +08:00
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struct ingenic_dma_hwdescs *dma_hwdescs;
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dma_addr_t dma_hwdescs_phys;
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2019-06-28 02:21:13 +08:00
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bool panel_is_sharp;
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2020-07-17 00:38:43 +08:00
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bool no_vblank;
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drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
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/*
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* clk_mutex is used to synchronize the pixel clock rate update with
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* the VBLANK. When the pixel clock's parent clock needs to be updated,
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* clock_nb's notifier function will lock the mutex, then wait until the
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* next VBLANK. At that point, the parent clock's rate can be updated,
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* and the mutex is then unlocked. If an atomic commit happens in the
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* meantime, it will lock on the mutex, effectively waiting until the
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* clock update process finishes. Finally, the pixel clock's rate will
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* be recomputed when the mutex has been released, in the pending atomic
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* commit, or a future one.
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*/
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struct mutex clk_mutex;
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bool update_clk_rate;
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struct notifier_block clock_nb;
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2021-10-27 02:12:36 +08:00
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struct drm_private_obj private_obj;
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2019-06-03 23:23:31 +08:00
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};
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2021-10-27 02:12:36 +08:00
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static inline struct ingenic_drm_private_state *
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to_ingenic_drm_priv_state(struct drm_private_state *state)
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{
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return container_of(state, struct ingenic_drm_private_state, base);
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}
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2019-06-03 23:23:31 +08:00
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static bool ingenic_drm_writeable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case JZ_REG_LCD_IID:
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case JZ_REG_LCD_SA0:
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case JZ_REG_LCD_FID0:
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case JZ_REG_LCD_CMD0:
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case JZ_REG_LCD_SA1:
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case JZ_REG_LCD_FID1:
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case JZ_REG_LCD_CMD1:
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return false;
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default:
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return true;
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}
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}
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static const struct regmap_config ingenic_drm_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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2020-07-17 00:38:43 +08:00
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.max_register = JZ_REG_LCD_SIZE1,
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2019-06-03 23:23:31 +08:00
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.writeable_reg = ingenic_drm_writeable_reg,
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};
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static inline struct ingenic_drm *drm_device_get_priv(struct drm_device *drm)
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{
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return container_of(drm, struct ingenic_drm, drm);
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}
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static inline struct ingenic_drm *drm_crtc_get_priv(struct drm_crtc *crtc)
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{
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return container_of(crtc, struct ingenic_drm, crtc);
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}
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drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
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static inline struct ingenic_drm *drm_nb_get_priv(struct notifier_block *nb)
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{
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return container_of(nb, struct ingenic_drm, clock_nb);
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}
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2021-10-27 02:12:35 +08:00
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static inline dma_addr_t dma_hwdesc_addr(const struct ingenic_drm *priv,
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unsigned int idx)
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{
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u32 offset = offsetof(struct ingenic_dma_hwdescs, hwdesc[idx]);
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return priv->dma_hwdescs_phys + offset;
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}
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drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
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static int ingenic_drm_update_pixclk(struct notifier_block *nb,
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unsigned long action,
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void *data)
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{
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struct ingenic_drm *priv = drm_nb_get_priv(nb);
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switch (action) {
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case PRE_RATE_CHANGE:
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mutex_lock(&priv->clk_mutex);
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priv->update_clk_rate = true;
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drm_crtc_wait_one_vblank(&priv->crtc);
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return NOTIFY_OK;
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default:
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mutex_unlock(&priv->clk_mutex);
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return NOTIFY_OK;
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}
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}
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2019-06-03 23:23:31 +08:00
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static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc,
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drm/atomic: Pass the full state to CRTC atomic enable/disable
If the CRTC driver ever needs to access the full DRM state, it can't do so
at atomic_enable / atomic_disable time since drm_atomic_helper_swap_state
will have cleared the pointer from the struct drm_crtc_state to the struct
drm_atomic_state before calling those hooks.
In order to allow that, let's pass the full DRM state to atomic_enable and
atomic_disable. The conversion was done using the coccinelle script below,
built tested on all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier dev, state;
identifier crtc, crtc_state;
@@
disable_outputs(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- FUNCS->atomic_disable(crtc, crtc_state);
+ FUNCS->atomic_disable(crtc, state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier dev, state;
identifier crtc, crtc_state;
@@
drm_atomic_helper_commit_modeset_enables(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- FUNCS->atomic_enable(crtc, crtc_state);
+ FUNCS->atomic_enable(crtc, state);
...>
}
@@
identifier crtc, old_state;
@@
struct drm_crtc_helper_funcs {
...
- void (*atomic_enable)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_enable)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
- void (*atomic_disable)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_disable)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_enable = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_disable = func,
...,
};
)
@ ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on crtc_atomic_func && !ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
void func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
void func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier old_state;
identifier crtc;
@@
void func(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/845aa10ef171fc0ea060495efef142a0c13f7870.1602161031.git-series.maxime@cerno.tech
2020-10-08 20:44:08 +08:00
|
|
|
struct drm_atomic_state *state)
|
2019-06-03 23:23:31 +08:00
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
|
|
|
|
|
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_STATE, 0);
|
|
|
|
|
|
|
|
|
|
regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
|
|
|
|
|
JZ_LCD_CTRL_ENABLE | JZ_LCD_CTRL_DISABLE,
|
|
|
|
|
JZ_LCD_CTRL_ENABLE);
|
|
|
|
|
|
|
|
|
|
drm_crtc_vblank_on(crtc);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_crtc_atomic_disable(struct drm_crtc *crtc,
|
drm/atomic: Pass the full state to CRTC atomic enable/disable
If the CRTC driver ever needs to access the full DRM state, it can't do so
at atomic_enable / atomic_disable time since drm_atomic_helper_swap_state
will have cleared the pointer from the struct drm_crtc_state to the struct
drm_atomic_state before calling those hooks.
In order to allow that, let's pass the full DRM state to atomic_enable and
atomic_disable. The conversion was done using the coccinelle script below,
built tested on all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier dev, state;
identifier crtc, crtc_state;
@@
disable_outputs(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- FUNCS->atomic_disable(crtc, crtc_state);
+ FUNCS->atomic_disable(crtc, state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier dev, state;
identifier crtc, crtc_state;
@@
drm_atomic_helper_commit_modeset_enables(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- FUNCS->atomic_enable(crtc, crtc_state);
+ FUNCS->atomic_enable(crtc, state);
...>
}
@@
identifier crtc, old_state;
@@
struct drm_crtc_helper_funcs {
...
- void (*atomic_enable)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_enable)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
- void (*atomic_disable)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_disable)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_enable = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_disable = func,
...,
};
)
@ ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on crtc_atomic_func && !ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
void func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
void func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier old_state;
identifier crtc;
@@
void func(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/845aa10ef171fc0ea060495efef142a0c13f7870.1602161031.git-series.maxime@cerno.tech
2020-10-08 20:44:08 +08:00
|
|
|
struct drm_atomic_state *state)
|
2019-06-03 23:23:31 +08:00
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
|
|
|
|
|
unsigned int var;
|
|
|
|
|
|
|
|
|
|
drm_crtc_vblank_off(crtc);
|
|
|
|
|
|
|
|
|
|
regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
|
|
|
|
|
JZ_LCD_CTRL_DISABLE, JZ_LCD_CTRL_DISABLE);
|
|
|
|
|
|
|
|
|
|
regmap_read_poll_timeout(priv->map, JZ_REG_LCD_STATE, var,
|
|
|
|
|
var & JZ_LCD_STATE_DISABLED,
|
|
|
|
|
1000, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_crtc_update_timings(struct ingenic_drm *priv,
|
|
|
|
|
struct drm_display_mode *mode)
|
|
|
|
|
{
|
|
|
|
|
unsigned int vpe, vds, vde, vt, hpe, hds, hde, ht;
|
|
|
|
|
|
2020-11-19 23:55:57 +08:00
|
|
|
vpe = mode->crtc_vsync_end - mode->crtc_vsync_start;
|
|
|
|
|
vds = mode->crtc_vtotal - mode->crtc_vsync_start;
|
|
|
|
|
vde = vds + mode->crtc_vdisplay;
|
|
|
|
|
vt = vde + mode->crtc_vsync_start - mode->crtc_vdisplay;
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2020-11-19 23:55:57 +08:00
|
|
|
hpe = mode->crtc_hsync_end - mode->crtc_hsync_start;
|
|
|
|
|
hds = mode->crtc_htotal - mode->crtc_hsync_start;
|
|
|
|
|
hde = hds + mode->crtc_hdisplay;
|
|
|
|
|
ht = hde + mode->crtc_hsync_start - mode->crtc_hdisplay;
|
2019-06-03 23:23:31 +08:00
|
|
|
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_VSYNC,
|
|
|
|
|
0 << JZ_LCD_VSYNC_VPS_OFFSET |
|
|
|
|
|
vpe << JZ_LCD_VSYNC_VPE_OFFSET);
|
|
|
|
|
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_HSYNC,
|
|
|
|
|
0 << JZ_LCD_HSYNC_HPS_OFFSET |
|
|
|
|
|
hpe << JZ_LCD_HSYNC_HPE_OFFSET);
|
|
|
|
|
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_VAT,
|
|
|
|
|
ht << JZ_LCD_VAT_HT_OFFSET |
|
|
|
|
|
vt << JZ_LCD_VAT_VT_OFFSET);
|
|
|
|
|
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_DAH,
|
|
|
|
|
hds << JZ_LCD_DAH_HDS_OFFSET |
|
|
|
|
|
hde << JZ_LCD_DAH_HDE_OFFSET);
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_DAV,
|
|
|
|
|
vds << JZ_LCD_DAV_VDS_OFFSET |
|
|
|
|
|
vde << JZ_LCD_DAV_VDE_OFFSET);
|
2019-06-28 02:21:13 +08:00
|
|
|
|
|
|
|
|
if (priv->panel_is_sharp) {
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_PS, hde << 16 | (hde + 1));
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_CLS, hde << 16 | (hde + 1));
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_SPL, hpe << 16 | (hpe + 1));
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_REV, mode->htotal << 16);
|
|
|
|
|
}
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2020-07-17 00:38:43 +08:00
|
|
|
regmap_set_bits(priv->map, JZ_REG_LCD_CTRL,
|
|
|
|
|
JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16);
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* IPU restart - specify how much time the LCDC will wait before
|
|
|
|
|
* transferring a new frame from the IPU. The value is the one
|
|
|
|
|
* suggested in the programming manual.
|
|
|
|
|
*/
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_IPUR, JZ_LCD_IPUR_IPUREN |
|
|
|
|
|
(ht * vpe / 3) << JZ_LCD_IPUR_IPUR_LSB);
|
2019-06-03 23:23:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int ingenic_drm_crtc_atomic_check(struct drm_crtc *crtc,
|
drm/atomic: Pass the full state to CRTC atomic_check
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_check.
The conversion was done using the coccinelle script below,
built tested on all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier ret, f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- ret = FUNCS->atomic_check(crtc, crtc_state);
+ ret = FUNCS->atomic_check(crtc, state);
...>
}
@@
identifier crtc, new_state;
@@
struct drm_crtc_helper_funcs {
...
- int (*atomic_check)(struct drm_crtc *crtc, struct drm_crtc_state *new_state);
+ int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc,
struct drm_crtc_state *new_state)
{
... when != new_state
}
@ adds_new_state depends on crtc_atomic_func && !ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
int func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
int func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier new_state;
identifier crtc;
@@
int func(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{ ... }
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
);
@ include depends on adds_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_new_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-maxime@cerno.tech
2020-10-28 20:32:21 +08:00
|
|
|
struct drm_atomic_state *state)
|
2019-06-03 23:23:31 +08:00
|
|
|
{
|
drm/atomic: Pass the full state to CRTC atomic_check
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_check.
The conversion was done using the coccinelle script below,
built tested on all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier ret, f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- ret = FUNCS->atomic_check(crtc, crtc_state);
+ ret = FUNCS->atomic_check(crtc, state);
...>
}
@@
identifier crtc, new_state;
@@
struct drm_crtc_helper_funcs {
...
- int (*atomic_check)(struct drm_crtc *crtc, struct drm_crtc_state *new_state);
+ int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc,
struct drm_crtc_state *new_state)
{
... when != new_state
}
@ adds_new_state depends on crtc_atomic_func && !ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
int func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
int func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier new_state;
identifier crtc;
@@
int func(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{ ... }
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
);
@ include depends on adds_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_new_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-maxime@cerno.tech
2020-10-28 20:32:21 +08:00
|
|
|
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
|
|
|
|
|
crtc);
|
2019-06-03 23:23:31 +08:00
|
|
|
struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
|
2020-07-19 17:38:34 +08:00
|
|
|
struct drm_plane_state *f1_state, *f0_state, *ipu_state = NULL;
|
2019-12-10 22:41:41 +08:00
|
|
|
|
drm/atomic: Pass the full state to CRTC atomic_check
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_check.
The conversion was done using the coccinelle script below,
built tested on all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier ret, f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- ret = FUNCS->atomic_check(crtc, crtc_state);
+ ret = FUNCS->atomic_check(crtc, state);
...>
}
@@
identifier crtc, new_state;
@@
struct drm_crtc_helper_funcs {
...
- int (*atomic_check)(struct drm_crtc *crtc, struct drm_crtc_state *new_state);
+ int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc,
struct drm_crtc_state *new_state)
{
... when != new_state
}
@ adds_new_state depends on crtc_atomic_func && !ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
int func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
int func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier new_state;
identifier crtc;
@@
int func(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{ ... }
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
);
@ include depends on adds_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_new_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-maxime@cerno.tech
2020-10-28 20:32:21 +08:00
|
|
|
if (crtc_state->gamma_lut &&
|
|
|
|
|
drm_color_lut_size(crtc_state->gamma_lut) != ARRAY_SIZE(priv->dma_hwdescs->palette)) {
|
2020-09-28 03:36:45 +08:00
|
|
|
dev_dbg(priv->dev, "Invalid palette size\n");
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
drm/atomic: Pass the full state to CRTC atomic_check
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_check.
The conversion was done using the coccinelle script below,
built tested on all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier ret, f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- ret = FUNCS->atomic_check(crtc, crtc_state);
+ ret = FUNCS->atomic_check(crtc, state);
...>
}
@@
identifier crtc, new_state;
@@
struct drm_crtc_helper_funcs {
...
- int (*atomic_check)(struct drm_crtc *crtc, struct drm_crtc_state *new_state);
+ int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc,
struct drm_crtc_state *new_state)
{
... when != new_state
}
@ adds_new_state depends on crtc_atomic_func && !ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
int func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
int func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier new_state;
identifier crtc;
@@
int func(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{ ... }
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
);
@ include depends on adds_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_new_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-maxime@cerno.tech
2020-10-28 20:32:21 +08:00
|
|
|
if (drm_atomic_crtc_needs_modeset(crtc_state) && priv->soc_info->has_osd) {
|
|
|
|
|
f1_state = drm_atomic_get_plane_state(crtc_state->state,
|
|
|
|
|
&priv->f1);
|
2020-07-28 23:16:40 +08:00
|
|
|
if (IS_ERR(f1_state))
|
|
|
|
|
return PTR_ERR(f1_state);
|
|
|
|
|
|
drm/atomic: Pass the full state to CRTC atomic_check
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_check.
The conversion was done using the coccinelle script below,
built tested on all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier ret, f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- ret = FUNCS->atomic_check(crtc, crtc_state);
+ ret = FUNCS->atomic_check(crtc, state);
...>
}
@@
identifier crtc, new_state;
@@
struct drm_crtc_helper_funcs {
...
- int (*atomic_check)(struct drm_crtc *crtc, struct drm_crtc_state *new_state);
+ int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc,
struct drm_crtc_state *new_state)
{
... when != new_state
}
@ adds_new_state depends on crtc_atomic_func && !ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
int func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
int func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier new_state;
identifier crtc;
@@
int func(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{ ... }
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
);
@ include depends on adds_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_new_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-maxime@cerno.tech
2020-10-28 20:32:21 +08:00
|
|
|
f0_state = drm_atomic_get_plane_state(crtc_state->state,
|
|
|
|
|
&priv->f0);
|
2020-07-28 23:16:40 +08:00
|
|
|
if (IS_ERR(f0_state))
|
|
|
|
|
return PTR_ERR(f0_state);
|
2020-07-17 00:38:43 +08:00
|
|
|
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU) && priv->ipu_plane) {
|
drm/atomic: Pass the full state to CRTC atomic_check
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_check.
The conversion was done using the coccinelle script below,
built tested on all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier ret, f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state)
{
<...
- ret = FUNCS->atomic_check(crtc, crtc_state);
+ ret = FUNCS->atomic_check(crtc, state);
...>
}
@@
identifier crtc, new_state;
@@
struct drm_crtc_helper_funcs {
...
- int (*atomic_check)(struct drm_crtc *crtc, struct drm_crtc_state *new_state);
+ int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc,
struct drm_crtc_state *new_state)
{
... when != new_state
}
@ adds_new_state depends on crtc_atomic_func && !ignores_new_state @
identifier crtc_atomic_func.func;
identifier crtc, new_state;
@@
int func(struct drm_crtc *crtc, struct drm_crtc_state *new_state)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
int func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
int func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier new_state;
identifier crtc;
@@
int func(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{ ... }
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier new_state;
identifier crtc;
@@
int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *new_state
+ struct drm_atomic_state *state
);
@ include depends on adds_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_new_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-maxime@cerno.tech
2020-10-28 20:32:21 +08:00
|
|
|
ipu_state = drm_atomic_get_plane_state(crtc_state->state,
|
|
|
|
|
priv->ipu_plane);
|
2020-07-28 23:16:40 +08:00
|
|
|
if (IS_ERR(ipu_state))
|
|
|
|
|
return PTR_ERR(ipu_state);
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
|
|
|
|
|
/* IPU and F1 planes cannot be enabled at the same time. */
|
|
|
|
|
if (f1_state->fb && ipu_state->fb) {
|
|
|
|
|
dev_dbg(priv->dev, "Cannot enable both F1 and IPU\n");
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-07-17 00:38:43 +08:00
|
|
|
/* If all the planes are disabled, we won't get a VBLANK IRQ */
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
priv->no_vblank = !f1_state->fb && !f0_state->fb &&
|
2020-07-19 17:38:34 +08:00
|
|
|
!(ipu_state && ipu_state->fb);
|
2020-07-17 00:38:43 +08:00
|
|
|
}
|
|
|
|
|
|
2019-06-03 23:23:31 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2020-07-28 23:16:41 +08:00
|
|
|
static enum drm_mode_status
|
|
|
|
|
ingenic_drm_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
|
|
|
|
|
long rate;
|
|
|
|
|
|
|
|
|
|
if (mode->hdisplay > priv->soc_info->max_width)
|
|
|
|
|
return MODE_BAD_HVALUE;
|
|
|
|
|
if (mode->vdisplay > priv->soc_info->max_height)
|
|
|
|
|
return MODE_BAD_VVALUE;
|
|
|
|
|
|
|
|
|
|
rate = clk_round_rate(priv->pix_clk, mode->clock * 1000);
|
|
|
|
|
if (rate < 0)
|
|
|
|
|
return MODE_CLOCK_RANGE;
|
|
|
|
|
|
|
|
|
|
return MODE_OK;
|
|
|
|
|
}
|
|
|
|
|
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
static void ingenic_drm_crtc_atomic_begin(struct drm_crtc *crtc,
|
drm/atomic: Pass the full state to CRTC atomic begin and flush
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_begin and atomic_flush.
The conversion was done using the coccinelle script below, built tested on
all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_begin(crtc, old_crtc_state);
+ FUNCS->atomic_begin(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_flush(crtc, old_crtc_state);
+ FUNCS->atomic_flush(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_begin(crtc, crtc_state);
+ FUNCS->atomic_begin(crtc, state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_flush(crtc, crtc_state);
+ FUNCS->atomic_flush(crtc, state);
...>
}
@@
identifier crtc, old_state;
@@
struct drm_crtc_helper_funcs {
...
- void (*atomic_begin)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
- void (*atomic_flush)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@ ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on crtc_atomic_func && !ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
void func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
void func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier old_state;
identifier crtc;
@@
void func(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-2-maxime@cerno.tech
2020-10-28 20:32:22 +08:00
|
|
|
struct drm_atomic_state *state)
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
{
|
drm: Use state helper instead of CRTC state pointer
Many drivers reference the crtc->pointer in order to get the current CRTC
state in their atomic_begin or atomic_flush hooks, which would be the new
CRTC state in the global atomic state since _swap_state happened when those
hooks are run.
Use the drm_atomic_get_new_crtc_state helper to get that state to make it
more obvious.
This was made using the coccinelle script below:
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@@
identifier crtc_atomic_func.func;
identifier crtc, state;
symbol crtc_state;
expression e;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct tegra_dc_state *crtc_state = e;
+ struct tegra_dc_state *dc_state = e;
<+...
- crtc_state
+ dc_state
...+>
}
@@
identifier crtc_atomic_func.func;
identifier crtc, state;
symbol crtc_state;
expression e;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct mtk_crtc_state *crtc_state = e;
+ struct mtk_crtc_state *mtk_crtc_state = e;
<+...
- crtc_state
+ mtk_crtc_state
...+>
}
@ replaces_new_state @
identifier crtc_atomic_func.func;
identifier crtc, state, crtc_state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct drm_crtc_state *crtc_state = crtc->state;
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier crtc_atomic_func.func;
identifier crtc, state, crtc_state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
- crtc->state
+ crtc_state
...
}
@ adds_new_state @
identifier crtc_atomic_func.func;
identifier crtc, state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
- crtc->state
+ crtc_state
...
}
@ include depends on adds_new_state || replaces_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && (adds_new_state || replaces_new_state) @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Cc: "James (Qian) Wang" <james.qian.wang@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mihail Atanassov <mihail.atanassov@arm.com>
Cc: Brian Starkey <brian.starkey@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sandy Huang <hjc@rock-chips.com>
Cc: "Heiko Stübner" <heiko@sntech.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201105164518.392891-1-maxime@cerno.tech
2020-11-06 00:45:18 +08:00
|
|
|
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
|
|
|
|
|
crtc);
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
|
|
|
|
|
u32 ctrl = 0;
|
|
|
|
|
|
|
|
|
|
if (priv->soc_info->has_osd &&
|
drm: Use state helper instead of CRTC state pointer
Many drivers reference the crtc->pointer in order to get the current CRTC
state in their atomic_begin or atomic_flush hooks, which would be the new
CRTC state in the global atomic state since _swap_state happened when those
hooks are run.
Use the drm_atomic_get_new_crtc_state helper to get that state to make it
more obvious.
This was made using the coccinelle script below:
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@@
identifier crtc_atomic_func.func;
identifier crtc, state;
symbol crtc_state;
expression e;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct tegra_dc_state *crtc_state = e;
+ struct tegra_dc_state *dc_state = e;
<+...
- crtc_state
+ dc_state
...+>
}
@@
identifier crtc_atomic_func.func;
identifier crtc, state;
symbol crtc_state;
expression e;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct mtk_crtc_state *crtc_state = e;
+ struct mtk_crtc_state *mtk_crtc_state = e;
<+...
- crtc_state
+ mtk_crtc_state
...+>
}
@ replaces_new_state @
identifier crtc_atomic_func.func;
identifier crtc, state, crtc_state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct drm_crtc_state *crtc_state = crtc->state;
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier crtc_atomic_func.func;
identifier crtc, state, crtc_state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
- crtc->state
+ crtc_state
...
}
@ adds_new_state @
identifier crtc_atomic_func.func;
identifier crtc, state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
- crtc->state
+ crtc_state
...
}
@ include depends on adds_new_state || replaces_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && (adds_new_state || replaces_new_state) @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Cc: "James (Qian) Wang" <james.qian.wang@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mihail Atanassov <mihail.atanassov@arm.com>
Cc: Brian Starkey <brian.starkey@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sandy Huang <hjc@rock-chips.com>
Cc: "Heiko Stübner" <heiko@sntech.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201105164518.392891-1-maxime@cerno.tech
2020-11-06 00:45:18 +08:00
|
|
|
drm_atomic_crtc_needs_modeset(crtc_state)) {
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
/*
|
|
|
|
|
* If IPU plane is enabled, enable IPU as source for the F1
|
|
|
|
|
* plane; otherwise use regular DMA.
|
|
|
|
|
*/
|
|
|
|
|
if (priv->ipu_plane && priv->ipu_plane->state->fb)
|
|
|
|
|
ctrl |= JZ_LCD_OSDCTRL_IPU;
|
|
|
|
|
|
|
|
|
|
regmap_update_bits(priv->map, JZ_REG_LCD_OSDCTRL,
|
|
|
|
|
JZ_LCD_OSDCTRL_IPU, ctrl);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-06-03 23:23:31 +08:00
|
|
|
static void ingenic_drm_crtc_atomic_flush(struct drm_crtc *crtc,
|
drm/atomic: Pass the full state to CRTC atomic begin and flush
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_begin and atomic_flush.
The conversion was done using the coccinelle script below, built tested on
all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_begin(crtc, old_crtc_state);
+ FUNCS->atomic_begin(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_flush(crtc, old_crtc_state);
+ FUNCS->atomic_flush(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_begin(crtc, crtc_state);
+ FUNCS->atomic_begin(crtc, state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_flush(crtc, crtc_state);
+ FUNCS->atomic_flush(crtc, state);
...>
}
@@
identifier crtc, old_state;
@@
struct drm_crtc_helper_funcs {
...
- void (*atomic_begin)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
- void (*atomic_flush)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@ ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on crtc_atomic_func && !ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
void func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
void func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier old_state;
identifier crtc;
@@
void func(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-2-maxime@cerno.tech
2020-10-28 20:32:22 +08:00
|
|
|
struct drm_atomic_state *state)
|
2019-06-03 23:23:31 +08:00
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
|
drm: Use state helper instead of CRTC state pointer
Many drivers reference the crtc->pointer in order to get the current CRTC
state in their atomic_begin or atomic_flush hooks, which would be the new
CRTC state in the global atomic state since _swap_state happened when those
hooks are run.
Use the drm_atomic_get_new_crtc_state helper to get that state to make it
more obvious.
This was made using the coccinelle script below:
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@@
identifier crtc_atomic_func.func;
identifier crtc, state;
symbol crtc_state;
expression e;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct tegra_dc_state *crtc_state = e;
+ struct tegra_dc_state *dc_state = e;
<+...
- crtc_state
+ dc_state
...+>
}
@@
identifier crtc_atomic_func.func;
identifier crtc, state;
symbol crtc_state;
expression e;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct mtk_crtc_state *crtc_state = e;
+ struct mtk_crtc_state *mtk_crtc_state = e;
<+...
- crtc_state
+ mtk_crtc_state
...+>
}
@ replaces_new_state @
identifier crtc_atomic_func.func;
identifier crtc, state, crtc_state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
...
- struct drm_crtc_state *crtc_state = crtc->state;
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
}
@@
identifier crtc_atomic_func.func;
identifier crtc, state, crtc_state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
- crtc->state
+ crtc_state
...
}
@ adds_new_state @
identifier crtc_atomic_func.func;
identifier crtc, state;
@@
func(struct drm_crtc *crtc, struct drm_atomic_state *state) {
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
...
- crtc->state
+ crtc_state
...
}
@ include depends on adds_new_state || replaces_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && (adds_new_state || replaces_new_state) @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Cc: "James (Qian) Wang" <james.qian.wang@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mihail Atanassov <mihail.atanassov@arm.com>
Cc: Brian Starkey <brian.starkey@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sandy Huang <hjc@rock-chips.com>
Cc: "Heiko Stübner" <heiko@sntech.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201105164518.392891-1-maxime@cerno.tech
2020-11-06 00:45:18 +08:00
|
|
|
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
|
|
|
|
|
crtc);
|
drm/atomic: Pass the full state to CRTC atomic begin and flush
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_begin and atomic_flush.
The conversion was done using the coccinelle script below, built tested on
all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_begin(crtc, old_crtc_state);
+ FUNCS->atomic_begin(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_flush(crtc, old_crtc_state);
+ FUNCS->atomic_flush(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_begin(crtc, crtc_state);
+ FUNCS->atomic_begin(crtc, state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_flush(crtc, crtc_state);
+ FUNCS->atomic_flush(crtc, state);
...>
}
@@
identifier crtc, old_state;
@@
struct drm_crtc_helper_funcs {
...
- void (*atomic_begin)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
- void (*atomic_flush)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@ ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on crtc_atomic_func && !ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
void func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
void func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier old_state;
identifier crtc;
@@
void func(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-2-maxime@cerno.tech
2020-10-28 20:32:22 +08:00
|
|
|
struct drm_pending_vblank_event *event = crtc_state->event;
|
2019-06-03 23:23:31 +08:00
|
|
|
|
drm/atomic: Pass the full state to CRTC atomic begin and flush
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_begin and atomic_flush.
The conversion was done using the coccinelle script below, built tested on
all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_begin(crtc, old_crtc_state);
+ FUNCS->atomic_begin(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_flush(crtc, old_crtc_state);
+ FUNCS->atomic_flush(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_begin(crtc, crtc_state);
+ FUNCS->atomic_begin(crtc, state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_flush(crtc, crtc_state);
+ FUNCS->atomic_flush(crtc, state);
...>
}
@@
identifier crtc, old_state;
@@
struct drm_crtc_helper_funcs {
...
- void (*atomic_begin)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
- void (*atomic_flush)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@ ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on crtc_atomic_func && !ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
void func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
void func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier old_state;
identifier crtc;
@@
void func(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-2-maxime@cerno.tech
2020-10-28 20:32:22 +08:00
|
|
|
if (drm_atomic_crtc_needs_modeset(crtc_state)) {
|
2020-11-19 23:55:57 +08:00
|
|
|
ingenic_drm_crtc_update_timings(priv, &crtc_state->adjusted_mode);
|
drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
|
|
|
priv->update_clk_rate = true;
|
|
|
|
|
}
|
2019-06-03 23:23:31 +08:00
|
|
|
|
drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
|
|
|
if (priv->update_clk_rate) {
|
|
|
|
|
mutex_lock(&priv->clk_mutex);
|
drm/atomic: Pass the full state to CRTC atomic begin and flush
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_begin and atomic_flush.
The conversion was done using the coccinelle script below, built tested on
all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_begin(crtc, old_crtc_state);
+ FUNCS->atomic_begin(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_flush(crtc, old_crtc_state);
+ FUNCS->atomic_flush(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_begin(crtc, crtc_state);
+ FUNCS->atomic_begin(crtc, state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_flush(crtc, crtc_state);
+ FUNCS->atomic_flush(crtc, state);
...>
}
@@
identifier crtc, old_state;
@@
struct drm_crtc_helper_funcs {
...
- void (*atomic_begin)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
- void (*atomic_flush)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@ ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on crtc_atomic_func && !ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
void func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
void func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier old_state;
identifier crtc;
@@
void func(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-2-maxime@cerno.tech
2020-10-28 20:32:22 +08:00
|
|
|
clk_set_rate(priv->pix_clk,
|
2021-03-23 22:40:08 +08:00
|
|
|
crtc_state->adjusted_mode.crtc_clock * 1000);
|
drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
|
|
|
priv->update_clk_rate = false;
|
|
|
|
|
mutex_unlock(&priv->clk_mutex);
|
2019-06-03 23:23:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (event) {
|
drm/atomic: Pass the full state to CRTC atomic begin and flush
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's start convert all the remaining helpers to provide a consistent
interface, starting with the CRTC's atomic_begin and atomic_flush.
The conversion was done using the coccinelle script below, built tested on
all the drivers and actually tested on vc4.
virtual report
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_begin(crtc, old_crtc_state);
+ FUNCS->atomic_begin(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
identifier old_crtc_state, old_state;
identifier crtc;
identifier f;
@@
f(struct drm_crtc_state *old_crtc_state)
{
...
struct drm_atomic_state *old_state = old_crtc_state->state;
<...
- FUNCS->atomic_flush(crtc, old_crtc_state);
+ FUNCS->atomic_flush(crtc, old_state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_begin(crtc, crtc_state);
+ FUNCS->atomic_begin(crtc, state);
...>
}
@@
struct drm_crtc_helper_funcs *FUNCS;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
identifier dev, state;
identifier f;
@@
f(struct drm_device *dev, struct drm_atomic_state *state, ...)
{
<...
- FUNCS->atomic_flush(crtc, crtc_state);
+ FUNCS->atomic_flush(crtc, state);
...>
}
@@
identifier crtc, old_state;
@@
struct drm_crtc_helper_funcs {
...
- void (*atomic_begin)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
- void (*atomic_flush)(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
+ void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_state *state);
...
}
@ crtc_atomic_func @
identifier helpers;
identifier func;
@@
(
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_begin = func,
...,
};
|
static struct drm_crtc_helper_funcs helpers = {
...,
.atomic_flush = func,
...,
};
)
@ ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on crtc_atomic_func && !ignores_old_state @
identifier crtc_atomic_func.func;
identifier crtc, old_state;
@@
void func(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
expression E;
type T;
@@
void func(...)
{
...
- T state = E;
+ T crtc_state = E;
<+...
- state
+ crtc_state
...+>
}
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
type T;
@@
void func(...)
{
...
- T state;
+ T crtc_state;
<+...
- state
+ crtc_state
...+>
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
...
}
@@
identifier old_state;
identifier crtc;
@@
void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{
...
}
@@
identifier old_state;
identifier crtc;
@@
void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
);
@ depends on crtc_atomic_func @
identifier crtc_atomic_func.func;
identifier old_state;
identifier crtc;
@@
void func(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-2-maxime@cerno.tech
2020-10-28 20:32:22 +08:00
|
|
|
crtc_state->event = NULL;
|
2019-06-03 23:23:31 +08:00
|
|
|
|
|
|
|
|
spin_lock_irq(&crtc->dev->event_lock);
|
|
|
|
|
if (drm_crtc_vblank_get(crtc) == 0)
|
|
|
|
|
drm_crtc_arm_vblank_event(crtc, event);
|
|
|
|
|
else
|
|
|
|
|
drm_crtc_send_vblank_event(crtc, event);
|
|
|
|
|
spin_unlock_irq(&crtc->dev->event_lock);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-07-17 00:38:43 +08:00
|
|
|
static int ingenic_drm_plane_atomic_check(struct drm_plane *plane,
|
drm/atomic: Pass the full state to planes atomic_check
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's convert all the remaining helpers to provide a consistent
interface, starting with the planes atomic_check.
The conversion was done using the coccinelle script below plus some
manual changes for vmwgfx, built tested on all the drivers.
@@
identifier plane, plane_state;
symbol state;
@@
struct drm_plane_helper_funcs {
...
int (*atomic_check)(struct drm_plane *plane,
- struct drm_plane_state *plane_state);
+ struct drm_atomic_state *state);
...
}
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@@
struct drm_plane_helper_funcs *FUNCS;
identifier f;
identifier dev;
identifier plane, plane_state, state;
@@
f(struct drm_device *dev, struct drm_atomic_state *state)
{
<+...
- FUNCS->atomic_check(plane, plane_state)
+ FUNCS->atomic_check(plane, state)
...+>
}
@ ignores_new_state @
identifier plane_atomic_func.func;
identifier plane, new_plane_state;
@@
func(struct drm_plane *plane, struct drm_plane_state *new_plane_state)
{
... when != new_plane_state
}
@ adds_new_state depends on plane_atomic_func && !ignores_new_state @
identifier plane_atomic_func.func;
identifier plane, new_plane_state;
@@
func(struct drm_plane *plane, struct drm_plane_state *new_plane_state)
{
+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
...
}
@ depends on plane_atomic_func @
identifier plane_atomic_func.func;
identifier plane, new_plane_state;
@@
func(struct drm_plane *plane,
- struct drm_plane_state *new_plane_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_new_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-4-maxime@cerno.tech
2021-02-19 20:00:24 +08:00
|
|
|
struct drm_atomic_state *state)
|
2020-07-17 00:38:43 +08:00
|
|
|
{
|
drm: Use state helper instead of plane state pointer in atomic_check
Many drivers reference the plane->state pointer in order to get the
current plane state in their atomic_check hook, which would be the old
plane state in the global atomic state since _swap_state hasn't happened
when atomic_check is run.
Use the drm_atomic_get_old_plane_state helper to get that state to make
it more obvious.
This was made using the coccinelle script below:
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_plane_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ replaces_old_state @
identifier plane_atomic_func.func;
identifier plane, state, plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
...
- struct drm_plane_state *plane_state = plane->state;
+ struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
...
}
@@
identifier plane_atomic_func.func;
identifier plane, state, plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
<...
- plane->state
+ plane_state
...>
}
@ adds_old_state @
identifier plane_atomic_func.func;
identifier plane, state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
+ struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
<...
- plane->state
+ old_plane_state
...>
}
@ include depends on adds_old_state || replaces_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && (adds_old_state || replaces_old_state) @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-6-maxime@cerno.tech
2021-02-19 20:00:26 +08:00
|
|
|
struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state,
|
|
|
|
|
plane);
|
drm/atomic: Pass the full state to planes atomic_check
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's convert all the remaining helpers to provide a consistent
interface, starting with the planes atomic_check.
The conversion was done using the coccinelle script below plus some
manual changes for vmwgfx, built tested on all the drivers.
@@
identifier plane, plane_state;
symbol state;
@@
struct drm_plane_helper_funcs {
...
int (*atomic_check)(struct drm_plane *plane,
- struct drm_plane_state *plane_state);
+ struct drm_atomic_state *state);
...
}
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@@
struct drm_plane_helper_funcs *FUNCS;
identifier f;
identifier dev;
identifier plane, plane_state, state;
@@
f(struct drm_device *dev, struct drm_atomic_state *state)
{
<+...
- FUNCS->atomic_check(plane, plane_state)
+ FUNCS->atomic_check(plane, state)
...+>
}
@ ignores_new_state @
identifier plane_atomic_func.func;
identifier plane, new_plane_state;
@@
func(struct drm_plane *plane, struct drm_plane_state *new_plane_state)
{
... when != new_plane_state
}
@ adds_new_state depends on plane_atomic_func && !ignores_new_state @
identifier plane_atomic_func.func;
identifier plane, new_plane_state;
@@
func(struct drm_plane *plane, struct drm_plane_state *new_plane_state)
{
+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
...
}
@ depends on plane_atomic_func @
identifier plane_atomic_func.func;
identifier plane, new_plane_state;
@@
func(struct drm_plane *plane,
- struct drm_plane_state *new_plane_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_new_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_new_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-4-maxime@cerno.tech
2021-02-19 20:00:24 +08:00
|
|
|
struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
|
|
|
|
|
plane);
|
2020-07-17 00:38:43 +08:00
|
|
|
struct ingenic_drm *priv = drm_device_get_priv(plane->dev);
|
|
|
|
|
struct drm_crtc_state *crtc_state;
|
drm: Use state helper instead of plane state pointer in atomic_check
Many drivers reference the plane->state pointer in order to get the
current plane state in their atomic_check hook, which would be the old
plane state in the global atomic state since _swap_state hasn't happened
when atomic_check is run.
Use the drm_atomic_get_old_plane_state helper to get that state to make
it more obvious.
This was made using the coccinelle script below:
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_plane_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ replaces_old_state @
identifier plane_atomic_func.func;
identifier plane, state, plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
...
- struct drm_plane_state *plane_state = plane->state;
+ struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
...
}
@@
identifier plane_atomic_func.func;
identifier plane, state, plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
<...
- plane->state
+ plane_state
...>
}
@ adds_old_state @
identifier plane_atomic_func.func;
identifier plane, state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
+ struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
<...
- plane->state
+ old_plane_state
...>
}
@ include depends on adds_old_state || replaces_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && (adds_old_state || replaces_old_state) @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-6-maxime@cerno.tech
2021-02-19 20:00:26 +08:00
|
|
|
struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;
|
2020-07-17 00:38:43 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
if (!crtc)
|
|
|
|
|
return 0;
|
|
|
|
|
|
drm: Use the state pointer directly in planes atomic_check
Now that atomic_check takes the global atomic state as a parameter, we
don't need to go through the pointer in the plane state.
This was done using the following coccinelle script:
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_plane_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@@
identifier plane_atomic_func.func;
identifier plane, state;
identifier plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
...
- struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
<... when != plane_state
- plane_state->state
+ state
...>
}
@@
identifier plane_atomic_func.func;
identifier plane, state;
identifier plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
...
struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
<...
- plane_state->state
+ state
...>
}
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-5-maxime@cerno.tech
2021-02-19 20:00:25 +08:00
|
|
|
crtc_state = drm_atomic_get_existing_crtc_state(state,
|
2021-02-19 20:00:22 +08:00
|
|
|
crtc);
|
2020-07-17 00:38:43 +08:00
|
|
|
if (WARN_ON(!crtc_state))
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
2021-02-19 20:00:22 +08:00
|
|
|
ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
|
2020-07-17 00:38:43 +08:00
|
|
|
DRM_PLANE_HELPER_NO_SCALING,
|
|
|
|
|
DRM_PLANE_HELPER_NO_SCALING,
|
|
|
|
|
priv->soc_info->has_osd,
|
|
|
|
|
true);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If OSD is not available, check that the width/height match.
|
|
|
|
|
* Note that state->src_* are in 16.16 fixed-point format.
|
|
|
|
|
*/
|
|
|
|
|
if (!priv->soc_info->has_osd &&
|
2021-02-19 20:00:22 +08:00
|
|
|
(new_plane_state->src_x != 0 ||
|
|
|
|
|
(new_plane_state->src_w >> 16) != new_plane_state->crtc_w ||
|
|
|
|
|
(new_plane_state->src_h >> 16) != new_plane_state->crtc_h))
|
2020-07-17 00:38:43 +08:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Require full modeset if enabling or disabling a plane, or changing
|
|
|
|
|
* its position, size or depth.
|
|
|
|
|
*/
|
|
|
|
|
if (priv->soc_info->has_osd &&
|
drm: Use state helper instead of plane state pointer in atomic_check
Many drivers reference the plane->state pointer in order to get the
current plane state in their atomic_check hook, which would be the old
plane state in the global atomic state since _swap_state hasn't happened
when atomic_check is run.
Use the drm_atomic_get_old_plane_state helper to get that state to make
it more obvious.
This was made using the coccinelle script below:
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
static struct drm_plane_helper_funcs helpers = {
...,
.atomic_check = func,
...,
};
@ replaces_old_state @
identifier plane_atomic_func.func;
identifier plane, state, plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
...
- struct drm_plane_state *plane_state = plane->state;
+ struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
...
}
@@
identifier plane_atomic_func.func;
identifier plane, state, plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
<...
- plane->state
+ plane_state
...>
}
@ adds_old_state @
identifier plane_atomic_func.func;
identifier plane, state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
+ struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
<...
- plane->state
+ old_plane_state
...>
}
@ include depends on adds_old_state || replaces_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && (adds_old_state || replaces_old_state) @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-6-maxime@cerno.tech
2021-02-19 20:00:26 +08:00
|
|
|
(!old_plane_state->fb || !new_plane_state->fb ||
|
|
|
|
|
old_plane_state->crtc_x != new_plane_state->crtc_x ||
|
|
|
|
|
old_plane_state->crtc_y != new_plane_state->crtc_y ||
|
|
|
|
|
old_plane_state->crtc_w != new_plane_state->crtc_w ||
|
|
|
|
|
old_plane_state->crtc_h != new_plane_state->crtc_h ||
|
|
|
|
|
old_plane_state->fb->format->format != new_plane_state->fb->format->format))
|
2020-07-17 00:38:43 +08:00
|
|
|
crtc_state->mode_changed = true;
|
|
|
|
|
|
2021-05-24 01:04:15 +08:00
|
|
|
if (priv->soc_info->map_noncoherent)
|
|
|
|
|
drm_atomic_helper_check_plane_damage(state, new_plane_state);
|
|
|
|
|
|
2020-07-17 00:38:43 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_plane_enable(struct ingenic_drm *priv,
|
|
|
|
|
struct drm_plane *plane)
|
|
|
|
|
{
|
|
|
|
|
unsigned int en_bit;
|
|
|
|
|
|
|
|
|
|
if (priv->soc_info->has_osd) {
|
2021-03-30 01:50:45 +08:00
|
|
|
if (plane != &priv->f0)
|
2020-07-17 00:38:43 +08:00
|
|
|
en_bit = JZ_LCD_OSDC_F1EN;
|
|
|
|
|
else
|
|
|
|
|
en_bit = JZ_LCD_OSDC_F0EN;
|
|
|
|
|
|
|
|
|
|
regmap_set_bits(priv->map, JZ_REG_LCD_OSDC, en_bit);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane)
|
2020-07-17 00:38:43 +08:00
|
|
|
{
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
struct ingenic_drm *priv = dev_get_drvdata(dev);
|
2020-07-17 00:38:43 +08:00
|
|
|
unsigned int en_bit;
|
|
|
|
|
|
|
|
|
|
if (priv->soc_info->has_osd) {
|
2021-03-30 01:50:45 +08:00
|
|
|
if (plane != &priv->f0)
|
2020-07-17 00:38:43 +08:00
|
|
|
en_bit = JZ_LCD_OSDC_F1EN;
|
|
|
|
|
else
|
|
|
|
|
en_bit = JZ_LCD_OSDC_F0EN;
|
|
|
|
|
|
|
|
|
|
regmap_clear_bits(priv->map, JZ_REG_LCD_OSDC, en_bit);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
static void ingenic_drm_plane_atomic_disable(struct drm_plane *plane,
|
drm/atomic: Pass the full state to planes atomic disable and update
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's convert the remaining helpers to provide a consistent interface,
this time with the planes atomic_update and atomic_disable.
The conversion was done using the coccinelle script below, built tested on
all the drivers.
@@
identifier plane, plane_state;
symbol state;
@@
struct drm_plane_helper_funcs {
...
void (*atomic_update)(struct drm_plane *plane,
- struct drm_plane_state *plane_state);
+ struct drm_atomic_state *state);
...
}
@@
identifier plane, plane_state;
symbol state;
@@
struct drm_plane_helper_funcs {
...
void (*atomic_disable)(struct drm_plane *plane,
- struct drm_plane_state *plane_state);
+ struct drm_atomic_state *state);
...
}
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
(
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_update = func,
...,
};
|
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_disable = func,
...,
};
)
@@
struct drm_plane_helper_funcs *FUNCS;
identifier f;
identifier crtc_state;
identifier plane, plane_state, state;
expression e;
@@
f(struct drm_crtc_state *crtc_state)
{
...
struct drm_atomic_state *state = e;
<+...
(
- FUNCS->atomic_disable(plane, plane_state)
+ FUNCS->atomic_disable(plane, state)
|
- FUNCS->atomic_update(plane, plane_state)
+ FUNCS->atomic_update(plane, state)
)
...+>
}
@@
identifier plane_atomic_func.func;
identifier plane;
symbol state;
@@
func(struct drm_plane *plane,
- struct drm_plane_state *state)
+ struct drm_plane_state *old_plane_state)
{
<...
- state
+ old_plane_state
...>
}
@ ignores_old_state @
identifier plane_atomic_func.func;
identifier plane, old_state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on plane_atomic_func && !ignores_old_state @
identifier plane_atomic_func.func;
identifier plane, plane_state;
@@
func(struct drm_plane *plane, struct drm_plane_state *plane_state)
{
+ struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
...
}
@ depends on plane_atomic_func @
identifier plane_atomic_func.func;
identifier plane, plane_state;
@@
func(struct drm_plane *plane,
- struct drm_plane_state *plane_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
@@
identifier plane_atomic_func.func;
identifier plane, state;
identifier plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
...
struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
<+...
- plane_state->state
+ state
...+>
}
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-9-maxime@cerno.tech
2021-02-19 20:00:29 +08:00
|
|
|
struct drm_atomic_state *state)
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_device_get_priv(plane->dev);
|
|
|
|
|
|
|
|
|
|
ingenic_drm_plane_disable(priv->dev, plane);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void ingenic_drm_plane_config(struct device *dev,
|
|
|
|
|
struct drm_plane *plane, u32 fourcc)
|
2020-07-17 00:38:43 +08:00
|
|
|
{
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
struct ingenic_drm *priv = dev_get_drvdata(dev);
|
2020-07-17 00:38:43 +08:00
|
|
|
struct drm_plane_state *state = plane->state;
|
|
|
|
|
unsigned int xy_reg, size_reg;
|
|
|
|
|
unsigned int ctrl = 0;
|
|
|
|
|
|
|
|
|
|
ingenic_drm_plane_enable(priv, plane);
|
|
|
|
|
|
2021-03-30 01:50:45 +08:00
|
|
|
if (priv->soc_info->has_osd && plane != &priv->f0) {
|
2020-07-17 00:38:43 +08:00
|
|
|
switch (fourcc) {
|
|
|
|
|
case DRM_FORMAT_XRGB1555:
|
|
|
|
|
ctrl |= JZ_LCD_OSDCTRL_RGB555;
|
|
|
|
|
fallthrough;
|
|
|
|
|
case DRM_FORMAT_RGB565:
|
|
|
|
|
ctrl |= JZ_LCD_OSDCTRL_BPP_15_16;
|
|
|
|
|
break;
|
2020-09-27 01:05:01 +08:00
|
|
|
case DRM_FORMAT_RGB888:
|
|
|
|
|
ctrl |= JZ_LCD_OSDCTRL_BPP_24_COMP;
|
|
|
|
|
break;
|
2020-07-17 00:38:43 +08:00
|
|
|
case DRM_FORMAT_XRGB8888:
|
|
|
|
|
ctrl |= JZ_LCD_OSDCTRL_BPP_18_24;
|
|
|
|
|
break;
|
2020-09-27 01:05:00 +08:00
|
|
|
case DRM_FORMAT_XRGB2101010:
|
|
|
|
|
ctrl |= JZ_LCD_OSDCTRL_BPP_30;
|
|
|
|
|
break;
|
2020-07-17 00:38:43 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
regmap_update_bits(priv->map, JZ_REG_LCD_OSDCTRL,
|
|
|
|
|
JZ_LCD_OSDCTRL_BPP_MASK, ctrl);
|
|
|
|
|
} else {
|
|
|
|
|
switch (fourcc) {
|
2020-09-28 03:36:45 +08:00
|
|
|
case DRM_FORMAT_C8:
|
|
|
|
|
ctrl |= JZ_LCD_CTRL_BPP_8;
|
|
|
|
|
break;
|
2020-07-17 00:38:43 +08:00
|
|
|
case DRM_FORMAT_XRGB1555:
|
|
|
|
|
ctrl |= JZ_LCD_CTRL_RGB555;
|
|
|
|
|
fallthrough;
|
|
|
|
|
case DRM_FORMAT_RGB565:
|
|
|
|
|
ctrl |= JZ_LCD_CTRL_BPP_15_16;
|
|
|
|
|
break;
|
2020-09-27 01:05:01 +08:00
|
|
|
case DRM_FORMAT_RGB888:
|
|
|
|
|
ctrl |= JZ_LCD_CTRL_BPP_24_COMP;
|
|
|
|
|
break;
|
2020-07-17 00:38:43 +08:00
|
|
|
case DRM_FORMAT_XRGB8888:
|
|
|
|
|
ctrl |= JZ_LCD_CTRL_BPP_18_24;
|
|
|
|
|
break;
|
2020-09-27 01:05:00 +08:00
|
|
|
case DRM_FORMAT_XRGB2101010:
|
|
|
|
|
ctrl |= JZ_LCD_CTRL_BPP_30;
|
|
|
|
|
break;
|
2020-07-17 00:38:43 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
|
|
|
|
|
JZ_LCD_CTRL_BPP_MASK, ctrl);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (priv->soc_info->has_osd) {
|
2021-03-30 01:50:45 +08:00
|
|
|
if (plane != &priv->f0) {
|
2020-07-17 00:38:43 +08:00
|
|
|
xy_reg = JZ_REG_LCD_XYP1;
|
|
|
|
|
size_reg = JZ_REG_LCD_SIZE1;
|
|
|
|
|
} else {
|
|
|
|
|
xy_reg = JZ_REG_LCD_XYP0;
|
|
|
|
|
size_reg = JZ_REG_LCD_SIZE0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
regmap_write(priv->map, xy_reg,
|
|
|
|
|
state->crtc_x << JZ_LCD_XYP01_XPOS_LSB |
|
|
|
|
|
state->crtc_y << JZ_LCD_XYP01_YPOS_LSB);
|
|
|
|
|
regmap_write(priv->map, size_reg,
|
|
|
|
|
state->crtc_w << JZ_LCD_SIZE01_WIDTH_LSB |
|
|
|
|
|
state->crtc_h << JZ_LCD_SIZE01_HEIGHT_LSB);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-24 01:04:15 +08:00
|
|
|
bool ingenic_drm_map_noncoherent(const struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
const struct ingenic_drm *priv = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
|
|
return priv->soc_info->map_noncoherent;
|
|
|
|
|
}
|
|
|
|
|
|
2020-09-28 03:36:45 +08:00
|
|
|
static void ingenic_drm_update_palette(struct ingenic_drm *priv,
|
|
|
|
|
const struct drm_color_lut *lut)
|
|
|
|
|
{
|
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(priv->dma_hwdescs->palette); i++) {
|
|
|
|
|
u16 color = drm_color_lut_extract(lut[i].red, 5) << 11
|
|
|
|
|
| drm_color_lut_extract(lut[i].green, 6) << 5
|
|
|
|
|
| drm_color_lut_extract(lut[i].blue, 5);
|
|
|
|
|
|
|
|
|
|
priv->dma_hwdescs->palette[i] = color;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-06-03 23:23:31 +08:00
|
|
|
static void ingenic_drm_plane_atomic_update(struct drm_plane *plane,
|
drm/atomic: Pass the full state to planes atomic disable and update
The current atomic helpers have either their object state being passed as
an argument or the full atomic state.
The former is the pattern that was done at first, before switching to the
latter for new hooks or when it was needed.
Let's convert the remaining helpers to provide a consistent interface,
this time with the planes atomic_update and atomic_disable.
The conversion was done using the coccinelle script below, built tested on
all the drivers.
@@
identifier plane, plane_state;
symbol state;
@@
struct drm_plane_helper_funcs {
...
void (*atomic_update)(struct drm_plane *plane,
- struct drm_plane_state *plane_state);
+ struct drm_atomic_state *state);
...
}
@@
identifier plane, plane_state;
symbol state;
@@
struct drm_plane_helper_funcs {
...
void (*atomic_disable)(struct drm_plane *plane,
- struct drm_plane_state *plane_state);
+ struct drm_atomic_state *state);
...
}
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
(
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_update = func,
...,
};
|
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_disable = func,
...,
};
)
@@
struct drm_plane_helper_funcs *FUNCS;
identifier f;
identifier crtc_state;
identifier plane, plane_state, state;
expression e;
@@
f(struct drm_crtc_state *crtc_state)
{
...
struct drm_atomic_state *state = e;
<+...
(
- FUNCS->atomic_disable(plane, plane_state)
+ FUNCS->atomic_disable(plane, state)
|
- FUNCS->atomic_update(plane, plane_state)
+ FUNCS->atomic_update(plane, state)
)
...+>
}
@@
identifier plane_atomic_func.func;
identifier plane;
symbol state;
@@
func(struct drm_plane *plane,
- struct drm_plane_state *state)
+ struct drm_plane_state *old_plane_state)
{
<...
- state
+ old_plane_state
...>
}
@ ignores_old_state @
identifier plane_atomic_func.func;
identifier plane, old_state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
... when != old_state
}
@ adds_old_state depends on plane_atomic_func && !ignores_old_state @
identifier plane_atomic_func.func;
identifier plane, plane_state;
@@
func(struct drm_plane *plane, struct drm_plane_state *plane_state)
{
+ struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
...
}
@ depends on plane_atomic_func @
identifier plane_atomic_func.func;
identifier plane, plane_state;
@@
func(struct drm_plane *plane,
- struct drm_plane_state *plane_state
+ struct drm_atomic_state *state
)
{ ... }
@ include depends on adds_old_state @
@@
#include <drm/drm_atomic.h>
@ no_include depends on !include && adds_old_state @
@@
+ #include <drm/drm_atomic.h>
#include <drm/...>
@@
identifier plane_atomic_func.func;
identifier plane, state;
identifier plane_state;
@@
func(struct drm_plane *plane, struct drm_atomic_state *state) {
...
struct drm_plane_state *plane_state = drm_atomic_get_old_plane_state(state, plane);
<+...
- plane_state->state
+ state
...+>
}
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-9-maxime@cerno.tech
2021-02-19 20:00:29 +08:00
|
|
|
struct drm_atomic_state *state)
|
2019-06-03 23:23:31 +08:00
|
|
|
{
|
2020-07-17 00:38:43 +08:00
|
|
|
struct ingenic_drm *priv = drm_device_get_priv(plane->dev);
|
2021-05-24 01:04:15 +08:00
|
|
|
struct drm_plane_state *newstate = drm_atomic_get_new_plane_state(state, plane);
|
|
|
|
|
struct drm_plane_state *oldstate = drm_atomic_get_old_plane_state(state, plane);
|
2021-10-27 02:12:35 +08:00
|
|
|
unsigned int width, height, cpp, next_id, plane_id;
|
2020-09-28 03:36:45 +08:00
|
|
|
struct drm_crtc_state *crtc_state;
|
2020-07-17 00:38:43 +08:00
|
|
|
struct ingenic_dma_hwdesc *hwdesc;
|
2019-12-10 22:41:38 +08:00
|
|
|
dma_addr_t addr;
|
2020-09-28 03:36:45 +08:00
|
|
|
u32 fourcc;
|
2019-06-03 23:23:31 +08:00
|
|
|
|
drm: Rename plane->state variables in atomic update and disable
Some drivers are storing the plane->state pointer in atomic_update and
atomic_disable in a variable simply called state, while the state passed
as an argument is called old_state.
In order to ease subsequent reworks and to avoid confusing or
inconsistent names, let's rename those variables to new_state.
This was done using the following coccinelle script, plus some manual
changes for mtk and tegra.
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
(
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_disable = func,
...,
};
|
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_update = func,
...,
};
)
@ moves_new_state_old_state @
identifier plane_atomic_func.func;
identifier plane;
symbol old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_state = plane->state;
...
}
@ depends on moves_new_state_old_state @
identifier plane_atomic_func.func;
identifier plane;
identifier old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
<...
- state
+ new_state
...>
}
@ moves_new_state_oldstate @
identifier plane_atomic_func.func;
identifier plane;
symbol oldstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *oldstate)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *newstate = plane->state;
...
}
@ depends on moves_new_state_oldstate @
identifier plane_atomic_func.func;
identifier plane;
identifier old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
<...
- state
+ newstate
...>
}
@ moves_new_state_old_pstate @
identifier plane_atomic_func.func;
identifier plane;
symbol old_pstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_pstate)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_pstate = plane->state;
...
}
@ depends on moves_new_state_old_pstate @
identifier plane_atomic_func.func;
identifier plane;
identifier old_pstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_pstate)
{
<...
- state
+ new_pstate
...>
}
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-8-maxime@cerno.tech
2021-02-19 20:00:28 +08:00
|
|
|
if (newstate && newstate->fb) {
|
2021-05-24 01:04:15 +08:00
|
|
|
if (priv->soc_info->map_noncoherent)
|
|
|
|
|
drm_fb_cma_sync_non_coherent(&priv->drm, oldstate, newstate);
|
|
|
|
|
|
drm: Rename plane->state variables in atomic update and disable
Some drivers are storing the plane->state pointer in atomic_update and
atomic_disable in a variable simply called state, while the state passed
as an argument is called old_state.
In order to ease subsequent reworks and to avoid confusing or
inconsistent names, let's rename those variables to new_state.
This was done using the following coccinelle script, plus some manual
changes for mtk and tegra.
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
(
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_disable = func,
...,
};
|
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_update = func,
...,
};
)
@ moves_new_state_old_state @
identifier plane_atomic_func.func;
identifier plane;
symbol old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_state = plane->state;
...
}
@ depends on moves_new_state_old_state @
identifier plane_atomic_func.func;
identifier plane;
identifier old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
<...
- state
+ new_state
...>
}
@ moves_new_state_oldstate @
identifier plane_atomic_func.func;
identifier plane;
symbol oldstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *oldstate)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *newstate = plane->state;
...
}
@ depends on moves_new_state_oldstate @
identifier plane_atomic_func.func;
identifier plane;
identifier old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
<...
- state
+ newstate
...>
}
@ moves_new_state_old_pstate @
identifier plane_atomic_func.func;
identifier plane;
symbol old_pstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_pstate)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_pstate = plane->state;
...
}
@ depends on moves_new_state_old_pstate @
identifier plane_atomic_func.func;
identifier plane;
identifier old_pstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_pstate)
{
<...
- state
+ new_pstate
...>
}
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-8-maxime@cerno.tech
2021-02-19 20:00:28 +08:00
|
|
|
crtc_state = newstate->crtc->state;
|
2021-10-27 02:12:35 +08:00
|
|
|
plane_id = !!(priv->soc_info->has_osd && plane != &priv->f0);
|
2020-09-28 03:36:45 +08:00
|
|
|
|
drm: Rename plane->state variables in atomic update and disable
Some drivers are storing the plane->state pointer in atomic_update and
atomic_disable in a variable simply called state, while the state passed
as an argument is called old_state.
In order to ease subsequent reworks and to avoid confusing or
inconsistent names, let's rename those variables to new_state.
This was done using the following coccinelle script, plus some manual
changes for mtk and tegra.
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
(
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_disable = func,
...,
};
|
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_update = func,
...,
};
)
@ moves_new_state_old_state @
identifier plane_atomic_func.func;
identifier plane;
symbol old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_state = plane->state;
...
}
@ depends on moves_new_state_old_state @
identifier plane_atomic_func.func;
identifier plane;
identifier old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
<...
- state
+ new_state
...>
}
@ moves_new_state_oldstate @
identifier plane_atomic_func.func;
identifier plane;
symbol oldstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *oldstate)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *newstate = plane->state;
...
}
@ depends on moves_new_state_oldstate @
identifier plane_atomic_func.func;
identifier plane;
identifier old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
<...
- state
+ newstate
...>
}
@ moves_new_state_old_pstate @
identifier plane_atomic_func.func;
identifier plane;
symbol old_pstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_pstate)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_pstate = plane->state;
...
}
@ depends on moves_new_state_old_pstate @
identifier plane_atomic_func.func;
identifier plane;
identifier old_pstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_pstate)
{
<...
- state
+ new_pstate
...>
}
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-8-maxime@cerno.tech
2021-02-19 20:00:28 +08:00
|
|
|
addr = drm_fb_cma_get_gem_addr(newstate->fb, newstate, 0);
|
|
|
|
|
width = newstate->src_w >> 16;
|
|
|
|
|
height = newstate->src_h >> 16;
|
|
|
|
|
cpp = newstate->fb->format->cpp[0];
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2021-10-27 02:12:35 +08:00
|
|
|
hwdesc = &priv->dma_hwdescs->hwdesc[plane_id];
|
2020-07-17 00:38:43 +08:00
|
|
|
|
|
|
|
|
hwdesc->addr = addr;
|
|
|
|
|
hwdesc->cmd = JZ_LCD_CMD_EOF_IRQ | (width * height * cpp / 4);
|
|
|
|
|
|
2020-09-28 03:36:45 +08:00
|
|
|
if (drm_atomic_crtc_needs_modeset(crtc_state)) {
|
drm: Rename plane->state variables in atomic update and disable
Some drivers are storing the plane->state pointer in atomic_update and
atomic_disable in a variable simply called state, while the state passed
as an argument is called old_state.
In order to ease subsequent reworks and to avoid confusing or
inconsistent names, let's rename those variables to new_state.
This was done using the following coccinelle script, plus some manual
changes for mtk and tegra.
@ plane_atomic_func @
identifier helpers;
identifier func;
@@
(
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_disable = func,
...,
};
|
static const struct drm_plane_helper_funcs helpers = {
...,
.atomic_update = func,
...,
};
)
@ moves_new_state_old_state @
identifier plane_atomic_func.func;
identifier plane;
symbol old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_state = plane->state;
...
}
@ depends on moves_new_state_old_state @
identifier plane_atomic_func.func;
identifier plane;
identifier old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
<...
- state
+ new_state
...>
}
@ moves_new_state_oldstate @
identifier plane_atomic_func.func;
identifier plane;
symbol oldstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *oldstate)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *newstate = plane->state;
...
}
@ depends on moves_new_state_oldstate @
identifier plane_atomic_func.func;
identifier plane;
identifier old_state;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_state)
{
<...
- state
+ newstate
...>
}
@ moves_new_state_old_pstate @
identifier plane_atomic_func.func;
identifier plane;
symbol old_pstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_pstate)
{
...
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_pstate = plane->state;
...
}
@ depends on moves_new_state_old_pstate @
identifier plane_atomic_func.func;
identifier plane;
identifier old_pstate;
symbol state;
@@
func(struct drm_plane *plane, struct drm_plane_state *old_pstate)
{
<...
- state
+ new_pstate
...>
}
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210219120032.260676-8-maxime@cerno.tech
2021-02-19 20:00:28 +08:00
|
|
|
fourcc = newstate->fb->format->format;
|
2020-09-28 03:36:45 +08:00
|
|
|
|
|
|
|
|
ingenic_drm_plane_config(priv->dev, plane, fourcc);
|
|
|
|
|
|
2021-10-27 02:12:35 +08:00
|
|
|
next_id = fourcc == DRM_FORMAT_C8 ? HWDESC_PALETTE : 0;
|
|
|
|
|
priv->dma_hwdescs->hwdesc[0].next = dma_hwdesc_addr(priv, next_id);
|
2020-09-28 03:36:45 +08:00
|
|
|
|
|
|
|
|
crtc_state->color_mgmt_changed = fourcc == DRM_FORMAT_C8;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (crtc_state->color_mgmt_changed)
|
|
|
|
|
ingenic_drm_update_palette(priv, crtc_state->gamma_lut->data);
|
2019-12-10 22:41:38 +08:00
|
|
|
}
|
2019-06-03 23:23:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder,
|
|
|
|
|
struct drm_crtc_state *crtc_state,
|
|
|
|
|
struct drm_connector_state *conn_state)
|
|
|
|
|
{
|
2020-07-17 00:38:45 +08:00
|
|
|
struct ingenic_drm *priv = drm_device_get_priv(encoder->dev);
|
2019-06-03 23:23:31 +08:00
|
|
|
struct drm_display_mode *mode = &crtc_state->adjusted_mode;
|
2019-06-28 02:21:13 +08:00
|
|
|
struct drm_connector *conn = conn_state->connector;
|
|
|
|
|
struct drm_display_info *info = &conn->display_info;
|
2020-11-19 23:55:59 +08:00
|
|
|
unsigned int cfg, rgbcfg = 0;
|
2019-06-28 02:21:13 +08:00
|
|
|
|
|
|
|
|
priv->panel_is_sharp = info->bus_flags & DRM_BUS_FLAG_SHARP_SIGNALS;
|
|
|
|
|
|
|
|
|
|
if (priv->panel_is_sharp) {
|
|
|
|
|
cfg = JZ_LCD_CFG_MODE_SPECIAL_TFT_1 | JZ_LCD_CFG_REV_POLARITY;
|
|
|
|
|
} else {
|
|
|
|
|
cfg = JZ_LCD_CFG_PS_DISABLE | JZ_LCD_CFG_CLS_DISABLE
|
|
|
|
|
| JZ_LCD_CFG_SPL_DISABLE | JZ_LCD_CFG_REV_DISABLE;
|
|
|
|
|
}
|
2019-06-03 23:23:31 +08:00
|
|
|
|
|
|
|
|
if (mode->flags & DRM_MODE_FLAG_NHSYNC)
|
|
|
|
|
cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
|
|
|
|
|
if (mode->flags & DRM_MODE_FLAG_NVSYNC)
|
|
|
|
|
cfg |= JZ_LCD_CFG_VSYNC_ACTIVE_LOW;
|
|
|
|
|
if (info->bus_flags & DRM_BUS_FLAG_DE_LOW)
|
|
|
|
|
cfg |= JZ_LCD_CFG_DE_ACTIVE_LOW;
|
2020-07-01 02:05:40 +08:00
|
|
|
if (info->bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
|
2019-06-03 23:23:31 +08:00
|
|
|
cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE;
|
|
|
|
|
|
2019-06-28 02:21:13 +08:00
|
|
|
if (!priv->panel_is_sharp) {
|
|
|
|
|
if (conn->connector_type == DRM_MODE_CONNECTOR_TV) {
|
|
|
|
|
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
|
|
|
|
|
cfg |= JZ_LCD_CFG_MODE_TV_OUT_I;
|
|
|
|
|
else
|
|
|
|
|
cfg |= JZ_LCD_CFG_MODE_TV_OUT_P;
|
|
|
|
|
} else {
|
|
|
|
|
switch (*info->bus_formats) {
|
|
|
|
|
case MEDIA_BUS_FMT_RGB565_1X16:
|
|
|
|
|
cfg |= JZ_LCD_CFG_MODE_GENERIC_16BIT;
|
|
|
|
|
break;
|
|
|
|
|
case MEDIA_BUS_FMT_RGB666_1X18:
|
|
|
|
|
cfg |= JZ_LCD_CFG_MODE_GENERIC_18BIT;
|
|
|
|
|
break;
|
|
|
|
|
case MEDIA_BUS_FMT_RGB888_1X24:
|
|
|
|
|
cfg |= JZ_LCD_CFG_MODE_GENERIC_24BIT;
|
|
|
|
|
break;
|
2020-11-19 23:55:59 +08:00
|
|
|
case MEDIA_BUS_FMT_RGB888_3X8_DELTA:
|
|
|
|
|
rgbcfg = JZ_LCD_RGBC_EVEN_GBR | JZ_LCD_RGBC_ODD_RGB;
|
|
|
|
|
fallthrough;
|
2019-06-28 02:21:14 +08:00
|
|
|
case MEDIA_BUS_FMT_RGB888_3X8:
|
|
|
|
|
cfg |= JZ_LCD_CFG_MODE_8BIT_SERIAL;
|
|
|
|
|
break;
|
2019-06-28 02:21:13 +08:00
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
2019-06-03 23:23:31 +08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_CFG, cfg);
|
2020-11-19 23:55:59 +08:00
|
|
|
regmap_write(priv->map, JZ_REG_LCD_RGBC, rgbcfg);
|
2019-06-03 23:23:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int ingenic_drm_encoder_atomic_check(struct drm_encoder *encoder,
|
|
|
|
|
struct drm_crtc_state *crtc_state,
|
|
|
|
|
struct drm_connector_state *conn_state)
|
|
|
|
|
{
|
|
|
|
|
struct drm_display_info *info = &conn_state->connector->display_info;
|
2020-11-19 23:55:58 +08:00
|
|
|
struct drm_display_mode *mode = &crtc_state->adjusted_mode;
|
2019-06-03 23:23:31 +08:00
|
|
|
|
|
|
|
|
if (info->num_bus_formats != 1)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
|
|
if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_TV)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
switch (*info->bus_formats) {
|
2020-11-19 23:55:58 +08:00
|
|
|
case MEDIA_BUS_FMT_RGB888_3X8:
|
2020-11-19 23:55:59 +08:00
|
|
|
case MEDIA_BUS_FMT_RGB888_3X8_DELTA:
|
2020-11-19 23:55:58 +08:00
|
|
|
/*
|
|
|
|
|
* The LCD controller expects timing values in dot-clock ticks,
|
|
|
|
|
* which is 3x the timing values in pixels when using a 3x8-bit
|
|
|
|
|
* display; but it will count the display area size in pixels
|
|
|
|
|
* either way. Go figure.
|
|
|
|
|
*/
|
|
|
|
|
mode->crtc_clock = mode->clock * 3;
|
|
|
|
|
mode->crtc_hsync_start = mode->hsync_start * 3 - mode->hdisplay * 2;
|
|
|
|
|
mode->crtc_hsync_end = mode->hsync_end * 3 - mode->hdisplay * 2;
|
|
|
|
|
mode->crtc_hdisplay = mode->hdisplay;
|
|
|
|
|
mode->crtc_htotal = mode->htotal * 3 - mode->hdisplay * 2;
|
|
|
|
|
return 0;
|
2019-06-03 23:23:31 +08:00
|
|
|
case MEDIA_BUS_FMT_RGB565_1X16:
|
|
|
|
|
case MEDIA_BUS_FMT_RGB666_1X18:
|
|
|
|
|
case MEDIA_BUS_FMT_RGB888_1X24:
|
|
|
|
|
return 0;
|
|
|
|
|
default:
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static irqreturn_t ingenic_drm_irq_handler(int irq, void *arg)
|
|
|
|
|
{
|
2020-05-17 05:50:50 +08:00
|
|
|
struct ingenic_drm *priv = drm_device_get_priv(arg);
|
2019-06-03 23:23:31 +08:00
|
|
|
unsigned int state;
|
|
|
|
|
|
|
|
|
|
regmap_read(priv->map, JZ_REG_LCD_STATE, &state);
|
|
|
|
|
|
|
|
|
|
regmap_update_bits(priv->map, JZ_REG_LCD_STATE,
|
|
|
|
|
JZ_LCD_STATE_EOF_IRQ, 0);
|
|
|
|
|
|
|
|
|
|
if (state & JZ_LCD_STATE_EOF_IRQ)
|
|
|
|
|
drm_crtc_handle_vblank(&priv->crtc);
|
|
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int ingenic_drm_enable_vblank(struct drm_crtc *crtc)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
|
|
|
|
|
|
2021-08-08 21:45:21 +08:00
|
|
|
if (priv->no_vblank)
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
2019-06-03 23:23:31 +08:00
|
|
|
regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
|
|
|
|
|
JZ_LCD_CTRL_EOF_IRQ, JZ_LCD_CTRL_EOF_IRQ);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_disable_vblank(struct drm_crtc *crtc)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
|
|
|
|
|
|
|
|
|
|
regmap_update_bits(priv->map, JZ_REG_LCD_CTRL, JZ_LCD_CTRL_EOF_IRQ, 0);
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-24 01:04:15 +08:00
|
|
|
static struct drm_framebuffer *
|
|
|
|
|
ingenic_drm_gem_fb_create(struct drm_device *drm, struct drm_file *file,
|
|
|
|
|
const struct drm_mode_fb_cmd2 *mode_cmd)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_device_get_priv(drm);
|
|
|
|
|
|
|
|
|
|
if (priv->soc_info->map_noncoherent)
|
|
|
|
|
return drm_gem_fb_create_with_dirty(drm, file, mode_cmd);
|
|
|
|
|
|
|
|
|
|
return drm_gem_fb_create(drm, file, mode_cmd);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct drm_gem_object *
|
|
|
|
|
ingenic_drm_gem_create_object(struct drm_device *drm, size_t size)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = drm_device_get_priv(drm);
|
|
|
|
|
struct drm_gem_cma_object *obj;
|
|
|
|
|
|
|
|
|
|
obj = kzalloc(sizeof(*obj), GFP_KERNEL);
|
|
|
|
|
if (!obj)
|
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
|
|
obj->map_noncoherent = priv->soc_info->map_noncoherent;
|
|
|
|
|
|
|
|
|
|
return &obj->base;
|
|
|
|
|
}
|
|
|
|
|
|
2021-10-27 02:12:36 +08:00
|
|
|
static struct drm_private_state *
|
|
|
|
|
ingenic_drm_duplicate_state(struct drm_private_obj *obj)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm_private_state *state = to_ingenic_drm_priv_state(obj->state);
|
|
|
|
|
|
|
|
|
|
state = kmemdup(state, sizeof(*state), GFP_KERNEL);
|
|
|
|
|
if (!state)
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
|
|
|
|
|
|
|
|
|
|
return &state->base;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_destroy_state(struct drm_private_obj *obj,
|
|
|
|
|
struct drm_private_state *state)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm_private_state *priv_state = to_ingenic_drm_priv_state(state);
|
|
|
|
|
|
|
|
|
|
kfree(priv_state);
|
|
|
|
|
}
|
|
|
|
|
|
2020-10-04 22:17:58 +08:00
|
|
|
DEFINE_DRM_GEM_CMA_FOPS(ingenic_drm_fops);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2020-11-04 18:04:24 +08:00
|
|
|
static const struct drm_driver ingenic_drm_driver_data = {
|
2019-06-17 23:39:24 +08:00
|
|
|
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
|
2019-06-03 23:23:31 +08:00
|
|
|
.name = "ingenic-drm",
|
|
|
|
|
.desc = "DRM module for Ingenic SoCs",
|
2020-07-17 00:38:46 +08:00
|
|
|
.date = "20200716",
|
2019-06-03 23:23:31 +08:00
|
|
|
.major = 1,
|
2020-07-17 00:38:46 +08:00
|
|
|
.minor = 1,
|
2019-06-03 23:23:31 +08:00
|
|
|
.patchlevel = 0,
|
|
|
|
|
|
|
|
|
|
.fops = &ingenic_drm_fops,
|
2021-05-24 01:04:15 +08:00
|
|
|
.gem_create_object = ingenic_drm_gem_create_object,
|
2020-06-05 15:32:22 +08:00
|
|
|
DRM_GEM_CMA_DRIVER_OPS,
|
2019-06-03 23:23:31 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct drm_plane_funcs ingenic_drm_primary_plane_funcs = {
|
|
|
|
|
.update_plane = drm_atomic_helper_update_plane,
|
|
|
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
|
|
|
|
.reset = drm_atomic_helper_plane_reset,
|
|
|
|
|
.destroy = drm_plane_cleanup,
|
|
|
|
|
|
|
|
|
|
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
|
|
|
|
|
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct drm_crtc_funcs ingenic_drm_crtc_funcs = {
|
|
|
|
|
.set_config = drm_atomic_helper_set_config,
|
|
|
|
|
.page_flip = drm_atomic_helper_page_flip,
|
|
|
|
|
.reset = drm_atomic_helper_crtc_reset,
|
|
|
|
|
.destroy = drm_crtc_cleanup,
|
|
|
|
|
|
|
|
|
|
.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
|
|
|
|
|
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
|
|
|
|
|
|
|
|
|
|
.enable_vblank = ingenic_drm_enable_vblank,
|
|
|
|
|
.disable_vblank = ingenic_drm_disable_vblank,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct drm_plane_helper_funcs ingenic_drm_plane_helper_funcs = {
|
|
|
|
|
.atomic_update = ingenic_drm_plane_atomic_update,
|
2020-07-17 00:38:43 +08:00
|
|
|
.atomic_check = ingenic_drm_plane_atomic_check,
|
|
|
|
|
.atomic_disable = ingenic_drm_plane_atomic_disable,
|
2019-06-03 23:23:31 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct drm_crtc_helper_funcs ingenic_drm_crtc_helper_funcs = {
|
|
|
|
|
.atomic_enable = ingenic_drm_crtc_atomic_enable,
|
|
|
|
|
.atomic_disable = ingenic_drm_crtc_atomic_disable,
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
.atomic_begin = ingenic_drm_crtc_atomic_begin,
|
2019-06-03 23:23:31 +08:00
|
|
|
.atomic_flush = ingenic_drm_crtc_atomic_flush,
|
|
|
|
|
.atomic_check = ingenic_drm_crtc_atomic_check,
|
2020-07-28 23:16:41 +08:00
|
|
|
.mode_valid = ingenic_drm_crtc_mode_valid,
|
2019-06-03 23:23:31 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct drm_encoder_helper_funcs ingenic_drm_encoder_helper_funcs = {
|
|
|
|
|
.atomic_mode_set = ingenic_drm_encoder_atomic_mode_set,
|
|
|
|
|
.atomic_check = ingenic_drm_encoder_atomic_check,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct drm_mode_config_funcs ingenic_drm_mode_config_funcs = {
|
2021-05-24 01:04:15 +08:00
|
|
|
.fb_create = ingenic_drm_gem_fb_create,
|
2019-06-03 23:23:31 +08:00
|
|
|
.output_poll_changed = drm_fb_helper_output_poll_changed,
|
|
|
|
|
.atomic_check = drm_atomic_helper_check,
|
|
|
|
|
.atomic_commit = drm_atomic_helper_commit,
|
|
|
|
|
};
|
|
|
|
|
|
2020-07-17 00:38:43 +08:00
|
|
|
static struct drm_mode_config_helper_funcs ingenic_drm_mode_config_helpers = {
|
2021-08-08 21:45:21 +08:00
|
|
|
.atomic_commit_tail = drm_atomic_helper_commit_tail,
|
2020-07-17 00:38:43 +08:00
|
|
|
};
|
|
|
|
|
|
2021-10-27 02:12:36 +08:00
|
|
|
static const struct drm_private_state_funcs ingenic_drm_private_state_funcs = {
|
|
|
|
|
.atomic_duplicate_state = ingenic_drm_duplicate_state,
|
|
|
|
|
.atomic_destroy_state = ingenic_drm_destroy_state,
|
|
|
|
|
};
|
|
|
|
|
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
static void ingenic_drm_unbind_all(void *d)
|
2019-06-03 23:23:31 +08:00
|
|
|
{
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
struct ingenic_drm *priv = d;
|
|
|
|
|
|
|
|
|
|
component_unbind_all(priv->dev, &priv->drm);
|
|
|
|
|
}
|
|
|
|
|
|
2020-09-27 01:04:56 +08:00
|
|
|
static void __maybe_unused ingenic_drm_release_rmem(void *d)
|
|
|
|
|
{
|
|
|
|
|
of_reserved_mem_device_release(d);
|
|
|
|
|
}
|
|
|
|
|
|
2021-10-27 02:12:35 +08:00
|
|
|
static void ingenic_drm_configure_hwdesc(struct ingenic_drm *priv,
|
|
|
|
|
unsigned int hwdesc,
|
|
|
|
|
unsigned int next_hwdesc, u32 id)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_dma_hwdesc *desc = &priv->dma_hwdescs->hwdesc[hwdesc];
|
|
|
|
|
|
|
|
|
|
desc->next = dma_hwdesc_addr(priv, next_hwdesc);
|
|
|
|
|
desc->id = id;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_configure_hwdesc_palette(struct ingenic_drm *priv)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_dma_hwdesc *desc;
|
|
|
|
|
|
|
|
|
|
ingenic_drm_configure_hwdesc(priv, HWDESC_PALETTE, 0, 0xc0);
|
|
|
|
|
|
|
|
|
|
desc = &priv->dma_hwdescs->hwdesc[HWDESC_PALETTE];
|
|
|
|
|
desc->addr = priv->dma_hwdescs_phys
|
|
|
|
|
+ offsetof(struct ingenic_dma_hwdescs, palette);
|
|
|
|
|
desc->cmd = JZ_LCD_CMD_ENABLE_PAL
|
|
|
|
|
| (sizeof(priv->dma_hwdescs->palette) / 4);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_configure_hwdesc_plane(struct ingenic_drm *priv,
|
|
|
|
|
unsigned int plane)
|
|
|
|
|
{
|
|
|
|
|
ingenic_drm_configure_hwdesc(priv, plane, plane, 0xf0 | plane);
|
|
|
|
|
}
|
|
|
|
|
|
2021-10-27 02:12:36 +08:00
|
|
|
static void ingenic_drm_atomic_private_obj_fini(struct drm_device *drm, void *private_obj)
|
|
|
|
|
{
|
|
|
|
|
drm_atomic_private_obj_fini(private_obj);
|
|
|
|
|
}
|
|
|
|
|
|
2020-08-27 19:44:04 +08:00
|
|
|
static int ingenic_drm_bind(struct device *dev, bool has_components)
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
{
|
|
|
|
|
struct platform_device *pdev = to_platform_device(dev);
|
2021-10-27 02:12:36 +08:00
|
|
|
struct ingenic_drm_private_state *private_state;
|
2019-06-03 23:23:31 +08:00
|
|
|
const struct jz_soc_info *soc_info;
|
|
|
|
|
struct ingenic_drm *priv;
|
|
|
|
|
struct clk *parent_clk;
|
2021-01-24 16:55:52 +08:00
|
|
|
struct drm_plane *primary;
|
2019-06-03 23:23:31 +08:00
|
|
|
struct drm_bridge *bridge;
|
|
|
|
|
struct drm_panel *panel;
|
2020-07-17 00:38:45 +08:00
|
|
|
struct drm_encoder *encoder;
|
2019-06-03 23:23:31 +08:00
|
|
|
struct drm_device *drm;
|
|
|
|
|
void __iomem *base;
|
|
|
|
|
long parent_rate;
|
2020-07-17 00:38:45 +08:00
|
|
|
unsigned int i, clone_mask = 0;
|
2020-09-27 01:04:57 +08:00
|
|
|
dma_addr_t dma_hwdesc_phys_f0, dma_hwdesc_phys_f1;
|
2019-06-03 23:23:31 +08:00
|
|
|
int ret, irq;
|
|
|
|
|
|
|
|
|
|
soc_info = of_device_get_match_data(dev);
|
|
|
|
|
if (!soc_info) {
|
|
|
|
|
dev_err(dev, "Missing platform data\n");
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
2020-09-27 01:04:56 +08:00
|
|
|
if (IS_ENABLED(CONFIG_OF_RESERVED_MEM)) {
|
|
|
|
|
ret = of_reserved_mem_device_init(dev);
|
|
|
|
|
|
|
|
|
|
if (ret && ret != -ENODEV)
|
|
|
|
|
dev_warn(dev, "Failed to get reserved memory: %d\n", ret);
|
|
|
|
|
|
|
|
|
|
if (!ret) {
|
|
|
|
|
ret = devm_add_action_or_reset(dev, ingenic_drm_release_rmem, dev);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-04-15 15:40:05 +08:00
|
|
|
priv = devm_drm_dev_alloc(dev, &ingenic_drm_driver_data,
|
|
|
|
|
struct ingenic_drm, drm);
|
|
|
|
|
if (IS_ERR(priv))
|
|
|
|
|
return PTR_ERR(priv);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2019-12-10 22:41:41 +08:00
|
|
|
priv->soc_info = soc_info;
|
2019-06-03 23:23:31 +08:00
|
|
|
priv->dev = dev;
|
|
|
|
|
drm = &priv->drm;
|
|
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, priv);
|
|
|
|
|
|
2020-03-23 22:49:30 +08:00
|
|
|
ret = drmm_mode_config_init(drm);
|
|
|
|
|
if (ret)
|
2019-06-03 23:23:31 +08:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
|
|
drm->mode_config.min_width = 0;
|
|
|
|
|
drm->mode_config.min_height = 0;
|
2019-12-10 22:41:41 +08:00
|
|
|
drm->mode_config.max_width = soc_info->max_width;
|
2019-12-10 22:41:40 +08:00
|
|
|
drm->mode_config.max_height = 4095;
|
2019-06-03 23:23:31 +08:00
|
|
|
drm->mode_config.funcs = &ingenic_drm_mode_config_funcs;
|
2020-07-17 00:38:43 +08:00
|
|
|
drm->mode_config.helper_private = &ingenic_drm_mode_config_helpers;
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2019-06-28 02:21:12 +08:00
|
|
|
base = devm_platform_ioremap_resource(pdev, 0);
|
2019-06-03 23:23:31 +08:00
|
|
|
if (IS_ERR(base)) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Failed to get memory resource\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
return PTR_ERR(base);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
priv->map = devm_regmap_init_mmio(dev, base,
|
|
|
|
|
&ingenic_drm_regmap_config);
|
|
|
|
|
if (IS_ERR(priv->map)) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Failed to create regmap\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
return PTR_ERR(priv->map);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
2020-04-05 17:25:30 +08:00
|
|
|
if (irq < 0)
|
2019-06-03 23:23:31 +08:00
|
|
|
return irq;
|
|
|
|
|
|
|
|
|
|
if (soc_info->needs_dev_clk) {
|
|
|
|
|
priv->lcd_clk = devm_clk_get(dev, "lcd");
|
|
|
|
|
if (IS_ERR(priv->lcd_clk)) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Failed to get lcd clock\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
return PTR_ERR(priv->lcd_clk);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
priv->pix_clk = devm_clk_get(dev, "lcd_pclk");
|
|
|
|
|
if (IS_ERR(priv->pix_clk)) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Failed to get pixel clock\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
return PTR_ERR(priv->pix_clk);
|
|
|
|
|
}
|
|
|
|
|
|
2020-09-27 01:04:57 +08:00
|
|
|
priv->dma_hwdescs = dmam_alloc_coherent(dev,
|
|
|
|
|
sizeof(*priv->dma_hwdescs),
|
|
|
|
|
&priv->dma_hwdescs_phys,
|
|
|
|
|
GFP_KERNEL);
|
|
|
|
|
if (!priv->dma_hwdescs)
|
2019-06-03 23:23:31 +08:00
|
|
|
return -ENOMEM;
|
|
|
|
|
|
2020-09-27 01:04:57 +08:00
|
|
|
/* Configure DMA hwdesc for foreground0 plane */
|
2021-10-27 02:12:35 +08:00
|
|
|
ingenic_drm_configure_hwdesc_plane(priv, 0);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2020-09-27 01:04:57 +08:00
|
|
|
/* Configure DMA hwdesc for foreground1 plane */
|
2021-10-27 02:12:35 +08:00
|
|
|
ingenic_drm_configure_hwdesc_plane(priv, 1);
|
2020-07-17 00:38:43 +08:00
|
|
|
|
2020-09-28 03:36:45 +08:00
|
|
|
/* Configure DMA hwdesc for palette */
|
2021-10-27 02:12:35 +08:00
|
|
|
ingenic_drm_configure_hwdesc_palette(priv);
|
2020-09-28 03:36:45 +08:00
|
|
|
|
2021-01-24 16:55:52 +08:00
|
|
|
primary = priv->soc_info->has_osd ? &priv->f1 : &priv->f0;
|
2020-07-17 00:38:43 +08:00
|
|
|
|
2021-01-24 16:55:52 +08:00
|
|
|
drm_plane_helper_add(primary, &ingenic_drm_plane_helper_funcs);
|
|
|
|
|
|
|
|
|
|
ret = drm_universal_plane_init(drm, primary, 1,
|
2020-07-17 00:38:43 +08:00
|
|
|
&ingenic_drm_primary_plane_funcs,
|
2020-09-27 01:04:58 +08:00
|
|
|
priv->soc_info->formats_f1,
|
|
|
|
|
priv->soc_info->num_formats_f1,
|
2019-06-03 23:23:31 +08:00
|
|
|
NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
|
|
|
|
|
if (ret) {
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
dev_err(dev, "Failed to register plane: %i\n", ret);
|
2019-06-03 23:23:31 +08:00
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-24 01:04:15 +08:00
|
|
|
if (soc_info->map_noncoherent)
|
|
|
|
|
drm_plane_enable_fb_damage_clips(&priv->f1);
|
|
|
|
|
|
2019-06-03 23:23:31 +08:00
|
|
|
drm_crtc_helper_add(&priv->crtc, &ingenic_drm_crtc_helper_funcs);
|
|
|
|
|
|
2021-01-24 16:55:52 +08:00
|
|
|
ret = drm_crtc_init_with_planes(drm, &priv->crtc, primary,
|
2019-06-03 23:23:31 +08:00
|
|
|
NULL, &ingenic_drm_crtc_funcs, NULL);
|
|
|
|
|
if (ret) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Failed to init CRTC: %i\n", ret);
|
2019-06-03 23:23:31 +08:00
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2020-09-28 03:36:45 +08:00
|
|
|
drm_crtc_enable_color_mgmt(&priv->crtc, 0, false,
|
|
|
|
|
ARRAY_SIZE(priv->dma_hwdescs->palette));
|
|
|
|
|
|
2020-07-17 00:38:43 +08:00
|
|
|
if (soc_info->has_osd) {
|
|
|
|
|
drm_plane_helper_add(&priv->f0,
|
|
|
|
|
&ingenic_drm_plane_helper_funcs);
|
|
|
|
|
|
|
|
|
|
ret = drm_universal_plane_init(drm, &priv->f0, 1,
|
|
|
|
|
&ingenic_drm_primary_plane_funcs,
|
2020-09-27 01:04:58 +08:00
|
|
|
priv->soc_info->formats_f0,
|
|
|
|
|
priv->soc_info->num_formats_f0,
|
2020-07-17 00:38:43 +08:00
|
|
|
NULL, DRM_PLANE_TYPE_OVERLAY,
|
|
|
|
|
NULL);
|
|
|
|
|
if (ret) {
|
|
|
|
|
dev_err(dev, "Failed to register overlay plane: %i\n",
|
|
|
|
|
ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
|
2021-05-24 01:04:15 +08:00
|
|
|
if (soc_info->map_noncoherent)
|
|
|
|
|
drm_plane_enable_fb_damage_clips(&priv->f0);
|
|
|
|
|
|
2020-08-27 19:44:04 +08:00
|
|
|
if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU) && has_components) {
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
ret = component_bind_all(dev, drm);
|
|
|
|
|
if (ret) {
|
|
|
|
|
if (ret != -EPROBE_DEFER)
|
|
|
|
|
dev_err(dev, "Failed to bind components: %i\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ret = devm_add_action_or_reset(dev, ingenic_drm_unbind_all, priv);
|
|
|
|
|
if (ret)
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
|
|
priv->ipu_plane = drm_plane_from_index(drm, 2);
|
|
|
|
|
if (!priv->ipu_plane) {
|
|
|
|
|
dev_err(dev, "Failed to retrieve IPU plane\n");
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
}
|
2020-07-17 00:38:43 +08:00
|
|
|
}
|
|
|
|
|
|
2020-07-17 00:38:45 +08:00
|
|
|
for (i = 0; ; i++) {
|
|
|
|
|
ret = drm_of_find_panel_or_bridge(dev->of_node, 0, i, &panel, &bridge);
|
|
|
|
|
if (ret) {
|
|
|
|
|
if (ret == -ENODEV)
|
|
|
|
|
break; /* we're done */
|
|
|
|
|
if (ret != -EPROBE_DEFER)
|
|
|
|
|
dev_err(dev, "Failed to get bridge handle\n");
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2020-07-17 00:38:45 +08:00
|
|
|
if (panel)
|
|
|
|
|
bridge = devm_drm_panel_bridge_add_typed(dev, panel,
|
|
|
|
|
DRM_MODE_CONNECTOR_DPI);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
2021-03-27 19:57:42 +08:00
|
|
|
encoder = drmm_plain_encoder_alloc(drm, NULL, DRM_MODE_ENCODER_DPI, NULL);
|
|
|
|
|
if (IS_ERR(encoder)) {
|
|
|
|
|
ret = PTR_ERR(encoder);
|
|
|
|
|
dev_err(dev, "Failed to init encoder: %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
2020-07-17 00:38:45 +08:00
|
|
|
|
|
|
|
|
encoder->possible_crtcs = 1;
|
|
|
|
|
|
|
|
|
|
drm_encoder_helper_add(encoder, &ingenic_drm_encoder_helper_funcs);
|
|
|
|
|
|
|
|
|
|
ret = drm_bridge_attach(encoder, bridge, NULL, 0);
|
2021-03-24 05:50:08 +08:00
|
|
|
if (ret)
|
2020-07-17 00:38:45 +08:00
|
|
|
return ret;
|
2019-06-03 23:23:31 +08:00
|
|
|
}
|
|
|
|
|
|
2020-07-17 00:38:45 +08:00
|
|
|
drm_for_each_encoder(encoder, drm) {
|
|
|
|
|
clone_mask |= BIT(drm_encoder_index(encoder));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
drm_for_each_encoder(encoder, drm) {
|
|
|
|
|
encoder->possible_clones = clone_mask;
|
2019-06-03 23:23:31 +08:00
|
|
|
}
|
|
|
|
|
|
2021-07-15 18:02:58 +08:00
|
|
|
ret = devm_request_irq(dev, irq, ingenic_drm_irq_handler, 0, drm->driver->name, drm);
|
2019-06-03 23:23:31 +08:00
|
|
|
if (ret) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Unable to install IRQ handler\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ret = drm_vblank_init(drm, 1);
|
|
|
|
|
if (ret) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Failed calling drm_vblank_init()\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
drm_mode_config_reset(drm);
|
|
|
|
|
|
|
|
|
|
ret = clk_prepare_enable(priv->pix_clk);
|
|
|
|
|
if (ret) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Unable to start pixel clock\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (priv->lcd_clk) {
|
|
|
|
|
parent_clk = clk_get_parent(priv->lcd_clk);
|
|
|
|
|
parent_rate = clk_get_rate(parent_clk);
|
|
|
|
|
|
|
|
|
|
/* LCD Device clock must be 3x the pixel clock for STN panels,
|
|
|
|
|
* or 1.5x the pixel clock for TFT panels. To avoid having to
|
|
|
|
|
* check for the LCD device clock everytime we do a mode change,
|
|
|
|
|
* we set the LCD device clock to the highest rate possible.
|
|
|
|
|
*/
|
|
|
|
|
ret = clk_set_rate(priv->lcd_clk, parent_rate);
|
|
|
|
|
if (ret) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Unable to set LCD clock rate\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
goto err_pixclk_disable;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ret = clk_prepare_enable(priv->lcd_clk);
|
|
|
|
|
if (ret) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Unable to start lcd clock\n");
|
2019-06-03 23:23:31 +08:00
|
|
|
goto err_pixclk_disable;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-07-17 00:38:40 +08:00
|
|
|
/* Set address of our DMA descriptor chain */
|
2020-09-27 01:04:57 +08:00
|
|
|
regmap_write(priv->map, JZ_REG_LCD_DA0, dma_hwdesc_phys_f0);
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_DA1, dma_hwdesc_phys_f1);
|
2020-07-17 00:38:43 +08:00
|
|
|
|
|
|
|
|
/* Enable OSD if available */
|
|
|
|
|
if (soc_info->has_osd)
|
|
|
|
|
regmap_write(priv->map, JZ_REG_LCD_OSDC, JZ_LCD_OSDC_OSDEN);
|
2020-07-17 00:38:40 +08:00
|
|
|
|
drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
|
|
|
mutex_init(&priv->clk_mutex);
|
|
|
|
|
priv->clock_nb.notifier_call = ingenic_drm_update_pixclk;
|
|
|
|
|
|
|
|
|
|
parent_clk = clk_get_parent(priv->pix_clk);
|
|
|
|
|
ret = clk_notifier_register(parent_clk, &priv->clock_nb);
|
|
|
|
|
if (ret) {
|
|
|
|
|
dev_err(dev, "Unable to register clock notifier\n");
|
|
|
|
|
goto err_devclk_disable;
|
|
|
|
|
}
|
|
|
|
|
|
2021-10-27 02:12:36 +08:00
|
|
|
private_state = kzalloc(sizeof(*private_state), GFP_KERNEL);
|
|
|
|
|
if (!private_state) {
|
|
|
|
|
ret = -ENOMEM;
|
|
|
|
|
goto err_clk_notifier_unregister;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
drm_atomic_private_obj_init(drm, &priv->private_obj, &private_state->base,
|
|
|
|
|
&ingenic_drm_private_state_funcs);
|
|
|
|
|
|
|
|
|
|
ret = drmm_add_action_or_reset(drm, ingenic_drm_atomic_private_obj_fini,
|
|
|
|
|
&priv->private_obj);
|
|
|
|
|
if (ret)
|
|
|
|
|
goto err_private_state_free;
|
|
|
|
|
|
2019-06-03 23:23:31 +08:00
|
|
|
ret = drm_dev_register(drm, 0);
|
|
|
|
|
if (ret) {
|
2020-07-17 00:38:39 +08:00
|
|
|
dev_err(dev, "Failed to register DRM driver\n");
|
drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
|
|
|
goto err_clk_notifier_unregister;
|
2019-06-03 23:23:31 +08:00
|
|
|
}
|
|
|
|
|
|
2020-04-08 16:26:35 +08:00
|
|
|
drm_fbdev_generic_setup(drm, 32);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
2021-10-27 02:12:36 +08:00
|
|
|
err_private_state_free:
|
|
|
|
|
kfree(private_state);
|
drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
|
|
|
err_clk_notifier_unregister:
|
|
|
|
|
clk_notifier_unregister(parent_clk, &priv->clock_nb);
|
2019-06-03 23:23:31 +08:00
|
|
|
err_devclk_disable:
|
|
|
|
|
if (priv->lcd_clk)
|
|
|
|
|
clk_disable_unprepare(priv->lcd_clk);
|
|
|
|
|
err_pixclk_disable:
|
|
|
|
|
clk_disable_unprepare(priv->pix_clk);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2020-08-27 19:44:04 +08:00
|
|
|
static int ingenic_drm_bind_with_components(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
return ingenic_drm_bind(dev, true);
|
|
|
|
|
}
|
|
|
|
|
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
static int compare_of(struct device *dev, void *data)
|
2019-06-03 23:23:31 +08:00
|
|
|
{
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
return dev->of_node == data;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_unbind(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = dev_get_drvdata(dev);
|
drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
|
|
|
struct clk *parent_clk = clk_get_parent(priv->pix_clk);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
drm/ingenic: Reset pixclock rate when parent clock rate changes
Old Ingenic SoCs can overclock very well, up to +50% of their nominal
clock rate, whithout requiring overvolting or anything like that, just
by changing the rate of the main PLL. Unfortunately, all clocks on the
system are derived from that PLL, and when the PLL rate is updated, so
is our pixel clock.
To counter that issue, we make sure that the panel is in VBLANK before
the rate change happens, and we will then re-set the pixel clock rate
afterwards, once the PLL has been changed, to be as close as possible to
the pixel rate requested by the encoder.
v2: Add comment about mutex usage
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200926170501.1109197-2-paul@crapouillou.net
2020-09-27 01:04:55 +08:00
|
|
|
clk_notifier_unregister(parent_clk, &priv->clock_nb);
|
2019-06-03 23:23:31 +08:00
|
|
|
if (priv->lcd_clk)
|
|
|
|
|
clk_disable_unprepare(priv->lcd_clk);
|
|
|
|
|
clk_disable_unprepare(priv->pix_clk);
|
|
|
|
|
|
|
|
|
|
drm_dev_unregister(&priv->drm);
|
|
|
|
|
drm_atomic_helper_shutdown(&priv->drm);
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const struct component_master_ops ingenic_master_ops = {
|
2020-08-27 19:44:04 +08:00
|
|
|
.bind = ingenic_drm_bind_with_components,
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
.unbind = ingenic_drm_unbind,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int ingenic_drm_probe(struct platform_device *pdev)
|
|
|
|
|
{
|
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
|
struct component_match *match = NULL;
|
|
|
|
|
struct device_node *np;
|
|
|
|
|
|
|
|
|
|
if (!IS_ENABLED(CONFIG_DRM_INGENIC_IPU))
|
2020-08-27 19:44:04 +08:00
|
|
|
return ingenic_drm_bind(dev, false);
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
|
|
|
|
|
/* IPU is at port address 8 */
|
|
|
|
|
np = of_graph_get_remote_node(dev->of_node, 8, 0);
|
2020-08-27 19:44:04 +08:00
|
|
|
if (!np)
|
|
|
|
|
return ingenic_drm_bind(dev, false);
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
|
|
|
|
|
drm_of_component_match_add(dev, &match, compare_of, np);
|
2020-08-27 19:44:03 +08:00
|
|
|
of_node_put(np);
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
|
|
|
|
|
return component_master_add_with_match(dev, &ingenic_master_ops, match);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int ingenic_drm_remove(struct platform_device *pdev)
|
|
|
|
|
{
|
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
|
|
|
|
|
|
if (!IS_ENABLED(CONFIG_DRM_INGENIC_IPU))
|
|
|
|
|
ingenic_drm_unbind(dev);
|
|
|
|
|
else
|
|
|
|
|
component_master_del(dev, &ingenic_master_ops);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2020-11-29 01:16:06 +08:00
|
|
|
static int __maybe_unused ingenic_drm_suspend(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
|
|
return drm_mode_config_helper_suspend(&priv->drm);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int __maybe_unused ingenic_drm_resume(struct device *dev)
|
|
|
|
|
{
|
|
|
|
|
struct ingenic_drm *priv = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
|
|
return drm_mode_config_helper_resume(&priv->drm);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static SIMPLE_DEV_PM_OPS(ingenic_drm_pm_ops, ingenic_drm_suspend, ingenic_drm_resume);
|
|
|
|
|
|
2020-09-27 01:04:58 +08:00
|
|
|
static const u32 jz4740_formats[] = {
|
|
|
|
|
DRM_FORMAT_XRGB1555,
|
|
|
|
|
DRM_FORMAT_RGB565,
|
|
|
|
|
DRM_FORMAT_XRGB8888,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const u32 jz4725b_formats_f1[] = {
|
|
|
|
|
DRM_FORMAT_XRGB1555,
|
|
|
|
|
DRM_FORMAT_RGB565,
|
|
|
|
|
DRM_FORMAT_XRGB8888,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const u32 jz4725b_formats_f0[] = {
|
2020-09-28 03:36:45 +08:00
|
|
|
DRM_FORMAT_C8,
|
2020-09-27 01:04:58 +08:00
|
|
|
DRM_FORMAT_XRGB1555,
|
|
|
|
|
DRM_FORMAT_RGB565,
|
|
|
|
|
DRM_FORMAT_XRGB8888,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const u32 jz4770_formats_f1[] = {
|
|
|
|
|
DRM_FORMAT_XRGB1555,
|
|
|
|
|
DRM_FORMAT_RGB565,
|
2020-09-27 01:05:01 +08:00
|
|
|
DRM_FORMAT_RGB888,
|
2020-09-27 01:04:58 +08:00
|
|
|
DRM_FORMAT_XRGB8888,
|
2020-09-27 01:05:00 +08:00
|
|
|
DRM_FORMAT_XRGB2101010,
|
2020-09-27 01:04:58 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const u32 jz4770_formats_f0[] = {
|
2020-09-28 03:36:45 +08:00
|
|
|
DRM_FORMAT_C8,
|
2020-09-27 01:04:58 +08:00
|
|
|
DRM_FORMAT_XRGB1555,
|
|
|
|
|
DRM_FORMAT_RGB565,
|
2020-09-27 01:05:01 +08:00
|
|
|
DRM_FORMAT_RGB888,
|
2020-09-27 01:04:58 +08:00
|
|
|
DRM_FORMAT_XRGB8888,
|
2020-09-27 01:05:00 +08:00
|
|
|
DRM_FORMAT_XRGB2101010,
|
2020-09-27 01:04:58 +08:00
|
|
|
};
|
|
|
|
|
|
2019-06-03 23:23:31 +08:00
|
|
|
static const struct jz_soc_info jz4740_soc_info = {
|
|
|
|
|
.needs_dev_clk = true,
|
2020-07-17 00:38:43 +08:00
|
|
|
.has_osd = false,
|
2021-05-24 01:04:15 +08:00
|
|
|
.map_noncoherent = false,
|
2019-12-10 22:41:41 +08:00
|
|
|
.max_width = 800,
|
|
|
|
|
.max_height = 600,
|
2020-09-27 01:04:58 +08:00
|
|
|
.formats_f1 = jz4740_formats,
|
|
|
|
|
.num_formats_f1 = ARRAY_SIZE(jz4740_formats),
|
|
|
|
|
/* JZ4740 has only one plane */
|
2019-06-03 23:23:31 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct jz_soc_info jz4725b_soc_info = {
|
|
|
|
|
.needs_dev_clk = false,
|
2020-07-17 00:38:43 +08:00
|
|
|
.has_osd = true,
|
2021-05-24 01:04:15 +08:00
|
|
|
.map_noncoherent = false,
|
2019-12-10 22:41:41 +08:00
|
|
|
.max_width = 800,
|
|
|
|
|
.max_height = 600,
|
2020-09-27 01:04:58 +08:00
|
|
|
.formats_f1 = jz4725b_formats_f1,
|
|
|
|
|
.num_formats_f1 = ARRAY_SIZE(jz4725b_formats_f1),
|
|
|
|
|
.formats_f0 = jz4725b_formats_f0,
|
|
|
|
|
.num_formats_f0 = ARRAY_SIZE(jz4725b_formats_f0),
|
2019-06-03 23:23:31 +08:00
|
|
|
};
|
|
|
|
|
|
2019-12-10 22:41:42 +08:00
|
|
|
static const struct jz_soc_info jz4770_soc_info = {
|
|
|
|
|
.needs_dev_clk = false,
|
2020-07-17 00:38:43 +08:00
|
|
|
.has_osd = true,
|
2021-05-24 01:04:15 +08:00
|
|
|
.map_noncoherent = true,
|
2019-12-10 22:41:42 +08:00
|
|
|
.max_width = 1280,
|
|
|
|
|
.max_height = 720,
|
2020-09-27 01:04:58 +08:00
|
|
|
.formats_f1 = jz4770_formats_f1,
|
|
|
|
|
.num_formats_f1 = ARRAY_SIZE(jz4770_formats_f1),
|
|
|
|
|
.formats_f0 = jz4770_formats_f0,
|
|
|
|
|
.num_formats_f0 = ARRAY_SIZE(jz4770_formats_f0),
|
2019-12-10 22:41:42 +08:00
|
|
|
};
|
|
|
|
|
|
2019-06-03 23:23:31 +08:00
|
|
|
static const struct of_device_id ingenic_drm_of_match[] = {
|
|
|
|
|
{ .compatible = "ingenic,jz4740-lcd", .data = &jz4740_soc_info },
|
|
|
|
|
{ .compatible = "ingenic,jz4725b-lcd", .data = &jz4725b_soc_info },
|
2019-12-10 22:41:42 +08:00
|
|
|
{ .compatible = "ingenic,jz4770-lcd", .data = &jz4770_soc_info },
|
2019-06-03 23:23:31 +08:00
|
|
|
{ /* sentinel */ },
|
|
|
|
|
};
|
2020-05-04 14:35:12 +08:00
|
|
|
MODULE_DEVICE_TABLE(of, ingenic_drm_of_match);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
|
|
|
|
static struct platform_driver ingenic_drm_driver = {
|
|
|
|
|
.driver = {
|
|
|
|
|
.name = "ingenic-drm",
|
2020-11-29 01:16:06 +08:00
|
|
|
.pm = pm_ptr(&ingenic_drm_pm_ops),
|
2019-06-03 23:23:31 +08:00
|
|
|
.of_match_table = of_match_ptr(ingenic_drm_of_match),
|
|
|
|
|
},
|
|
|
|
|
.probe = ingenic_drm_probe,
|
|
|
|
|
.remove = ingenic_drm_remove,
|
|
|
|
|
};
|
drm/ingenic: Add support for the IPU
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
2020-07-17 00:38:44 +08:00
|
|
|
|
|
|
|
|
static int ingenic_drm_init(void)
|
|
|
|
|
{
|
|
|
|
|
int err;
|
|
|
|
|
|
|
|
|
|
if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU)) {
|
|
|
|
|
err = platform_driver_register(ingenic_ipu_driver_ptr);
|
|
|
|
|
if (err)
|
|
|
|
|
return err;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return platform_driver_register(&ingenic_drm_driver);
|
|
|
|
|
}
|
|
|
|
|
module_init(ingenic_drm_init);
|
|
|
|
|
|
|
|
|
|
static void ingenic_drm_exit(void)
|
|
|
|
|
{
|
|
|
|
|
platform_driver_unregister(&ingenic_drm_driver);
|
|
|
|
|
|
|
|
|
|
if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU))
|
|
|
|
|
platform_driver_unregister(ingenic_ipu_driver_ptr);
|
|
|
|
|
}
|
|
|
|
|
module_exit(ingenic_drm_exit);
|
2019-06-03 23:23:31 +08:00
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
|
|
|
|
|
MODULE_DESCRIPTION("DRM driver for the Ingenic SoCs\n");
|
|
|
|
|
MODULE_LICENSE("GPL v2");
|
