2007-10-16 16:27:39 +08:00
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/*
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* Intel I/OAT DMA Linux driver
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2009-02-26 18:05:43 +08:00
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* Copyright(c) 2007 - 2009 Intel Corporation.
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2007-10-16 16:27:39 +08:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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*/
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/*
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* This driver supports an Intel I/OAT DMA engine, which does asynchronous
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* copy operations.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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2007-10-16 16:27:42 +08:00
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#include <linux/dca.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2009-07-29 05:32:12 +08:00
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#include "dma.h"
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2009-08-27 04:01:44 +08:00
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#include "dma_v2.h"
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2009-07-29 05:32:12 +08:00
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#include "registers.h"
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#include "hw.h"
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2007-10-16 16:27:39 +08:00
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2007-10-18 18:07:13 +08:00
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MODULE_VERSION(IOAT_DMA_VERSION);
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2009-09-09 08:42:55 +08:00
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MODULE_LICENSE("Dual BSD/GPL");
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2007-10-16 16:27:39 +08:00
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MODULE_AUTHOR("Intel Corporation");
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2012-08-25 07:36:20 +08:00
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB0 0x0e20
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB1 0x0e21
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB2 0x0e22
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB3 0x0e23
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB4 0x0e24
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB5 0x0e25
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB6 0x0e26
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB7 0x0e27
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB8 0x0e2e
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#define PCI_DEVICE_ID_INTEL_IOAT_IVB9 0x0e2f
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2007-10-16 16:27:39 +08:00
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static struct pci_device_id ioat_pci_tbl[] = {
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2007-11-15 08:59:51 +08:00
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/* I/OAT v1 platforms */
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2009-09-09 08:43:03 +08:00
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_CNB) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SCNB) },
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{ PCI_VDEVICE(UNISYS, PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR) },
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2007-11-15 08:59:51 +08:00
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/* I/OAT v2 platforms */
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2009-09-09 08:43:03 +08:00
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB) },
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2008-07-23 08:30:57 +08:00
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/* I/OAT v3 platforms */
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2009-09-09 08:43:03 +08:00
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG0) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG1) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG2) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG3) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG4) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG5) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG6) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG7) },
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2009-09-09 08:43:01 +08:00
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/* I/OAT v3.2 platforms */
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2009-09-09 08:43:03 +08:00
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF0) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF1) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF2) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF3) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF4) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF5) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF6) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF7) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF8) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF9) },
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2009-09-09 08:43:01 +08:00
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2011-07-23 05:04:56 +08:00
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB0) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB1) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB2) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB3) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB4) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB5) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB6) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB7) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB9) },
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2012-08-25 07:36:20 +08:00
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB0) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB1) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB2) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB3) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB4) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB5) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB6) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB7) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB8) },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB9) },
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2007-10-16 16:27:39 +08:00
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{ 0, }
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};
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2009-09-09 08:43:03 +08:00
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MODULE_DEVICE_TABLE(pci, ioat_pci_tbl);
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2007-10-16 16:27:39 +08:00
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2009-07-29 05:42:38 +08:00
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static int __devinit ioat_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id);
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2007-10-16 16:27:39 +08:00
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static void __devexit ioat_remove(struct pci_dev *pdev);
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2007-10-16 16:27:42 +08:00
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static int ioat_dca_enabled = 1;
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module_param(ioat_dca_enabled, int, 0644);
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MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)");
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2009-09-09 08:53:04 +08:00
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struct kmem_cache *ioat2_cache;
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2009-09-09 08:29:44 +08:00
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#define DRV_NAME "ioatdma"
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2007-10-18 18:07:12 +08:00
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static struct pci_driver ioat_pci_driver = {
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2009-09-09 08:29:44 +08:00
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.name = DRV_NAME,
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2007-10-16 16:27:39 +08:00
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.id_table = ioat_pci_tbl,
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2009-07-29 05:42:38 +08:00
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.probe = ioat_pci_probe,
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2007-10-16 16:27:39 +08:00
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.remove = __devexit_p(ioat_remove),
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};
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2009-07-29 05:42:38 +08:00
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static struct ioatdma_device *
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alloc_ioatdma(struct pci_dev *pdev, void __iomem *iobase)
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{
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struct device *dev = &pdev->dev;
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struct ioatdma_device *d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
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if (!d)
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return NULL;
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d->pdev = pdev;
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d->reg_base = iobase;
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return d;
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}
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static int __devinit ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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2007-10-16 16:27:39 +08:00
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{
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2009-09-09 08:29:44 +08:00
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void __iomem * const *iomap;
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struct device *dev = &pdev->dev;
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2009-07-29 05:42:38 +08:00
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struct ioatdma_device *device;
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2007-10-16 16:27:39 +08:00
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int err;
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2009-09-09 08:29:44 +08:00
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err = pcim_enable_device(pdev);
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2007-10-16 16:27:39 +08:00
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if (err)
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2009-09-09 08:29:44 +08:00
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return err;
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2007-10-16 16:27:39 +08:00
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2009-09-09 08:29:44 +08:00
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err = pcim_iomap_regions(pdev, 1 << IOAT_MMIO_BAR, DRV_NAME);
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2007-10-16 16:27:39 +08:00
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if (err)
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2009-09-09 08:29:44 +08:00
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return err;
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iomap = pcim_iomap_table(pdev);
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if (!iomap)
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return -ENOMEM;
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2007-10-16 16:27:39 +08:00
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2009-04-07 10:01:13 +08:00
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
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2007-10-16 16:27:39 +08:00
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if (err)
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2009-04-07 10:01:15 +08:00
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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2007-10-16 16:27:39 +08:00
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if (err)
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2009-09-09 08:29:44 +08:00
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return err;
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2007-10-16 16:27:39 +08:00
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2009-04-07 10:01:13 +08:00
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err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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2007-10-16 16:27:39 +08:00
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if (err)
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2009-04-07 10:01:15 +08:00
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err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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2007-10-16 16:27:39 +08:00
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if (err)
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2009-09-09 08:29:44 +08:00
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return err;
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2009-07-29 05:42:38 +08:00
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device = alloc_ioatdma(pdev, iomap[IOAT_MMIO_BAR]);
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if (!device)
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return -ENOMEM;
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2010-05-03 03:52:35 +08:00
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pci_set_master(pdev);
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2009-07-29 05:42:38 +08:00
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pci_set_drvdata(pdev, device);
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device->version = readb(device->reg_base + IOAT_VER_OFFSET);
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if (device->version == IOAT_VER_1_2)
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err = ioat1_dma_probe(device, ioat_dca_enabled);
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else if (device->version == IOAT_VER_2_0)
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err = ioat2_dma_probe(device, ioat_dca_enabled);
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else if (device->version >= IOAT_VER_3_0)
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err = ioat3_dma_probe(device, ioat_dca_enabled);
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else
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2009-09-09 08:29:44 +08:00
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return -ENODEV;
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2009-01-07 02:38:20 +08:00
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2009-07-29 05:42:38 +08:00
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if (err) {
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2009-09-09 08:29:44 +08:00
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dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n");
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return -ENODEV;
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}
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2007-10-16 16:27:39 +08:00
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return 0;
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}
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static void __devexit ioat_remove(struct pci_dev *pdev)
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{
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2009-07-29 05:42:38 +08:00
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struct ioatdma_device *device = pci_get_drvdata(pdev);
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if (!device)
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return;
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2007-10-16 16:27:39 +08:00
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2009-01-07 02:38:20 +08:00
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dev_err(&pdev->dev, "Removing dma and dca services\n");
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if (device->dca) {
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2009-09-10 21:05:58 +08:00
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unregister_dca_provider(device->dca, &pdev->dev);
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2009-01-07 02:38:20 +08:00
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free_dca_provider(device->dca);
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device->dca = NULL;
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}
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2009-07-29 05:42:38 +08:00
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ioat_dma_remove(device);
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2007-10-16 16:27:39 +08:00
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}
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static int __init ioat_init_module(void)
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{
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2009-09-09 08:53:04 +08:00
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int err;
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2009-09-09 08:42:56 +08:00
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pr_info("%s: Intel(R) QuickData Technology Driver %s\n",
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DRV_NAME, IOAT_DMA_VERSION);
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2009-09-09 08:53:04 +08:00
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ioat2_cache = kmem_cache_create("ioat2", sizeof(struct ioat_ring_ent),
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0, SLAB_HWCACHE_ALIGN, NULL);
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if (!ioat2_cache)
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return -ENOMEM;
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err = pci_register_driver(&ioat_pci_driver);
|
|
|
|
if (err)
|
|
|
|
kmem_cache_destroy(ioat2_cache);
|
|
|
|
|
|
|
|
return err;
|
2007-10-16 16:27:39 +08:00
|
|
|
}
|
|
|
|
module_init(ioat_init_module);
|
|
|
|
|
|
|
|
static void __exit ioat_exit_module(void)
|
|
|
|
{
|
2007-10-18 18:07:12 +08:00
|
|
|
pci_unregister_driver(&ioat_pci_driver);
|
2009-09-09 08:53:04 +08:00
|
|
|
kmem_cache_destroy(ioat2_cache);
|
2007-10-16 16:27:39 +08:00
|
|
|
}
|
|
|
|
module_exit(ioat_exit_module);
|