License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2015-08-11 04:34:34 +08:00
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <asm/xen/hypercall.h>
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2018-09-26 04:30:09 +08:00
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#include <xen/xen.h>
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2015-08-11 04:34:34 +08:00
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#include <xen/page.h>
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#include <xen/interface/xen.h>
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#include <xen/interface/vcpu.h>
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#include <xen/interface/xenpmu.h>
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#include "xen-ops.h"
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#include "pmu.h"
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/* x86_pmu.handle_irq definition */
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2016-02-10 17:55:23 +08:00
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#include "../events/perf_event.h"
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2015-08-11 04:34:34 +08:00
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2015-08-11 04:34:37 +08:00
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#define XENPMU_IRQ_PROCESSING 1
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struct xenpmu {
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/* Shared page between hypervisor and domain */
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struct xen_pmu_data *xenpmu_data;
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2015-08-11 04:34:34 +08:00
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2015-08-11 04:34:37 +08:00
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uint8_t flags;
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};
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static DEFINE_PER_CPU(struct xenpmu, xenpmu_shared);
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#define get_xenpmu_data() (this_cpu_ptr(&xenpmu_shared)->xenpmu_data)
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#define get_xenpmu_flags() (this_cpu_ptr(&xenpmu_shared)->flags)
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2015-08-11 04:34:34 +08:00
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2015-08-11 04:34:37 +08:00
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/* Macro for computing address of a PMU MSR bank */
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#define field_offset(ctxt, field) ((void *)((uintptr_t)ctxt + \
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(uintptr_t)ctxt->field))
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2015-08-11 04:34:35 +08:00
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/* AMD PMU */
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#define F15H_NUM_COUNTERS 6
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#define F10H_NUM_COUNTERS 4
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static __read_mostly uint32_t amd_counters_base;
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static __read_mostly uint32_t amd_ctrls_base;
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static __read_mostly int amd_msr_step;
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static __read_mostly int k7_counters_mirrored;
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static __read_mostly int amd_num_counters;
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/* Intel PMU */
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#define MSR_TYPE_COUNTER 0
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#define MSR_TYPE_CTRL 1
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#define MSR_TYPE_GLOBAL 2
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#define MSR_TYPE_ARCH_COUNTER 3
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#define MSR_TYPE_ARCH_CTRL 4
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/* Number of general pmu registers (CPUID.EAX[0xa].EAX[8..15]) */
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#define PMU_GENERAL_NR_SHIFT 8
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#define PMU_GENERAL_NR_BITS 8
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#define PMU_GENERAL_NR_MASK (((1 << PMU_GENERAL_NR_BITS) - 1) \
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<< PMU_GENERAL_NR_SHIFT)
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/* Number of fixed pmu registers (CPUID.EDX[0xa].EDX[0..4]) */
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#define PMU_FIXED_NR_SHIFT 0
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#define PMU_FIXED_NR_BITS 5
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#define PMU_FIXED_NR_MASK (((1 << PMU_FIXED_NR_BITS) - 1) \
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<< PMU_FIXED_NR_SHIFT)
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/* Alias registers (0x4c1) for full-width writes to PMCs */
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#define MSR_PMC_ALIAS_MASK (~(MSR_IA32_PERFCTR0 ^ MSR_IA32_PMC0))
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2015-08-11 04:34:36 +08:00
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#define INTEL_PMC_TYPE_SHIFT 30
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2015-08-11 04:34:35 +08:00
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static __read_mostly int intel_num_arch_counters, intel_num_fixed_counters;
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static void xen_pmu_arch_init(void)
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{
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if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
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switch (boot_cpu_data.x86) {
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case 0x15:
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amd_num_counters = F15H_NUM_COUNTERS;
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amd_counters_base = MSR_F15H_PERF_CTR;
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amd_ctrls_base = MSR_F15H_PERF_CTL;
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amd_msr_step = 2;
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k7_counters_mirrored = 1;
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break;
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case 0x10:
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case 0x12:
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case 0x14:
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case 0x16:
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default:
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amd_num_counters = F10H_NUM_COUNTERS;
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amd_counters_base = MSR_K7_PERFCTR0;
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amd_ctrls_base = MSR_K7_EVNTSEL0;
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amd_msr_step = 1;
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k7_counters_mirrored = 0;
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break;
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}
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2018-09-23 17:36:46 +08:00
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} else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
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amd_num_counters = F10H_NUM_COUNTERS;
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amd_counters_base = MSR_K7_PERFCTR0;
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amd_ctrls_base = MSR_K7_EVNTSEL0;
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amd_msr_step = 1;
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k7_counters_mirrored = 0;
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2015-08-11 04:34:35 +08:00
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} else {
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uint32_t eax, ebx, ecx, edx;
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cpuid(0xa, &eax, &ebx, &ecx, &edx);
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intel_num_arch_counters = (eax & PMU_GENERAL_NR_MASK) >>
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PMU_GENERAL_NR_SHIFT;
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intel_num_fixed_counters = (edx & PMU_FIXED_NR_MASK) >>
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PMU_FIXED_NR_SHIFT;
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}
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}
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static inline uint32_t get_fam15h_addr(u32 addr)
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{
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switch (addr) {
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case MSR_K7_PERFCTR0:
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case MSR_K7_PERFCTR1:
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case MSR_K7_PERFCTR2:
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case MSR_K7_PERFCTR3:
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return MSR_F15H_PERF_CTR + (addr - MSR_K7_PERFCTR0);
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case MSR_K7_EVNTSEL0:
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case MSR_K7_EVNTSEL1:
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case MSR_K7_EVNTSEL2:
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case MSR_K7_EVNTSEL3:
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return MSR_F15H_PERF_CTL + (addr - MSR_K7_EVNTSEL0);
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default:
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break;
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}
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return addr;
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}
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static inline bool is_amd_pmu_msr(unsigned int msr)
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{
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if ((msr >= MSR_F15H_PERF_CTL &&
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msr < MSR_F15H_PERF_CTR + (amd_num_counters * 2)) ||
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(msr >= MSR_K7_EVNTSEL0 &&
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msr < MSR_K7_PERFCTR0 + amd_num_counters))
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return true;
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return false;
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}
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static int is_intel_pmu_msr(u32 msr_index, int *type, int *index)
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{
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u32 msr_index_pmc;
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switch (msr_index) {
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case MSR_CORE_PERF_FIXED_CTR_CTRL:
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case MSR_IA32_DS_AREA:
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case MSR_IA32_PEBS_ENABLE:
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*type = MSR_TYPE_CTRL;
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return true;
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case MSR_CORE_PERF_GLOBAL_CTRL:
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case MSR_CORE_PERF_GLOBAL_STATUS:
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case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
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*type = MSR_TYPE_GLOBAL;
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return true;
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default:
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if ((msr_index >= MSR_CORE_PERF_FIXED_CTR0) &&
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(msr_index < MSR_CORE_PERF_FIXED_CTR0 +
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intel_num_fixed_counters)) {
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*index = msr_index - MSR_CORE_PERF_FIXED_CTR0;
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*type = MSR_TYPE_COUNTER;
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return true;
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}
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if ((msr_index >= MSR_P6_EVNTSEL0) &&
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(msr_index < MSR_P6_EVNTSEL0 + intel_num_arch_counters)) {
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*index = msr_index - MSR_P6_EVNTSEL0;
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*type = MSR_TYPE_ARCH_CTRL;
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return true;
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}
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msr_index_pmc = msr_index & MSR_PMC_ALIAS_MASK;
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if ((msr_index_pmc >= MSR_IA32_PERFCTR0) &&
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(msr_index_pmc < MSR_IA32_PERFCTR0 +
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intel_num_arch_counters)) {
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*type = MSR_TYPE_ARCH_COUNTER;
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*index = msr_index_pmc - MSR_IA32_PERFCTR0;
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return true;
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}
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return false;
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}
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}
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2015-08-11 04:34:37 +08:00
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static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
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int index, bool is_read)
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2015-08-11 04:34:36 +08:00
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{
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2015-08-11 04:34:37 +08:00
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uint64_t *reg = NULL;
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struct xen_pmu_intel_ctxt *ctxt;
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uint64_t *fix_counters;
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struct xen_pmu_cntr_pair *arch_cntr_pair;
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struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
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uint8_t xenpmu_flags = get_xenpmu_flags();
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2015-08-11 04:34:36 +08:00
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2015-08-11 04:34:37 +08:00
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if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING))
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return false;
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ctxt = &xenpmu_data->pmu.c.intel;
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switch (msr) {
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case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
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reg = &ctxt->global_ovf_ctrl;
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break;
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case MSR_CORE_PERF_GLOBAL_STATUS:
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reg = &ctxt->global_status;
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break;
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case MSR_CORE_PERF_GLOBAL_CTRL:
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reg = &ctxt->global_ctrl;
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break;
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case MSR_CORE_PERF_FIXED_CTR_CTRL:
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reg = &ctxt->fixed_ctrl;
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break;
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default:
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switch (type) {
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case MSR_TYPE_COUNTER:
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fix_counters = field_offset(ctxt, fixed_counters);
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reg = &fix_counters[index];
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break;
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case MSR_TYPE_ARCH_COUNTER:
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arch_cntr_pair = field_offset(ctxt, arch_counters);
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reg = &arch_cntr_pair[index].counter;
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break;
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case MSR_TYPE_ARCH_CTRL:
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arch_cntr_pair = field_offset(ctxt, arch_counters);
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reg = &arch_cntr_pair[index].control;
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break;
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default:
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return false;
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}
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}
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if (reg) {
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if (is_read)
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*val = *reg;
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else {
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*reg = *val;
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if (msr == MSR_CORE_PERF_GLOBAL_OVF_CTRL)
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ctxt->global_status &= (~(*val));
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}
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return true;
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}
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return false;
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}
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static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
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{
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uint64_t *reg = NULL;
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int i, off = 0;
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struct xen_pmu_amd_ctxt *ctxt;
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uint64_t *counter_regs, *ctrl_regs;
|
|
|
|
struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
|
|
|
uint8_t xenpmu_flags = get_xenpmu_flags();
|
|
|
|
|
|
|
|
if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
if (k7_counters_mirrored &&
|
|
|
|
((msr >= MSR_K7_EVNTSEL0) && (msr <= MSR_K7_PERFCTR3)))
|
|
|
|
msr = get_fam15h_addr(msr);
|
|
|
|
|
|
|
|
ctxt = &xenpmu_data->pmu.c.amd;
|
|
|
|
for (i = 0; i < amd_num_counters; i++) {
|
|
|
|
if (msr == amd_ctrls_base + off) {
|
|
|
|
ctrl_regs = field_offset(ctxt, ctrls);
|
|
|
|
reg = &ctrl_regs[i];
|
|
|
|
break;
|
|
|
|
} else if (msr == amd_counters_base + off) {
|
|
|
|
counter_regs = field_offset(ctxt, counters);
|
|
|
|
reg = &counter_regs[i];
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
off += amd_msr_step;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (reg) {
|
|
|
|
if (is_read)
|
|
|
|
*val = *reg;
|
|
|
|
else
|
|
|
|
*reg = *val;
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
|
|
|
|
{
|
2018-09-23 17:36:46 +08:00
|
|
|
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
|
2015-08-11 04:34:36 +08:00
|
|
|
if (is_amd_pmu_msr(msr)) {
|
2015-08-11 04:34:37 +08:00
|
|
|
if (!xen_amd_pmu_emulate(msr, val, 1))
|
|
|
|
*val = native_read_msr_safe(msr, err);
|
2015-08-11 04:34:36 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
int type, index;
|
|
|
|
|
|
|
|
if (is_intel_pmu_msr(msr, &type, &index)) {
|
2015-08-11 04:34:37 +08:00
|
|
|
if (!xen_intel_pmu_emulate(msr, val, type, index, 1))
|
|
|
|
*val = native_read_msr_safe(msr, err);
|
2015-08-11 04:34:36 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
|
|
|
|
{
|
2015-08-11 04:34:37 +08:00
|
|
|
uint64_t val = ((uint64_t)high << 32) | low;
|
|
|
|
|
2018-09-23 17:36:46 +08:00
|
|
|
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
|
2015-08-11 04:34:36 +08:00
|
|
|
if (is_amd_pmu_msr(msr)) {
|
2015-08-11 04:34:37 +08:00
|
|
|
if (!xen_amd_pmu_emulate(msr, &val, 0))
|
|
|
|
*err = native_write_msr_safe(msr, low, high);
|
2015-08-11 04:34:36 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
int type, index;
|
|
|
|
|
|
|
|
if (is_intel_pmu_msr(msr, &type, &index)) {
|
2015-08-11 04:34:37 +08:00
|
|
|
if (!xen_intel_pmu_emulate(msr, &val, type, index, 0))
|
|
|
|
*err = native_write_msr_safe(msr, low, high);
|
2015-08-11 04:34:36 +08:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned long long xen_amd_read_pmc(int counter)
|
|
|
|
{
|
2015-08-11 04:34:37 +08:00
|
|
|
struct xen_pmu_amd_ctxt *ctxt;
|
|
|
|
uint64_t *counter_regs;
|
|
|
|
struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
|
|
|
uint8_t xenpmu_flags = get_xenpmu_flags();
|
|
|
|
|
|
|
|
if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING)) {
|
|
|
|
uint32_t msr;
|
|
|
|
int err;
|
2015-08-11 04:34:36 +08:00
|
|
|
|
2015-08-11 04:34:37 +08:00
|
|
|
msr = amd_counters_base + (counter * amd_msr_step);
|
|
|
|
return native_read_msr_safe(msr, &err);
|
|
|
|
}
|
|
|
|
|
|
|
|
ctxt = &xenpmu_data->pmu.c.amd;
|
|
|
|
counter_regs = field_offset(ctxt, counters);
|
|
|
|
return counter_regs[counter];
|
2015-08-11 04:34:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned long long xen_intel_read_pmc(int counter)
|
|
|
|
{
|
2015-08-11 04:34:37 +08:00
|
|
|
struct xen_pmu_intel_ctxt *ctxt;
|
|
|
|
uint64_t *fixed_counters;
|
|
|
|
struct xen_pmu_cntr_pair *arch_cntr_pair;
|
|
|
|
struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
|
|
|
uint8_t xenpmu_flags = get_xenpmu_flags();
|
2015-08-11 04:34:36 +08:00
|
|
|
|
2015-08-11 04:34:37 +08:00
|
|
|
if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING)) {
|
|
|
|
uint32_t msr;
|
|
|
|
int err;
|
2015-08-11 04:34:36 +08:00
|
|
|
|
2015-08-11 04:34:37 +08:00
|
|
|
if (counter & (1 << INTEL_PMC_TYPE_SHIFT))
|
|
|
|
msr = MSR_CORE_PERF_FIXED_CTR0 + (counter & 0xffff);
|
|
|
|
else
|
|
|
|
msr = MSR_IA32_PERFCTR0 + counter;
|
|
|
|
|
|
|
|
return native_read_msr_safe(msr, &err);
|
|
|
|
}
|
|
|
|
|
|
|
|
ctxt = &xenpmu_data->pmu.c.intel;
|
|
|
|
if (counter & (1 << INTEL_PMC_TYPE_SHIFT)) {
|
|
|
|
fixed_counters = field_offset(ctxt, fixed_counters);
|
|
|
|
return fixed_counters[counter & 0xffff];
|
|
|
|
}
|
|
|
|
|
|
|
|
arch_cntr_pair = field_offset(ctxt, arch_counters);
|
|
|
|
return arch_cntr_pair[counter].counter;
|
2015-08-11 04:34:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long long xen_read_pmc(int counter)
|
|
|
|
{
|
2018-09-23 17:36:46 +08:00
|
|
|
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
|
2015-08-11 04:34:36 +08:00
|
|
|
return xen_amd_read_pmc(counter);
|
|
|
|
else
|
|
|
|
return xen_intel_read_pmc(counter);
|
|
|
|
}
|
|
|
|
|
|
|
|
int pmu_apic_update(uint32_t val)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
|
|
|
|
|
|
|
if (!xenpmu_data) {
|
|
|
|
pr_warn_once("%s: pmudata not initialized\n", __func__);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
xenpmu_data->pmu.l.lapic_lvtpc = val;
|
2015-08-11 04:34:37 +08:00
|
|
|
|
|
|
|
if (get_xenpmu_flags() & XENPMU_IRQ_PROCESSING)
|
|
|
|
return 0;
|
|
|
|
|
2015-08-11 04:34:36 +08:00
|
|
|
ret = HYPERVISOR_xenpmu_op(XENPMU_lvtpc_set, NULL);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-08-11 04:34:34 +08:00
|
|
|
/* perf callbacks */
|
|
|
|
static int xen_is_in_guest(void)
|
|
|
|
{
|
|
|
|
const struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
|
|
|
|
|
|
|
if (!xenpmu_data) {
|
|
|
|
pr_warn_once("%s: pmudata not initialized\n", __func__);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!xen_initial_domain() || (xenpmu_data->domain_id >= DOMID_SELF))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int xen_is_user_mode(void)
|
|
|
|
{
|
|
|
|
const struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
|
|
|
|
|
|
|
if (!xenpmu_data) {
|
|
|
|
pr_warn_once("%s: pmudata not initialized\n", __func__);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (xenpmu_data->pmu.pmu_flags & PMU_SAMPLE_PV)
|
|
|
|
return (xenpmu_data->pmu.pmu_flags & PMU_SAMPLE_USER);
|
|
|
|
else
|
|
|
|
return !!(xenpmu_data->pmu.r.regs.cpl & 3);
|
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned long xen_get_guest_ip(void)
|
|
|
|
{
|
|
|
|
const struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
|
|
|
|
|
|
|
if (!xenpmu_data) {
|
|
|
|
pr_warn_once("%s: pmudata not initialized\n", __func__);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return xenpmu_data->pmu.r.regs.ip;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct perf_guest_info_callbacks xen_guest_cbs = {
|
|
|
|
.is_in_guest = xen_is_in_guest,
|
|
|
|
.is_user_mode = xen_is_user_mode,
|
|
|
|
.get_guest_ip = xen_get_guest_ip,
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Convert registers from Xen's format to Linux' */
|
|
|
|
static void xen_convert_regs(const struct xen_pmu_regs *xen_regs,
|
|
|
|
struct pt_regs *regs, uint64_t pmu_flags)
|
|
|
|
{
|
|
|
|
regs->ip = xen_regs->ip;
|
|
|
|
regs->cs = xen_regs->cs;
|
|
|
|
regs->sp = xen_regs->sp;
|
|
|
|
|
|
|
|
if (pmu_flags & PMU_SAMPLE_PV) {
|
|
|
|
if (pmu_flags & PMU_SAMPLE_USER)
|
|
|
|
regs->cs |= 3;
|
|
|
|
else
|
|
|
|
regs->cs &= ~3;
|
|
|
|
} else {
|
|
|
|
if (xen_regs->cpl)
|
|
|
|
regs->cs |= 3;
|
|
|
|
else
|
|
|
|
regs->cs &= ~3;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
irqreturn_t xen_pmu_irq_handler(int irq, void *dev_id)
|
|
|
|
{
|
2015-08-11 04:34:36 +08:00
|
|
|
int err, ret = IRQ_NONE;
|
2018-07-13 01:27:00 +08:00
|
|
|
struct pt_regs regs = {0};
|
2015-08-11 04:34:34 +08:00
|
|
|
const struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
2015-08-11 04:34:37 +08:00
|
|
|
uint8_t xenpmu_flags = get_xenpmu_flags();
|
2015-08-11 04:34:34 +08:00
|
|
|
|
|
|
|
if (!xenpmu_data) {
|
|
|
|
pr_warn_once("%s: pmudata not initialized\n", __func__);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-08-11 04:34:37 +08:00
|
|
|
this_cpu_ptr(&xenpmu_shared)->flags =
|
|
|
|
xenpmu_flags | XENPMU_IRQ_PROCESSING;
|
2015-08-11 04:34:34 +08:00
|
|
|
xen_convert_regs(&xenpmu_data->pmu.r.regs, ®s,
|
|
|
|
xenpmu_data->pmu.pmu_flags);
|
|
|
|
if (x86_pmu.handle_irq(®s))
|
|
|
|
ret = IRQ_HANDLED;
|
|
|
|
|
2015-08-11 04:34:37 +08:00
|
|
|
/* Write out cached context to HW */
|
|
|
|
err = HYPERVISOR_xenpmu_op(XENPMU_flush, NULL);
|
|
|
|
this_cpu_ptr(&xenpmu_shared)->flags = xenpmu_flags;
|
|
|
|
if (err) {
|
|
|
|
pr_warn_once("%s: failed hypercall, err: %d\n", __func__, err);
|
|
|
|
return IRQ_NONE;
|
|
|
|
}
|
|
|
|
|
2015-08-11 04:34:34 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool is_xen_pmu(int cpu)
|
|
|
|
{
|
2015-08-11 04:34:37 +08:00
|
|
|
return (get_xenpmu_data() != NULL);
|
2015-08-11 04:34:34 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void xen_pmu_init(int cpu)
|
|
|
|
{
|
|
|
|
int err;
|
|
|
|
struct xen_pmu_params xp;
|
|
|
|
unsigned long pfn;
|
|
|
|
struct xen_pmu_data *xenpmu_data;
|
|
|
|
|
|
|
|
BUILD_BUG_ON(sizeof(struct xen_pmu_data) > PAGE_SIZE);
|
|
|
|
|
|
|
|
if (xen_hvm_domain())
|
|
|
|
return;
|
|
|
|
|
|
|
|
xenpmu_data = (struct xen_pmu_data *)get_zeroed_page(GFP_KERNEL);
|
|
|
|
if (!xenpmu_data) {
|
|
|
|
pr_err("VPMU init: No memory\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
pfn = virt_to_pfn(xenpmu_data);
|
|
|
|
|
|
|
|
xp.val = pfn_to_mfn(pfn);
|
|
|
|
xp.vcpu = cpu;
|
|
|
|
xp.version.maj = XENPMU_VER_MAJ;
|
|
|
|
xp.version.min = XENPMU_VER_MIN;
|
|
|
|
err = HYPERVISOR_xenpmu_op(XENPMU_init, &xp);
|
|
|
|
if (err)
|
|
|
|
goto fail;
|
|
|
|
|
2015-08-11 04:34:37 +08:00
|
|
|
per_cpu(xenpmu_shared, cpu).xenpmu_data = xenpmu_data;
|
|
|
|
per_cpu(xenpmu_shared, cpu).flags = 0;
|
2015-08-11 04:34:34 +08:00
|
|
|
|
2015-08-11 04:34:35 +08:00
|
|
|
if (cpu == 0) {
|
2015-08-11 04:34:34 +08:00
|
|
|
perf_register_guest_info_callbacks(&xen_guest_cbs);
|
2015-08-11 04:34:35 +08:00
|
|
|
xen_pmu_arch_init();
|
|
|
|
}
|
2015-08-11 04:34:34 +08:00
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
fail:
|
2016-08-02 15:22:12 +08:00
|
|
|
if (err == -EOPNOTSUPP || err == -ENOSYS)
|
|
|
|
pr_info_once("VPMU disabled by hypervisor.\n");
|
|
|
|
else
|
|
|
|
pr_info_once("Could not initialize VPMU for cpu %d, error %d\n",
|
|
|
|
cpu, err);
|
2015-08-11 04:34:34 +08:00
|
|
|
free_pages((unsigned long)xenpmu_data, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void xen_pmu_finish(int cpu)
|
|
|
|
{
|
|
|
|
struct xen_pmu_params xp;
|
|
|
|
|
|
|
|
if (xen_hvm_domain())
|
|
|
|
return;
|
|
|
|
|
|
|
|
xp.vcpu = cpu;
|
|
|
|
xp.version.maj = XENPMU_VER_MAJ;
|
|
|
|
xp.version.min = XENPMU_VER_MIN;
|
|
|
|
|
|
|
|
(void)HYPERVISOR_xenpmu_op(XENPMU_finish, &xp);
|
|
|
|
|
2015-08-11 04:34:37 +08:00
|
|
|
free_pages((unsigned long)per_cpu(xenpmu_shared, cpu).xenpmu_data, 0);
|
|
|
|
per_cpu(xenpmu_shared, cpu).xenpmu_data = NULL;
|
2015-08-11 04:34:34 +08:00
|
|
|
}
|