linux/tools/perf/pmu-events/pmu-events.h

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License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
/* SPDX-License-Identifier: GPL-2.0 */
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
#ifndef PMU_EVENTS_H
#define PMU_EVENTS_H
enum aggr_mode_class {
PerChip = 1,
PerCore
};
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
/*
* Describe each PMU event. Each CPU has a table of PMU events.
*/
struct pmu_event {
const char *name;
perf jevents: Add support for system events tables Process the JSONs to find support for "system" events, which are not tied to a specific CPUID. A "COMPAT" property is now used to match against the namespace ID from the kernel PMU driver. The generated pmu-events.c will now have 2 tables: a. CPU events, as before. b. New pmu_sys_event_tables[] table, which will have events matched to specific SoCs. It will look like this: struct pmu_event pme_hisilicon_hip09_sys[] = { { .name = "cycles", .compat = "0x00030736", .event = "event=0", .desc = "Clock cycles", .topic = "smmu v3 pmcg", .long_desc = "Clock cycles", }, { .name = "smmuv3_pmcg.l1_tlb", .compat = "0x00030736", .event = "event=0x8a", .desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ", .topic = "smmu v3 pmcg", .long_desc = "SMMUv3 PMCG l1_tlb", .pmu = "smmuv3_pmcg", }, ... }; struct pmu_event pme_arm_cortex_a53[] = { { .name = "ext_mem_req", .event = "event=0xc0", .desc = "External memory request", .topic = "memory", }, { .name = "ext_mem_req_nc", .event = "event=0xc1", .desc = "Non-cacheable external memory request", .topic = "memory", }, ... }; struct pmu_event pme_hisilicon_hip09_cpu[] = { { .name = "l2d_cache_refill_wr", .event = "event=0x53", .desc = "L2D cache refill, write", .topic = "core imp def", .long_desc = "Attributable Level 2 data cache refill, write", }, ... }; struct pmu_events_map pmu_events_map[] = { { .cpuid = "0x00000000410fd030", .version = "v1", .type = "core", .table = pme_arm_cortex_a53 }, { .cpuid = "0x00000000480fd010", .version = "v1", .type = "core", .table = pme_hisilicon_hip09_cpu }, { .table = 0 }, }; struct pmu_event pme_hisilicon_hip09_cpu[] = { { .name = "uncore_hisi_l3c.rd_cpipe", .event = "event=0", .desc = "Total read accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total read accesses", .pmu = "hisi_sccl,l3c", }, { .name = "uncore_hisi_l3c.wr_cpipe", .event = "event=0x1", .desc = "Total write accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total write accesses", .pmu = "hisi_sccl,l3c", }, ... }; struct pmu_sys_events pmu_sys_event_tables[] = { { .table = pme_hisilicon_hip09_sys, }, ... }; Committer notes: Added the fix for architectures without PMU events, provided by John after I reported the build failing in such systems. Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/ Signed-off-by: John Garry <john.garry@huawei.com> Acked-by: Kajol Jain <kjain@linux.ibm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Joakim Zhang <qiangqing.zhang@nxp.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Kim Phillips <kim.phillips@amd.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Shaokun Zhang <zhangshaokun@hisilicon.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 19:10:08 +08:00
const char *compat;
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
const char *event;
const char *desc;
const char *topic;
const char *long_desc;
const char *pmu;
const char *unit;
const char *perpkg;
const char *aggr_mode;
const char *metric_expr;
const char *metric_name;
const char *metric_group;
const char *deprecated;
const char *metric_constraint;
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
};
/*
*
* Map a CPU to its table of PMU events. The CPU is identified by the
* cpuid field, which is an arch-specific identifier for the CPU.
* The identifier specified in tools/perf/pmu-events/arch/xxx/mapfile
* must match the get_cpuid_str() in tools/perf/arch/xxx/util/header.c)
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
*
* The cpuid can contain any character other than the comma.
*/
struct pmu_events_map {
const char *arch;
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
const char *cpuid;
perf pmu: Make pmu_event tables const. Make lookup nature of data structures clearer through their type. Reduce scope of architecture specific pmu_event tables by making them static. Suggested-by: John Garry <john.garry@huawei.com> Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Ian Rogers <irogers@google.com> Acked-by: Andi Kleen <ak@linux.intel.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Antonov <alexander.antonov@linux.intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Changbin Du <changbin.du@intel.com> Cc: Denys Zagorui <dzagorui@cisco.com> Cc: Fabian Hemmer <copy@copy.sh> Cc: Felix Fietkau <nbd@nbd.name> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jacob Keller <jacob.e.keller@intel.com> Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Joakim Zhang <qiangqing.zhang@nxp.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Kees Kook <keescook@chromium.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Nicholas Fraser <nfraser@codeweavers.com> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Paul Clarke <pc@us.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Riccardo Mancini <rickyman7@gmail.com> Cc: Sami Tolvanen <samitolvanen@google.com> Cc: ShihCheng Tu <mrtoastcheng@gmail.com> Cc: Song Liu <songliubraving@fb.com> Cc: Stephane Eranian <eranian@google.com> Cc: Sumanth Korikkar <sumanthk@linux.ibm.com> Cc: Thomas Richter <tmricht@linux.ibm.com> Cc: Wan Jiabing <wanjiabing@vivo.com> Cc: Zhen Lei <thunder.leizhen@huawei.com> Link: https://lore.kernel.org/r/20211015172132.1162559-5-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2021-10-16 01:21:15 +08:00
const struct pmu_event *table;
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
};
perf jevents: Add support for system events tables Process the JSONs to find support for "system" events, which are not tied to a specific CPUID. A "COMPAT" property is now used to match against the namespace ID from the kernel PMU driver. The generated pmu-events.c will now have 2 tables: a. CPU events, as before. b. New pmu_sys_event_tables[] table, which will have events matched to specific SoCs. It will look like this: struct pmu_event pme_hisilicon_hip09_sys[] = { { .name = "cycles", .compat = "0x00030736", .event = "event=0", .desc = "Clock cycles", .topic = "smmu v3 pmcg", .long_desc = "Clock cycles", }, { .name = "smmuv3_pmcg.l1_tlb", .compat = "0x00030736", .event = "event=0x8a", .desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ", .topic = "smmu v3 pmcg", .long_desc = "SMMUv3 PMCG l1_tlb", .pmu = "smmuv3_pmcg", }, ... }; struct pmu_event pme_arm_cortex_a53[] = { { .name = "ext_mem_req", .event = "event=0xc0", .desc = "External memory request", .topic = "memory", }, { .name = "ext_mem_req_nc", .event = "event=0xc1", .desc = "Non-cacheable external memory request", .topic = "memory", }, ... }; struct pmu_event pme_hisilicon_hip09_cpu[] = { { .name = "l2d_cache_refill_wr", .event = "event=0x53", .desc = "L2D cache refill, write", .topic = "core imp def", .long_desc = "Attributable Level 2 data cache refill, write", }, ... }; struct pmu_events_map pmu_events_map[] = { { .cpuid = "0x00000000410fd030", .version = "v1", .type = "core", .table = pme_arm_cortex_a53 }, { .cpuid = "0x00000000480fd010", .version = "v1", .type = "core", .table = pme_hisilicon_hip09_cpu }, { .table = 0 }, }; struct pmu_event pme_hisilicon_hip09_cpu[] = { { .name = "uncore_hisi_l3c.rd_cpipe", .event = "event=0", .desc = "Total read accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total read accesses", .pmu = "hisi_sccl,l3c", }, { .name = "uncore_hisi_l3c.wr_cpipe", .event = "event=0x1", .desc = "Total write accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total write accesses", .pmu = "hisi_sccl,l3c", }, ... }; struct pmu_sys_events pmu_sys_event_tables[] = { { .table = pme_hisilicon_hip09_sys, }, ... }; Committer notes: Added the fix for architectures without PMU events, provided by John after I reported the build failing in such systems. Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/ Signed-off-by: John Garry <john.garry@huawei.com> Acked-by: Kajol Jain <kjain@linux.ibm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Joakim Zhang <qiangqing.zhang@nxp.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Kim Phillips <kim.phillips@amd.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Shaokun Zhang <zhangshaokun@hisilicon.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 19:10:08 +08:00
struct pmu_sys_events {
const char *name;
perf pmu: Make pmu_event tables const. Make lookup nature of data structures clearer through their type. Reduce scope of architecture specific pmu_event tables by making them static. Suggested-by: John Garry <john.garry@huawei.com> Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Ian Rogers <irogers@google.com> Acked-by: Andi Kleen <ak@linux.intel.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Antonov <alexander.antonov@linux.intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Changbin Du <changbin.du@intel.com> Cc: Denys Zagorui <dzagorui@cisco.com> Cc: Fabian Hemmer <copy@copy.sh> Cc: Felix Fietkau <nbd@nbd.name> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jacob Keller <jacob.e.keller@intel.com> Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Joakim Zhang <qiangqing.zhang@nxp.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Kees Kook <keescook@chromium.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Nicholas Fraser <nfraser@codeweavers.com> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Paul Clarke <pc@us.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Riccardo Mancini <rickyman7@gmail.com> Cc: Sami Tolvanen <samitolvanen@google.com> Cc: ShihCheng Tu <mrtoastcheng@gmail.com> Cc: Song Liu <songliubraving@fb.com> Cc: Stephane Eranian <eranian@google.com> Cc: Sumanth Korikkar <sumanthk@linux.ibm.com> Cc: Thomas Richter <tmricht@linux.ibm.com> Cc: Wan Jiabing <wanjiabing@vivo.com> Cc: Zhen Lei <thunder.leizhen@huawei.com> Link: https://lore.kernel.org/r/20211015172132.1162559-5-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2021-10-16 01:21:15 +08:00
const struct pmu_event *table;
perf jevents: Add support for system events tables Process the JSONs to find support for "system" events, which are not tied to a specific CPUID. A "COMPAT" property is now used to match against the namespace ID from the kernel PMU driver. The generated pmu-events.c will now have 2 tables: a. CPU events, as before. b. New pmu_sys_event_tables[] table, which will have events matched to specific SoCs. It will look like this: struct pmu_event pme_hisilicon_hip09_sys[] = { { .name = "cycles", .compat = "0x00030736", .event = "event=0", .desc = "Clock cycles", .topic = "smmu v3 pmcg", .long_desc = "Clock cycles", }, { .name = "smmuv3_pmcg.l1_tlb", .compat = "0x00030736", .event = "event=0x8a", .desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ", .topic = "smmu v3 pmcg", .long_desc = "SMMUv3 PMCG l1_tlb", .pmu = "smmuv3_pmcg", }, ... }; struct pmu_event pme_arm_cortex_a53[] = { { .name = "ext_mem_req", .event = "event=0xc0", .desc = "External memory request", .topic = "memory", }, { .name = "ext_mem_req_nc", .event = "event=0xc1", .desc = "Non-cacheable external memory request", .topic = "memory", }, ... }; struct pmu_event pme_hisilicon_hip09_cpu[] = { { .name = "l2d_cache_refill_wr", .event = "event=0x53", .desc = "L2D cache refill, write", .topic = "core imp def", .long_desc = "Attributable Level 2 data cache refill, write", }, ... }; struct pmu_events_map pmu_events_map[] = { { .cpuid = "0x00000000410fd030", .version = "v1", .type = "core", .table = pme_arm_cortex_a53 }, { .cpuid = "0x00000000480fd010", .version = "v1", .type = "core", .table = pme_hisilicon_hip09_cpu }, { .table = 0 }, }; struct pmu_event pme_hisilicon_hip09_cpu[] = { { .name = "uncore_hisi_l3c.rd_cpipe", .event = "event=0", .desc = "Total read accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total read accesses", .pmu = "hisi_sccl,l3c", }, { .name = "uncore_hisi_l3c.wr_cpipe", .event = "event=0x1", .desc = "Total write accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total write accesses", .pmu = "hisi_sccl,l3c", }, ... }; struct pmu_sys_events pmu_sys_event_tables[] = { { .table = pme_hisilicon_hip09_sys, }, ... }; Committer notes: Added the fix for architectures without PMU events, provided by John after I reported the build failing in such systems. Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com/ Signed-off-by: John Garry <john.garry@huawei.com> Acked-by: Kajol Jain <kjain@linux.ibm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Joakim Zhang <qiangqing.zhang@nxp.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Kim Phillips <kim.phillips@amd.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Shaokun Zhang <zhangshaokun@hisilicon.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-12-04 19:10:08 +08:00
};
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
/*
* Global table mapping each known CPU for the architecture to its
* table of PMU events.
*/
perf pmu: Add const to pmu_events_map. The pmu_events_map is generated at compile time and used for lookup. For testing purposes we need to swap the map being used. Having the pmu_events_map be non-const is misleading as it may be an out argument. Make it const and update uses so they work on const too. Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Ian Rogers <irogers@google.com> Acked-by: Andi Kleen <ak@linux.intel.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Antonov <alexander.antonov@linux.intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Changbin Du <changbin.du@intel.com> Cc: Denys Zagorui <dzagorui@cisco.com> Cc: Fabian Hemmer <copy@copy.sh> Cc: Felix Fietkau <nbd@nbd.name> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jacob Keller <jacob.e.keller@intel.com> Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Joakim Zhang <qiangqing.zhang@nxp.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Kees Kook <keescook@chromium.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Nicholas Fraser <nfraser@codeweavers.com> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Paul Clarke <pc@us.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Riccardo Mancini <rickyman7@gmail.com> Cc: Sami Tolvanen <samitolvanen@google.com> Cc: ShihCheng Tu <mrtoastcheng@gmail.com> Cc: Song Liu <songliubraving@fb.com> Cc: Stephane Eranian <eranian@google.com> Cc: Sumanth Korikkar <sumanthk@linux.ibm.com> Cc: Thomas Richter <tmricht@linux.ibm.com> Cc: Wan Jiabing <wanjiabing@vivo.com> Cc: Zhen Lei <thunder.leizhen@huawei.com> Link: https://lore.kernel.org/r/20211015172132.1162559-3-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2021-10-16 01:21:13 +08:00
extern const struct pmu_events_map pmu_events_map[];
perf pmu: Make pmu_sys_event_tables const. Make lookup nature of data structures clearer through their type. Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Ian Rogers <irogers@google.com> Acked-by: Andi Kleen <ak@linux.intel.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Antonov <alexander.antonov@linux.intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Changbin Du <changbin.du@intel.com> Cc: Denys Zagorui <dzagorui@cisco.com> Cc: Fabian Hemmer <copy@copy.sh> Cc: Felix Fietkau <nbd@nbd.name> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jacob Keller <jacob.e.keller@intel.com> Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Joakim Zhang <qiangqing.zhang@nxp.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Kees Kook <keescook@chromium.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Nicholas Fraser <nfraser@codeweavers.com> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Paul Clarke <pc@us.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Riccardo Mancini <rickyman7@gmail.com> Cc: Sami Tolvanen <samitolvanen@google.com> Cc: ShihCheng Tu <mrtoastcheng@gmail.com> Cc: Song Liu <songliubraving@fb.com> Cc: Stephane Eranian <eranian@google.com> Cc: Sumanth Korikkar <sumanthk@linux.ibm.com> Cc: Thomas Richter <tmricht@linux.ibm.com> Cc: Wan Jiabing <wanjiabing@vivo.com> Cc: Zhen Lei <thunder.leizhen@huawei.com> Link: https://lore.kernel.org/r/20211015172132.1162559-4-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2021-10-16 01:21:14 +08:00
extern const struct pmu_sys_events pmu_sys_event_tables[];
perf jevents: Program to convert JSON file This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/1473978296-20712-3-git-send-email-sukadev@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/20160927141846.GA6589@krava Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-20 04:39:33 +08:00
#endif