2006-03-25 19:07:36 +08:00
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2006-04-11 13:54:04 +08:00
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#include <linux/irq.h>
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2009-04-28 08:59:53 +08:00
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#include <linux/interrupt.h>
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#include "internals.h"
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2006-03-25 19:07:36 +08:00
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2006-10-04 17:16:29 +08:00
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void move_masked_irq(int irq)
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2006-03-25 19:07:36 +08:00
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{
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2008-08-20 11:50:05 +08:00
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struct irq_desc *desc = irq_to_desc(irq);
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2010-09-27 20:45:41 +08:00
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struct irq_chip *chip = desc->irq_data.chip;
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2006-03-25 19:07:36 +08:00
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2011-02-05 22:20:04 +08:00
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if (likely(!irqd_is_setaffinity_pending(&desc->irq_data)))
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2006-03-25 19:07:36 +08:00
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return;
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2006-03-25 19:07:37 +08:00
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/*
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* Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
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*/
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2011-02-09 00:11:03 +08:00
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if (!irqd_can_balance(&desc->irq_data)) {
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2006-03-25 19:07:37 +08:00
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WARN_ON(1);
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return;
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}
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2011-02-05 22:20:04 +08:00
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irqd_clr_move_pending(&desc->irq_data);
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2006-03-25 19:07:36 +08:00
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2009-01-11 13:58:08 +08:00
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if (unlikely(cpumask_empty(desc->pending_mask)))
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2006-03-25 19:07:36 +08:00
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return;
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2010-09-27 20:45:41 +08:00
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if (!chip->irq_set_affinity)
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2006-03-25 19:07:36 +08:00
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return;
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2009-11-17 23:46:45 +08:00
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assert_raw_spin_locked(&desc->lock);
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2006-03-25 19:07:37 +08:00
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2006-03-25 19:07:36 +08:00
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/*
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* If there was a valid mask to work with, please
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* do the disable, re-program, enable sequence.
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* This is *not* particularly important for level triggered
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* but in a edge trigger case, we might be setting rte
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* when an active trigger is comming in. This could
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* cause some ioapics to mal-function.
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* Being paranoid i guess!
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2006-10-04 17:16:29 +08:00
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*
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* For correct operation this depends on the caller
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* masking the irqs.
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2006-03-25 19:07:36 +08:00
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*/
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2009-01-11 13:58:08 +08:00
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if (likely(cpumask_any_and(desc->pending_mask, cpu_online_mask)
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2009-04-28 08:59:53 +08:00
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< nr_cpu_ids))
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2010-09-27 20:45:41 +08:00
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if (!chip->irq_set_affinity(&desc->irq_data,
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desc->pending_mask, false)) {
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2010-10-01 18:58:38 +08:00
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cpumask_copy(desc->irq_data.affinity, desc->pending_mask);
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2009-07-21 17:09:39 +08:00
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irq_set_thread_affinity(desc);
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2009-04-28 08:59:53 +08:00
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}
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2009-01-11 13:58:08 +08:00
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cpumask_clear(desc->pending_mask);
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2006-03-25 19:07:36 +08:00
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}
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2006-10-04 17:16:29 +08:00
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void move_native_irq(int irq)
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{
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2008-08-20 11:50:05 +08:00
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struct irq_desc *desc = irq_to_desc(irq);
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2011-01-28 15:47:15 +08:00
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bool masked;
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2006-10-04 17:16:29 +08:00
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2011-02-05 22:20:04 +08:00
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if (likely(!irqd_is_setaffinity_pending(&desc->irq_data)))
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2006-10-04 17:16:29 +08:00
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return;
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2011-02-08 05:11:30 +08:00
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if (unlikely(desc->istate & IRQS_DISABLED))
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2007-02-23 19:46:20 +08:00
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return;
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2006-10-04 17:16:29 +08:00
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2011-01-28 15:47:15 +08:00
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/*
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* Be careful vs. already masked interrupts. If this is a
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* threaded interrupt with ONESHOT set, we can end up with an
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* interrupt storm.
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*/
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2011-02-08 19:36:06 +08:00
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masked = desc->istate & IRQS_MASKED;
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2011-01-28 15:47:15 +08:00
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if (!masked)
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desc->irq_data.chip->irq_mask(&desc->irq_data);
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2006-10-04 17:16:29 +08:00
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move_masked_irq(irq);
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2011-01-28 15:47:15 +08:00
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if (!masked)
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desc->irq_data.chip->irq_unmask(&desc->irq_data);
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2006-10-04 17:16:29 +08:00
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}
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