2019-02-15 03:59:13 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2009-2012 Realtek Corporation.*/
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2011-02-20 06:29:02 +08:00
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#ifndef __RTL92CU_TABLE__H_
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#define __RTL92CU_TABLE__H_
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#include <linux/types.h>
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#define RTL8192CUPHY_REG_2TARRAY_LENGTH 374
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extern u32 RTL8192CUPHY_REG_2TARRAY[RTL8192CUPHY_REG_2TARRAY_LENGTH];
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#define RTL8192CUPHY_REG_1TARRAY_LENGTH 374
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extern u32 RTL8192CUPHY_REG_1TARRAY[RTL8192CUPHY_REG_1TARRAY_LENGTH];
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#define RTL8192CUPHY_REG_ARRAY_PGLENGTH 336
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extern u32 RTL8192CUPHY_REG_ARRAY_PG[RTL8192CUPHY_REG_ARRAY_PGLENGTH];
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#define RTL8192CURADIOA_2TARRAYLENGTH 282
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extern u32 RTL8192CURADIOA_2TARRAY[RTL8192CURADIOA_2TARRAYLENGTH];
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#define RTL8192CURADIOB_2TARRAYLENGTH 78
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extern u32 RTL8192CU_RADIOB_2TARRAY[RTL8192CURADIOB_2TARRAYLENGTH];
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#define RTL8192CURADIOA_1TARRAYLENGTH 282
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extern u32 RTL8192CU_RADIOA_1TARRAY[RTL8192CURADIOA_1TARRAYLENGTH];
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#define RTL8192CURADIOB_1TARRAYLENGTH 1
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extern u32 RTL8192CU_RADIOB_1TARRAY[RTL8192CURADIOB_1TARRAYLENGTH];
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#define RTL8192CUMAC_2T_ARRAYLENGTH 172
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extern u32 RTL8192CUMAC_2T_ARRAY[RTL8192CUMAC_2T_ARRAYLENGTH];
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#define RTL8192CUAGCTAB_2TARRAYLENGTH 320
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extern u32 RTL8192CUAGCTAB_2TARRAY[RTL8192CUAGCTAB_2TARRAYLENGTH];
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#define RTL8192CUAGCTAB_1TARRAYLENGTH 320
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extern u32 RTL8192CUAGCTAB_1TARRAY[RTL8192CUAGCTAB_1TARRAYLENGTH];
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2019-02-15 06:36:40 +08:00
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#define RTL8192CUPHY_REG_1T_HPARRAYLENGTH 378
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extern u32 RTL8192CUPHY_REG_1T_HPARRAY[RTL8192CUPHY_REG_1T_HPARRAYLENGTH];
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2011-02-20 06:29:02 +08:00
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2019-02-15 06:36:40 +08:00
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#define RTL8192CUPHY_REG_ARRAY_PG_HPLENGTH 336
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extern u32 RTL8192CUPHY_REG_ARRAY_PG_HP[RTL8192CUPHY_REG_ARRAY_PG_HPLENGTH];
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2011-02-20 06:29:02 +08:00
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2019-02-15 06:36:40 +08:00
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#define RTL8192CURADIOA_1T_HPARRAYLENGTH 282
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extern u32 RTL8192CURADIOA_1T_HPARRAY[RTL8192CURADIOA_1T_HPARRAYLENGTH];
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#define RTL8192CUAGCTAB_1T_HPARRAYLENGTH 320
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extern u32 RTL8192CUAGCTAB_1T_HPARRAY[RTL8192CUAGCTAB_1T_HPARRAYLENGTH];
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2011-02-20 06:29:02 +08:00
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#endif
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