2012-07-11 23:21:54 +08:00
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/*
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* Copyright (C) 2012 by Alan Stern
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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/* This file is part of ehci-hcd.c */
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/*-------------------------------------------------------------------------*/
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2012-07-11 23:22:05 +08:00
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/* Set a bit in the USBCMD register */
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static void ehci_set_command_bit(struct ehci_hcd *ehci, u32 bit)
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{
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ehci->command |= bit;
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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/* unblock posted write */
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ehci_readl(ehci, &ehci->regs->command);
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}
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/* Clear a bit in the USBCMD register */
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static void ehci_clear_command_bit(struct ehci_hcd *ehci, u32 bit)
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{
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ehci->command &= ~bit;
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ehci_writel(ehci, ehci->command, &ehci->regs->command);
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/* unblock posted write */
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ehci_readl(ehci, &ehci->regs->command);
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}
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/*-------------------------------------------------------------------------*/
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2012-07-11 23:21:54 +08:00
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/*
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* EHCI timer support... Now using hrtimers.
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*
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* Lots of different events are triggered from ehci->hrtimer. Whenever
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* the timer routine runs, it checks each possible event; events that are
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* currently enabled and whose expiration time has passed get handled.
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* The set of enabled events is stored as a collection of bitflags in
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* ehci->enabled_hrtimer_events, and they are numbered in order of
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* increasing delay values (ranging between 1 ms and 100 ms).
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*
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* Rather than implementing a sorted list or tree of all pending events,
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* we keep track only of the lowest-numbered pending event, in
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* ehci->next_hrtimer_event. Whenever ehci->hrtimer gets restarted, its
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* expiration time is set to the timeout value for this event.
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*
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* As a result, events might not get handled right away; the actual delay
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* could be anywhere up to twice the requested delay. This doesn't
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* matter, because none of the events are especially time-critical. The
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* ones that matter most all have a delay of 1 ms, so they will be
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* handled after 2 ms at most, which is okay. In addition to this, we
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* allow for an expiration range of 1 ms.
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*/
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/*
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* Delay lengths for the hrtimer event types.
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* Keep this list sorted by delay length, in the same order as
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* the event types indexed by enum ehci_hrtimer_event in ehci.h.
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*/
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static unsigned event_delays_ns[] = {
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2012-07-11 23:22:21 +08:00
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1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_ASS */
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2012-07-11 23:22:05 +08:00
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1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_PSS */
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2012-07-11 23:22:31 +08:00
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1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */
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2012-07-11 23:22:26 +08:00
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1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */
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2012-07-11 23:22:35 +08:00
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2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */
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2012-07-11 23:22:53 +08:00
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6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */
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2012-07-11 23:22:44 +08:00
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10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */
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2012-07-11 23:22:05 +08:00
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10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_PERIODIC */
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2012-07-11 23:22:21 +08:00
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15 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_ASYNC */
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2012-07-11 23:23:04 +08:00
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100 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IO_WATCHDOG */
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2012-07-11 23:21:54 +08:00
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};
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/* Enable a pending hrtimer event */
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static void ehci_enable_event(struct ehci_hcd *ehci, unsigned event,
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bool resched)
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{
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ktime_t *timeout = &ehci->hr_timeouts[event];
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if (resched)
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*timeout = ktime_add(ktime_get(),
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ktime_set(0, event_delays_ns[event]));
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ehci->enabled_hrtimer_events |= (1 << event);
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/* Track only the lowest-numbered pending event */
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if (event < ehci->next_hrtimer_event) {
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ehci->next_hrtimer_event = event;
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hrtimer_start_range_ns(&ehci->hrtimer, *timeout,
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NSEC_PER_MSEC, HRTIMER_MODE_ABS);
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}
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}
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2012-07-11 23:22:21 +08:00
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/* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
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static void ehci_poll_ASS(struct ehci_hcd *ehci)
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{
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unsigned actual, want;
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/* Don't enable anything if the controller isn't running (e.g., died) */
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if (ehci->rh_state != EHCI_RH_RUNNING)
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return;
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want = (ehci->command & CMD_ASE) ? STS_ASS : 0;
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actual = ehci_readl(ehci, &ehci->regs->status) & STS_ASS;
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if (want != actual) {
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2013-03-19 00:04:54 +08:00
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/* Poll again later, but give up after about 2-4 ms */
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if (ehci->ASS_poll_count++ < 2) {
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2013-02-27 02:43:41 +08:00
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ehci_enable_event(ehci, EHCI_HRTIMER_POLL_ASS, true);
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return;
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}
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ehci_dbg(ehci, "Waited too long for the async schedule status (%x/%x), giving up\n",
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want, actual);
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2012-07-11 23:22:21 +08:00
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}
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ehci->ASS_poll_count = 0;
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/* The status is up-to-date; restart or stop the schedule as needed */
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if (want == 0) { /* Stopped */
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if (ehci->async_count > 0)
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ehci_set_command_bit(ehci, CMD_ASE);
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} else { /* Running */
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if (ehci->async_count == 0) {
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/* Turn off the schedule after a while */
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ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_ASYNC,
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true);
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}
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}
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}
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/* Turn off the async schedule after a brief delay */
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static void ehci_disable_ASE(struct ehci_hcd *ehci)
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{
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ehci_clear_command_bit(ehci, CMD_ASE);
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}
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2012-07-11 23:22:05 +08:00
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/* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
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static void ehci_poll_PSS(struct ehci_hcd *ehci)
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{
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unsigned actual, want;
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/* Don't do anything if the controller isn't running (e.g., died) */
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if (ehci->rh_state != EHCI_RH_RUNNING)
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return;
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want = (ehci->command & CMD_PSE) ? STS_PSS : 0;
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actual = ehci_readl(ehci, &ehci->regs->status) & STS_PSS;
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if (want != actual) {
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2013-03-19 00:04:54 +08:00
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/* Poll again later, but give up after about 2-4 ms */
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if (ehci->PSS_poll_count++ < 2) {
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2013-02-27 02:43:41 +08:00
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ehci_enable_event(ehci, EHCI_HRTIMER_POLL_PSS, true);
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return;
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}
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ehci_dbg(ehci, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
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want, actual);
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2012-07-11 23:22:05 +08:00
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}
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ehci->PSS_poll_count = 0;
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/* The status is up-to-date; restart or stop the schedule as needed */
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if (want == 0) { /* Stopped */
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2012-07-11 23:23:00 +08:00
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if (ehci->periodic_count > 0)
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2012-07-11 23:22:05 +08:00
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ehci_set_command_bit(ehci, CMD_PSE);
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} else { /* Running */
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if (ehci->periodic_count == 0) {
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/* Turn off the schedule after a while */
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ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_PERIODIC,
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true);
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}
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}
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}
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/* Turn off the periodic schedule after a brief delay */
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static void ehci_disable_PSE(struct ehci_hcd *ehci)
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{
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ehci_clear_command_bit(ehci, CMD_PSE);
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}
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2012-07-11 23:22:31 +08:00
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/* Poll the STS_HALT status bit; see when a dead controller stops */
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static void ehci_handle_controller_death(struct ehci_hcd *ehci)
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{
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if (!(ehci_readl(ehci, &ehci->regs->status) & STS_HALT)) {
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/* Give up after a few milliseconds */
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if (ehci->died_poll_count++ < 5) {
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/* Try again later */
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ehci_enable_event(ehci, EHCI_HRTIMER_POLL_DEAD, true);
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return;
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}
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ehci_warn(ehci, "Waited too long for the controller to stop, giving up\n");
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}
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/* Clean up the mess */
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ehci->rh_state = EHCI_RH_HALTED;
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ehci_writel(ehci, 0, &ehci->regs->configured_flag);
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ehci_writel(ehci, 0, &ehci->regs->intr_enable);
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ehci_work(ehci);
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2012-07-11 23:22:49 +08:00
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end_unlink_async(ehci);
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2012-07-11 23:22:31 +08:00
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/* Not in process context, so don't try to reset the controller */
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}
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2012-07-11 23:22:26 +08:00
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/* Handle unlinked interrupt QHs once they are gone from the hardware */
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static void ehci_handle_intr_unlinks(struct ehci_hcd *ehci)
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{
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bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
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/*
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* Process all the QHs on the intr_unlink list that were added
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* before the current unlink cycle began. The list is in
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* temporal order, so stop when we reach the first entry in the
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* current cycle. But if the root hub isn't running then
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* process all the QHs on the list.
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*/
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ehci->intr_unlinking = true;
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2013-03-23 01:31:45 +08:00
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while (!list_empty(&ehci->intr_unlink)) {
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struct ehci_qh *qh;
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2012-07-11 23:22:26 +08:00
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2013-03-23 01:31:45 +08:00
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qh = list_first_entry(&ehci->intr_unlink, struct ehci_qh,
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unlink_node);
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2012-07-11 23:22:26 +08:00
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if (!stopped && qh->unlink_cycle == ehci->intr_unlink_cycle)
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break;
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2013-03-23 01:31:45 +08:00
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list_del(&qh->unlink_node);
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2012-07-11 23:22:26 +08:00
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end_unlink_intr(ehci, qh);
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}
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/* Handle remaining entries later */
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2013-03-23 01:31:45 +08:00
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if (!list_empty(&ehci->intr_unlink)) {
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2012-07-11 23:22:26 +08:00
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ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
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++ehci->intr_unlink_cycle;
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}
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ehci->intr_unlinking = false;
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}
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2012-07-11 23:22:35 +08:00
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/* Start another free-iTDs/siTDs cycle */
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static void start_free_itds(struct ehci_hcd *ehci)
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{
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if (!(ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_FREE_ITDS))) {
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ehci->last_itd_to_free = list_entry(
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ehci->cached_itd_list.prev,
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struct ehci_itd, itd_list);
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ehci->last_sitd_to_free = list_entry(
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ehci->cached_sitd_list.prev,
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struct ehci_sitd, sitd_list);
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ehci_enable_event(ehci, EHCI_HRTIMER_FREE_ITDS, true);
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}
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}
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/* Wait for controller to stop using old iTDs and siTDs */
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static void end_free_itds(struct ehci_hcd *ehci)
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{
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struct ehci_itd *itd, *n;
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struct ehci_sitd *sitd, *sn;
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if (ehci->rh_state < EHCI_RH_RUNNING) {
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ehci->last_itd_to_free = NULL;
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ehci->last_sitd_to_free = NULL;
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}
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list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
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list_del(&itd->itd_list);
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dma_pool_free(ehci->itd_pool, itd, itd->itd_dma);
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if (itd == ehci->last_itd_to_free)
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break;
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}
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list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
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list_del(&sitd->sitd_list);
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dma_pool_free(ehci->sitd_pool, sitd, sitd->sitd_dma);
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if (sitd == ehci->last_sitd_to_free)
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break;
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}
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if (!list_empty(&ehci->cached_itd_list) ||
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!list_empty(&ehci->cached_sitd_list))
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start_free_itds(ehci);
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}
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2012-07-11 23:22:44 +08:00
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/* Handle lost (or very late) IAA interrupts */
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static void ehci_iaa_watchdog(struct ehci_hcd *ehci)
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{
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2013-03-19 00:05:19 +08:00
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u32 cmd, status;
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2012-07-11 23:22:44 +08:00
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2013-03-22 00:48:42 +08:00
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/*
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* Lost IAA irqs wedge things badly; seen first with a vt8235.
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* So we need this watchdog, but must protect it against both
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* (a) SMP races against real IAA firing and retriggering, and
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* (b) clean HC shutdown, when IAA watchdog was pending.
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*/
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if (ehci->rh_state != EHCI_RH_RUNNING)
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return;
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2013-03-19 00:05:19 +08:00
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/* If we get here, IAA is *REALLY* late. It's barely
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* conceivable that the system is so busy that CMD_IAAD
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* is still legitimately set, so let's be sure it's
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* clear before we read STS_IAA. (The HC should clear
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* CMD_IAAD when it sets STS_IAA.)
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*/
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cmd = ehci_readl(ehci, &ehci->regs->command);
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2012-07-11 23:22:44 +08:00
|
|
|
|
2013-03-19 00:05:19 +08:00
|
|
|
/*
|
|
|
|
* If IAA is set here it either legitimately triggered
|
|
|
|
* after the watchdog timer expired (_way_ late, so we'll
|
|
|
|
* still count it as lost) ... or a silicon erratum:
|
|
|
|
* - VIA seems to set IAA without triggering the IRQ;
|
|
|
|
* - IAAD potentially cleared without setting IAA.
|
|
|
|
*/
|
|
|
|
status = ehci_readl(ehci, &ehci->regs->status);
|
|
|
|
if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
|
|
|
|
COUNT(ehci->stats.lost_iaa);
|
|
|
|
ehci_writel(ehci, STS_IAA, &ehci->regs->status);
|
2012-07-11 23:22:44 +08:00
|
|
|
}
|
2013-03-19 00:05:19 +08:00
|
|
|
|
|
|
|
ehci_dbg(ehci, "IAA watchdog: status %x cmd %x\n", status, cmd);
|
|
|
|
end_unlink_async(ehci);
|
2012-07-11 23:22:44 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2012-07-11 23:23:04 +08:00
|
|
|
/* Enable the I/O watchdog, if appropriate */
|
|
|
|
static void turn_on_io_watchdog(struct ehci_hcd *ehci)
|
|
|
|
{
|
|
|
|
/* Not needed if the controller isn't running or it's already enabled */
|
|
|
|
if (ehci->rh_state != EHCI_RH_RUNNING ||
|
|
|
|
(ehci->enabled_hrtimer_events &
|
|
|
|
BIT(EHCI_HRTIMER_IO_WATCHDOG)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Isochronous transfers always need the watchdog.
|
|
|
|
* For other sorts we use it only if the flag is set.
|
|
|
|
*/
|
|
|
|
if (ehci->isoc_count > 0 || (ehci->need_io_watchdog &&
|
|
|
|
ehci->async_count + ehci->intr_count > 0))
|
|
|
|
ehci_enable_event(ehci, EHCI_HRTIMER_IO_WATCHDOG, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2012-07-11 23:21:54 +08:00
|
|
|
/*
|
|
|
|
* Handler functions for the hrtimer event types.
|
|
|
|
* Keep this array in the same order as the event types indexed by
|
|
|
|
* enum ehci_hrtimer_event in ehci.h.
|
|
|
|
*/
|
|
|
|
static void (*event_handlers[])(struct ehci_hcd *) = {
|
2012-07-11 23:22:21 +08:00
|
|
|
ehci_poll_ASS, /* EHCI_HRTIMER_POLL_ASS */
|
2012-07-11 23:22:05 +08:00
|
|
|
ehci_poll_PSS, /* EHCI_HRTIMER_POLL_PSS */
|
2012-07-11 23:22:31 +08:00
|
|
|
ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */
|
2012-07-11 23:22:26 +08:00
|
|
|
ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */
|
2012-07-11 23:22:35 +08:00
|
|
|
end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */
|
2012-07-11 23:22:53 +08:00
|
|
|
unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */
|
2012-07-11 23:22:44 +08:00
|
|
|
ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */
|
2012-07-11 23:22:05 +08:00
|
|
|
ehci_disable_PSE, /* EHCI_HRTIMER_DISABLE_PERIODIC */
|
2012-07-11 23:22:21 +08:00
|
|
|
ehci_disable_ASE, /* EHCI_HRTIMER_DISABLE_ASYNC */
|
2012-07-11 23:23:04 +08:00
|
|
|
ehci_work, /* EHCI_HRTIMER_IO_WATCHDOG */
|
2012-07-11 23:21:54 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
static enum hrtimer_restart ehci_hrtimer_func(struct hrtimer *t)
|
|
|
|
{
|
|
|
|
struct ehci_hcd *ehci = container_of(t, struct ehci_hcd, hrtimer);
|
|
|
|
ktime_t now;
|
|
|
|
unsigned long events;
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned e;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&ehci->lock, flags);
|
|
|
|
|
|
|
|
events = ehci->enabled_hrtimer_events;
|
|
|
|
ehci->enabled_hrtimer_events = 0;
|
|
|
|
ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check each pending event. If its time has expired, handle
|
|
|
|
* the event; otherwise re-enable it.
|
|
|
|
*/
|
|
|
|
now = ktime_get();
|
|
|
|
for_each_set_bit(e, &events, EHCI_HRTIMER_NUM_EVENTS) {
|
|
|
|
if (now.tv64 >= ehci->hr_timeouts[e].tv64)
|
|
|
|
event_handlers[e](ehci);
|
|
|
|
else
|
|
|
|
ehci_enable_event(ehci, e, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&ehci->lock, flags);
|
|
|
|
return HRTIMER_NORESTART;
|
|
|
|
}
|