2019-10-28 23:15:33 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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* Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
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*
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* Samsung Exynos SoC Adaptive Supply Voltage support
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*/
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#ifndef __LINUX_SOC_EXYNOS_ASV_H
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#define __LINUX_SOC_EXYNOS_ASV_H
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struct regmap;
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/* HPM, IDS values to select target group */
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struct asv_limit_entry {
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unsigned int hpm;
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unsigned int ids;
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};
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struct exynos_asv_table {
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unsigned int num_rows;
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unsigned int num_cols;
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u32 *buf;
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};
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struct exynos_asv_subsys {
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struct exynos_asv *asv;
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const char *cpu_dt_compat;
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int id;
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struct exynos_asv_table table;
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unsigned int base_volt;
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unsigned int offset_volt_h;
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unsigned int offset_volt_l;
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};
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struct exynos_asv {
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struct device *dev;
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struct regmap *chipid_regmap;
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struct exynos_asv_subsys subsys[2];
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int (*opp_get_voltage)(const struct exynos_asv_subsys *subs,
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int level, unsigned int voltage);
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unsigned int group;
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unsigned int table;
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/* True if SG fields from PKG_ID register should be used */
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bool use_sg;
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/* ASV bin read from DT */
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int of_bin;
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};
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static inline u32 __asv_get_table_entry(const struct exynos_asv_table *table,
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unsigned int row, unsigned int col)
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{
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return table->buf[row * (table->num_cols) + col];
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}
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static inline u32 exynos_asv_opp_get_voltage(const struct exynos_asv_subsys *subsys,
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unsigned int level, unsigned int group)
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{
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return __asv_get_table_entry(&subsys->table, level, group + 1);
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}
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static inline u32 exynos_asv_opp_get_frequency(const struct exynos_asv_subsys *subsys,
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unsigned int level)
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{
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return __asv_get_table_entry(&subsys->table, level, 0);
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}
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2020-12-08 02:54:57 +08:00
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int exynos_asv_init(struct device *dev, struct regmap *regmap);
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2019-10-28 23:15:33 +08:00
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#endif /* __LINUX_SOC_EXYNOS_ASV_H */
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