2019-01-08 03:53:52 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* simple driver for PWM (Pulse Width Modulator) controller
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*
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* Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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#define MX1_PWMC 0x00 /* PWM Control Register */
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#define MX1_PWMS 0x04 /* PWM Sample Register */
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#define MX1_PWMP 0x08 /* PWM Period Register */
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#define MX1_PWMC_EN BIT(4)
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struct pwm_imx1_chip {
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struct clk *clk_ipg;
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struct clk *clk_per;
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void __iomem *mmio_base;
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struct pwm_chip chip;
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};
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#define to_pwm_imx1_chip(chip) container_of(chip, struct pwm_imx1_chip, chip)
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static int pwm_imx1_clk_prepare_enable(struct pwm_chip *chip)
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{
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struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
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int ret;
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ret = clk_prepare_enable(imx->clk_ipg);
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if (ret)
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return ret;
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ret = clk_prepare_enable(imx->clk_per);
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if (ret) {
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clk_disable_unprepare(imx->clk_ipg);
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return ret;
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}
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return 0;
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}
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static void pwm_imx1_clk_disable_unprepare(struct pwm_chip *chip)
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{
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struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
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clk_disable_unprepare(imx->clk_per);
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clk_disable_unprepare(imx->clk_ipg);
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}
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static int pwm_imx1_config(struct pwm_chip *chip,
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2021-11-18 18:46:44 +08:00
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struct pwm_device *pwm, u64 duty_ns, u64 period_ns)
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2019-01-08 03:53:52 +08:00
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{
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struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
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u32 max, p;
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/*
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* The PWM subsystem allows for exact frequencies. However,
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* I cannot connect a scope on my device to the PWM line and
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* thus cannot provide the program the PWM controller
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* exactly. Instead, I'm relying on the fact that the
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* Bootloader (u-boot or WinCE+haret) has programmed the PWM
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* function group already. So I'll just modify the PWM sample
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* register to follow the ratio of duty_ns vs. period_ns
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* accordingly.
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*
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* This is good enough for programming the brightness of
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* the LCD backlight.
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*
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* The real implementation would divide PERCLK[0] first by
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* both the prescaler (/1 .. /128) and then by CLKSEL
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* (/2 .. /16).
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*/
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max = readl(imx->mmio_base + MX1_PWMP);
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2021-11-18 18:46:44 +08:00
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p = mul_u64_u64_div_u64(max, duty_ns, period_ns);
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2019-01-08 03:53:52 +08:00
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writel(max - p, imx->mmio_base + MX1_PWMS);
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return 0;
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}
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static int pwm_imx1_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
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u32 value;
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int ret;
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ret = pwm_imx1_clk_prepare_enable(chip);
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if (ret < 0)
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return ret;
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value = readl(imx->mmio_base + MX1_PWMC);
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value |= MX1_PWMC_EN;
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writel(value, imx->mmio_base + MX1_PWMC);
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return 0;
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}
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static void pwm_imx1_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
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u32 value;
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value = readl(imx->mmio_base + MX1_PWMC);
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value &= ~MX1_PWMC_EN;
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writel(value, imx->mmio_base + MX1_PWMC);
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pwm_imx1_clk_disable_unprepare(chip);
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}
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2021-11-18 18:46:44 +08:00
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static int pwm_imx1_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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const struct pwm_state *state)
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{
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int err;
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if (state->polarity != PWM_POLARITY_NORMAL)
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return -EINVAL;
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if (!state->enabled) {
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if (pwm->state.enabled)
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pwm_imx1_disable(chip, pwm);
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return 0;
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}
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err = pwm_imx1_config(chip, pwm, state->duty_cycle, state->period);
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if (err)
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return err;
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if (!pwm->state.enabled)
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return pwm_imx1_enable(chip, pwm);
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return 0;
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}
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2019-01-08 03:53:52 +08:00
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static const struct pwm_ops pwm_imx1_ops = {
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2021-11-18 18:46:44 +08:00
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.apply = pwm_imx1_apply,
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2019-01-08 03:53:52 +08:00
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.owner = THIS_MODULE,
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};
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static const struct of_device_id pwm_imx1_dt_ids[] = {
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{ .compatible = "fsl,imx1-pwm", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, pwm_imx1_dt_ids);
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static int pwm_imx1_probe(struct platform_device *pdev)
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{
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struct pwm_imx1_chip *imx;
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imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
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if (!imx)
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return -ENOMEM;
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imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
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2020-08-11 14:24:32 +08:00
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if (IS_ERR(imx->clk_ipg))
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return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_ipg),
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"getting ipg clock failed\n");
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2019-01-08 03:53:52 +08:00
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imx->clk_per = devm_clk_get(&pdev->dev, "per");
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2020-08-11 14:24:32 +08:00
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if (IS_ERR(imx->clk_per))
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return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_per),
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"failed to get peripheral clock\n");
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2019-01-08 03:53:52 +08:00
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imx->chip.ops = &pwm_imx1_ops;
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imx->chip.dev = &pdev->dev;
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imx->chip.npwm = 1;
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2019-12-29 16:05:58 +08:00
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imx->mmio_base = devm_platform_ioremap_resource(pdev, 0);
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2019-01-08 03:53:52 +08:00
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if (IS_ERR(imx->mmio_base))
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return PTR_ERR(imx->mmio_base);
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2021-05-25 14:35:28 +08:00
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return devm_pwmchip_add(&pdev->dev, &imx->chip);
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2019-01-08 03:53:52 +08:00
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}
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static struct platform_driver pwm_imx1_driver = {
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.driver = {
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.name = "pwm-imx1",
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.of_match_table = pwm_imx1_dt_ids,
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},
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.probe = pwm_imx1_probe,
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};
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module_platform_driver(pwm_imx1_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
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