2015-05-29 00:49:50 +08:00
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/*
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* Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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2018-06-06 23:54:06 +08:00
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#include <dt-bindings/pwm/pwm.h>
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2018-06-06 23:54:10 +08:00
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#include <dt-bindings/interrupt-controller/irq.h>
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2015-05-29 00:49:50 +08:00
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/ {
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model = "Toby Churchill SL50 Series";
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compatible = "tcl,am335x-sl50", "ti,am33xx";
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cpus {
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cpu@0 {
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cpu0-supply = <&dcdc2_reg>;
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};
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};
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2016-08-31 18:35:30 +08:00
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memory@80000000 {
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2016-08-31 18:35:15 +08:00
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device_type = "memory";
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reg = <0x80000000 0x20000000>; /* 512 MB */
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};
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2016-01-16 18:51:12 +08:00
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chosen {
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stdout-path = &uart0;
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};
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2015-05-29 00:49:50 +08:00
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins>;
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2016-08-02 00:47:03 +08:00
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led0 {
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2018-06-06 23:54:12 +08:00
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label = "sl50:red:usr0";
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2015-05-29 00:49:50 +08:00
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gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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2016-08-02 00:47:03 +08:00
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led1 {
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2018-06-06 23:54:12 +08:00
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label = "sl50:green:usr1";
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2015-05-29 00:49:50 +08:00
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gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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2016-08-02 00:47:03 +08:00
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led2 {
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2018-06-06 23:54:12 +08:00
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label = "sl50:red:usr2";
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2015-05-29 00:49:50 +08:00
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gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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2016-08-02 00:47:03 +08:00
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led3 {
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2018-06-06 23:54:12 +08:00
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label = "sl50:green:usr3";
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2015-05-29 00:49:50 +08:00
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gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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backlight0: disp0 {
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compatible = "pwm-backlight";
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2018-06-06 23:54:06 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <&backlight0_pins>;
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pwms = <&ehrpwm1 0 500000 PWM_POLARITY_INVERTED>;
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brightness-levels = < 0 1 2 3 4 5 6 7 8 9
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10 11 12 13 14 15 16 17 18 19
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20 21 22 23 24 25 26 27 28 29
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30 31 32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47 48 49
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50 51 52 53 54 55 56 57 58 59
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60 61 62 63 64 65 66 67 68 69
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70 71 72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87 88 89
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90 91 92 93 94 95 96 97 98 99
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100>;
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default-brightness-level = <50>;
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enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
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power-supply = <&vdd_sys_reg>;
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2015-05-29 00:49:50 +08:00
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};
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backlight1: disp1 {
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compatible = "pwm-backlight";
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2018-06-06 23:54:06 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <&backlight1_pins>;
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pwms = <&ehrpwm1 1 500000 PWM_POLARITY_INVERTED>;
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brightness-levels = < 0 1 2 3 4 5 6 7 8 9
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10 11 12 13 14 15 16 17 18 19
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20 21 22 23 24 25 26 27 28 29
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30 31 32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47 48 49
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50 51 52 53 54 55 56 57 58 59
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60 61 62 63 64 65 66 67 68 69
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70 71 72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87 88 89
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90 91 92 93 94 95 96 97 98 99
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100>;
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default-brightness-level = <50>;
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enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
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power-supply = <&vdd_sys_reg>;
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2015-05-29 00:49:50 +08:00
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};
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2016-01-16 18:51:13 +08:00
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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/* audio external oscillator */
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2018-06-06 23:54:11 +08:00
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audio_mclk_fixed: oscillator@0 {
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2016-01-16 18:51:13 +08:00
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>; /* 24.576MHz */
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};
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2018-06-06 23:54:11 +08:00
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audio_mclk: audio_mclk_gate@0 {
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compatible = "gpio-gate-clock";
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#clock-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&audio_mclk_pins>;
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clocks = <&audio_mclk_fixed>;
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enable-gpios = <&gpio1 27 0>;
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};
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2016-01-16 18:51:13 +08:00
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};
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2018-06-06 23:54:08 +08:00
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panel: lcd_panel {
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compatible = "ti,tilcdc,panel";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_pins>;
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panel-info {
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ac-bias = <255>;
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ac-bias-intrpt = <0>;
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dma-burst-sz = <16>;
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bpp = <16>;
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fdd = <0x80>;
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tft-alt-mode = <0>;
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mono-8bit-mode = <0>;
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sync-edge = <0>;
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sync-ctrl = <1>;
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raster-order = <0>;
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fifo-th = <0>;
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};
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display-timings {
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native-mode = <&timing0>;
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timing0: 960x128 {
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clock-frequency = <18000000>;
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hactive = <960>;
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vactive = <272>;
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hback-porch = <40>;
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hfront-porch = <16>;
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hsync-len = <24>;
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hsync-active = <0>;
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vback-porch = <3>;
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vfront-porch = <8>;
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vsync-len = <4>;
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vsync-active = <0>;
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};
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};
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};
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2015-05-29 00:49:50 +08:00
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sound {
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2018-06-06 23:54:11 +08:00
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compatible = "audio-graph-card";
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label = "sound-card";
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pinctrl-names = "default";
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pinctrl-0 = <&audio_pa_pins>;
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widgets = "Headphone", "Headphone Jack",
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"Speaker", "Speaker External",
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"Line", "Line In",
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"Microphone", "Microphone Jack";
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2016-01-16 18:51:13 +08:00
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2018-06-06 23:54:11 +08:00
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routing = "Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT",
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"Amplifier", "MONO_LOUT",
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"Speaker External", "Amplifier",
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"LINE1R", "Line In",
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"LINE1L", "Line In",
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"MIC3L", "Microphone Jack",
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"MIC3R", "Microphone Jack",
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"Microphone Jack", "Mic Bias";
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2016-01-16 18:51:13 +08:00
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2018-06-06 23:54:11 +08:00
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dais = <&cpu_port>;
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pa-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
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2015-05-29 00:49:50 +08:00
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};
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emmc_pwrseq: pwrseq@0 {
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compatible = "mmc-pwrseq-emmc";
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_pwrseq_pins>;
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reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
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};
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2018-06-06 23:54:06 +08:00
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vdd_sys_reg: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "vdd_sys_reg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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2016-08-02 00:46:58 +08:00
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vmmcsd_fixed: fixedregulator0 {
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2015-05-29 00:49:50 +08:00
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&lwb_pins>;
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2018-06-06 23:54:11 +08:00
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audio_pins: pinmux_audio_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
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AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
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AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
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AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
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AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */
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>;
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};
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audio_pa_pins: pinmux_audio_pa_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* SoundPA_en - mcasp0_aclkr.gpio3_18 */
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>;
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};
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audio_mclk_pins: pinmux_audio_mclk_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
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>;
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};
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2018-06-06 23:54:06 +08:00
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backlight0_pins: pinmux_backlight0_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE7) /* gpmc_wen.gpio2_4 */
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>;
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};
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backlight1_pins: pinmux_backlight1_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* gpmc_ad10.gpio0_26 */
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>;
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};
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2018-06-06 23:54:08 +08:00
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lcd_pins: pinmux_lcd_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
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AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
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AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
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AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
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AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
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AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
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AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
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AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
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AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
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AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
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AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
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AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
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AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
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AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
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AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
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AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
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AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
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AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
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AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
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AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
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>;
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};
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2015-05-29 00:49:50 +08:00
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led_pins: pinmux_led_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */
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AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* gpmc_a6.gpio1_22 */
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AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23 */
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AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* gpmc_a8.gpio1_24 */
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>;
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};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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>;
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};
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2017-01-17 00:57:32 +08:00
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
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AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
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>;
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};
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2015-05-29 00:49:50 +08:00
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|
|
uart4_pins: pinmux_uart4_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd */
|
|
|
|
AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c0_pins: pinmux_i2c0_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
|
|
|
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c2_pins: pinmux_i2c2_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
|
|
|
|
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
cpsw_default: cpsw_default {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
/* Slave 1 */
|
|
|
|
AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
|
|
|
|
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
|
|
|
|
AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
|
|
|
|
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
|
|
|
|
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
|
|
|
|
AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
|
|
|
|
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
|
|
|
|
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
|
|
|
|
AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
|
|
|
|
AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
|
|
|
|
AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
|
|
|
|
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
|
|
|
|
AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
cpsw_sleep: cpsw_sleep {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
/* Slave 1 reset value */
|
|
|
|
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
davinci_mdio_default: davinci_mdio_default {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
/* MDIO */
|
|
|
|
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
|
|
|
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
2018-06-06 23:54:07 +08:00
|
|
|
/* Ethernet */
|
|
|
|
AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* Ethernet_nRST - gpmc_ad14.gpio1_14 */
|
2015-05-29 00:49:50 +08:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
davinci_mdio_sleep: davinci_mdio_sleep {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
/* MDIO reset value */
|
|
|
|
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
mmc1_pins: pinmux_mmc1_pins {
|
|
|
|
pinctrl-single,pins = <
|
2017-05-22 17:01:52 +08:00
|
|
|
AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE7) /* uart0_rtsn.gpio1_9 */
|
2015-05-29 00:49:50 +08:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
emmc_pins: pinmux_emmc_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
|
|
|
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
|
|
|
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
|
|
|
|
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
|
|
|
|
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
|
|
|
|
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
|
|
|
|
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
|
|
|
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
|
|
|
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
|
|
|
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ehrpwm1_pins: pinmux_ehrpwm1a_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6) /* gpmc_a2.ehrpwm1a */
|
|
|
|
AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.ehrpwm1b */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2018-06-06 23:54:10 +08:00
|
|
|
rtc0_irq_pins: pinmux_rtc0_irq_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad9.gpio0_23 */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2017-01-17 00:57:33 +08:00
|
|
|
spi0_pins: pinmux_spi0_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MOSI - spi0_d0.spi0_d0 */
|
|
|
|
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MISO - spi0_d1.spi0_d1 */
|
|
|
|
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CLK - spi0_clk.spi0_clk */
|
|
|
|
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS0 (NBATTSS) - spi0_cs0.spi0_cs0 */
|
|
|
|
AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) - spi0_cs1.spi0_cs1 */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2015-05-29 00:49:50 +08:00
|
|
|
lwb_pins: pinmux_lwb_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
|
|
|
|
AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
|
|
|
|
AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
|
|
|
|
/* PDI Bus - Battery system */
|
|
|
|
AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
|
|
|
|
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
|
2018-06-06 23:54:12 +08:00
|
|
|
/* FPGA */
|
|
|
|
AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE7) /* FPGA_DONE - gpmc_ad8.gpio0_22 */
|
|
|
|
AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* FPGA_NRST - gpmc_a0.gpio1_16 */
|
|
|
|
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) /* FPGA_RUN - gpmc_a1.gpio1_17 */
|
|
|
|
AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE7) /* ENFPGA - gpmc_a9.gpio1_25 */
|
|
|
|
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) /* FPGA_PROGRAM - gpmc_a10.gpio1_26 */
|
2015-05-29 00:49:50 +08:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c0 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
|
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
|
|
|
tps: tps@24 {
|
|
|
|
reg = <0x24>;
|
|
|
|
};
|
|
|
|
|
2018-06-06 23:54:10 +08:00
|
|
|
rtc0: rtc@68 {
|
|
|
|
compatible = "dallas,ds1339";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&rtc0_irq_pins>;
|
|
|
|
interrupt-parent = <&gpio0>;
|
|
|
|
interrupts = <23 IRQ_TYPE_EDGE_FALLING>; /* gpio 23 */
|
|
|
|
wakeup-source;
|
|
|
|
trickle-resistor-ohms = <2000>;
|
2017-01-17 00:57:34 +08:00
|
|
|
reg = <0x68>;
|
|
|
|
};
|
|
|
|
|
2015-05-29 00:49:50 +08:00
|
|
|
eeprom: eeprom@50 {
|
2017-05-23 21:34:31 +08:00
|
|
|
compatible = "atmel,24c256";
|
2015-05-29 00:49:50 +08:00
|
|
|
reg = <0x50>;
|
|
|
|
};
|
2017-01-17 00:57:34 +08:00
|
|
|
|
2017-01-17 00:57:35 +08:00
|
|
|
gpio_exp: mcp23017@20 {
|
|
|
|
compatible = "microchip,mcp23017";
|
|
|
|
reg = <0x20>;
|
|
|
|
};
|
2017-01-17 00:57:34 +08:00
|
|
|
|
2015-05-29 00:49:50 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
&i2c2 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&i2c2_pins>;
|
|
|
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
|
|
|
audio_codec: tlv320aic3106@1b {
|
|
|
|
status = "okay";
|
|
|
|
compatible = "ti,tlv320aic3106";
|
2018-06-06 23:54:11 +08:00
|
|
|
#sound-dai-cells = <0>;
|
2015-05-29 00:49:50 +08:00
|
|
|
reg = <0x1b>;
|
2018-06-06 23:54:11 +08:00
|
|
|
ai3x-micbias-vg = <2>; /* 2.5V */
|
2015-05-29 00:49:50 +08:00
|
|
|
|
|
|
|
AVDD-supply = <&ldo4_reg>;
|
|
|
|
IOVDD-supply = <&ldo4_reg>;
|
|
|
|
DRVDD-supply = <&ldo4_reg>;
|
|
|
|
DVDD-supply = <&ldo3_reg>;
|
2018-06-06 23:54:11 +08:00
|
|
|
|
|
|
|
codec_port: port {
|
|
|
|
codec_endpoint: endpoint {
|
|
|
|
remote-endpoint = <&cpu_endpoint>;
|
|
|
|
clocks = <&audio_mclk>;
|
|
|
|
};
|
|
|
|
};
|
2015-05-29 00:49:50 +08:00
|
|
|
};
|
2017-01-17 00:57:36 +08:00
|
|
|
|
|
|
|
/* Ambient Light Sensor */
|
|
|
|
als: isl29023@44 {
|
|
|
|
compatible = "isil,isl29023";
|
|
|
|
reg = <0x44>;
|
|
|
|
};
|
2015-05-29 00:49:50 +08:00
|
|
|
};
|
|
|
|
|
2017-01-17 00:57:34 +08:00
|
|
|
&rtc {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
2015-05-29 00:49:50 +08:00
|
|
|
&usb {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb_ctrl_mod {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb0_phy {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb1_phy {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb0 {
|
|
|
|
status = "okay";
|
2018-06-06 23:54:09 +08:00
|
|
|
dr_mode = "otg";
|
2015-05-29 00:49:50 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
&usb1 {
|
|
|
|
status = "okay";
|
|
|
|
dr_mode = "host";
|
|
|
|
};
|
|
|
|
|
|
|
|
&cppi41dma {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&mmc1 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
|
|
bus-width = <4>;
|
2017-05-22 17:01:52 +08:00
|
|
|
cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|
2015-05-29 00:49:50 +08:00
|
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&mmc2 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&emmc_pins>;
|
|
|
|
bus-width = <8>;
|
|
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
|
|
|
mmc-pwrseq = <&emmc_pwrseq>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&mcasp0 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&audio_pins>;
|
2018-06-06 23:54:11 +08:00
|
|
|
#sound-dai-cells = <0>;
|
2015-05-29 00:49:50 +08:00
|
|
|
op-mode = <0>; /* MCASP_ISS_MODE */
|
|
|
|
tdm-slots = <2>;
|
2018-06-06 23:54:11 +08:00
|
|
|
/* 4 serializers */
|
|
|
|
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
|
|
|
0 0 1 2
|
2015-05-29 00:49:50 +08:00
|
|
|
>;
|
2018-06-06 23:54:11 +08:00
|
|
|
tx-num-evt = <32>;
|
|
|
|
rx-num-evt = <32>;
|
|
|
|
|
|
|
|
cpu_port: port {
|
|
|
|
cpu_endpoint: endpoint {
|
|
|
|
remote-endpoint = <&codec_endpoint>;
|
|
|
|
|
|
|
|
dai-format = "dsp_b";
|
|
|
|
bitclock-master = <&codec_port>;
|
|
|
|
frame-master = <&codec_port>;
|
|
|
|
bitclock-inversion;
|
|
|
|
clocks = <&audio_mclk>;
|
|
|
|
};
|
|
|
|
};
|
2015-05-29 00:49:50 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
&uart0 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&uart0_pins>;
|
|
|
|
};
|
|
|
|
|
2017-01-17 00:57:32 +08:00
|
|
|
&uart1 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&uart1_pins>;
|
|
|
|
};
|
|
|
|
|
2015-05-29 00:49:50 +08:00
|
|
|
&uart4 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&uart4_pins>;
|
|
|
|
};
|
|
|
|
|
2017-01-17 00:57:33 +08:00
|
|
|
&spi0 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&spi0_pins>;
|
|
|
|
|
|
|
|
flash: n25q032@1 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
compatible = "micron,n25q032";
|
|
|
|
reg = <1>;
|
|
|
|
spi-max-frequency = <5000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2016-02-19 22:12:19 +08:00
|
|
|
#include "tps65217.dtsi"
|
|
|
|
|
2015-05-29 00:49:50 +08:00
|
|
|
&tps {
|
|
|
|
ti,pmic-shutdown-controller;
|
|
|
|
|
|
|
|
interrupt-parent = <&intc>;
|
|
|
|
interrupts = <7>; /* NNMI */
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
dcdc1_reg: regulator@0 {
|
|
|
|
/* VDDS_DDR */
|
|
|
|
regulator-min-microvolt = <1500000>;
|
|
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
dcdc2_reg: regulator@1 {
|
|
|
|
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
|
|
|
regulator-name = "vdd_mpu";
|
|
|
|
regulator-min-microvolt = <925000>;
|
|
|
|
regulator-max-microvolt = <1325000>;
|
|
|
|
regulator-boot-on;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
dcdc3_reg: regulator@2 {
|
|
|
|
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
|
|
|
regulator-name = "vdd_core";
|
|
|
|
regulator-min-microvolt = <925000>;
|
|
|
|
regulator-max-microvolt = <1150000>;
|
|
|
|
regulator-boot-on;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
ldo1_reg: regulator@3 {
|
|
|
|
/* VRTC / VIO / VDDS*/
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ldo2_reg: regulator@4 {
|
|
|
|
/* VDD_3V3AUX */
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ldo3_reg: regulator@5 {
|
|
|
|
/* VDD_1V8 */
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
ldo4_reg: regulator@6 {
|
|
|
|
/* VDD_3V3A */
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&cpsw_emac0 {
|
|
|
|
phy-mode = "mii";
|
2018-06-06 23:54:07 +08:00
|
|
|
phy-handle = <ðphy0>;
|
2015-05-29 00:49:50 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
&mac {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
pinctrl-0 = <&cpsw_default>;
|
|
|
|
pinctrl-1 = <&cpsw_sleep>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&davinci_mdio {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
2018-06-06 23:54:07 +08:00
|
|
|
reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
|
|
|
reset-delay-us = <100>; /* PHY datasheet states 100us min */
|
|
|
|
|
|
|
|
ethphy0: ethernet-phy@0 {
|
|
|
|
reg = <0>;
|
|
|
|
};
|
2015-05-29 00:49:50 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
&sham {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&aes {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&epwmss1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&ehrpwm1 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&ehrpwm1_pins>;
|
|
|
|
};
|
2018-06-06 23:54:08 +08:00
|
|
|
|
|
|
|
&lcdc {
|
|
|
|
status = "okay";
|
|
|
|
};
|
2018-06-06 23:54:13 +08:00
|
|
|
|
|
|
|
&tscadc {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&am335x_adc {
|
|
|
|
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
|
|
|
};
|