2011-10-14 09:40:52 +08:00
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/*
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* at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
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*
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2012-04-09 19:26:33 +08:00
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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2011-10-14 09:40:52 +08:00
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*
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2012-04-09 19:26:33 +08:00
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* Licensed under GPLv2.
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2011-10-14 09:40:52 +08:00
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*/
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2013-05-15 01:21:50 +08:00
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#include "at91sam9260.dtsi"
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2011-10-14 09:40:52 +08:00
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/ {
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model = "Atmel AT91SAM9G20 family SoC";
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compatible = "atmel,at91sam9g20";
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2012-04-03 02:44:20 +08:00
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memory {
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2011-10-14 09:40:52 +08:00
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reg = <0x20000000 0x08000000>;
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};
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2012-05-16 23:37:06 +08:00
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2017-10-14 01:54:51 +08:00
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sram0: sram@2ff000 {
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2015-01-14 02:12:24 +08:00
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status = "disabled";
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};
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2017-10-14 01:54:51 +08:00
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sram1: sram@2fc000 {
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2015-01-14 02:12:24 +08:00
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compatible = "mmio-sram";
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reg = <0x002fc000 0x8000>;
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};
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2012-05-16 23:37:06 +08:00
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ahb {
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apb {
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2012-09-12 14:42:16 +08:00
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i2c0: i2c@fffac000 {
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compatible = "atmel,at91sam9g20-i2c";
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};
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2014-06-11 18:14:42 +08:00
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ssc0: ssc@fffbc000 {
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compatible = "atmel,at91sam9rl-ssc";
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};
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2012-05-16 23:37:06 +08:00
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adc0: adc@fffe0000 {
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atmel,adc-startup-time = <40>;
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};
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2014-06-17 01:22:40 +08:00
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pmc: pmc@fffffc00 {
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2018-08-17 00:29:20 +08:00
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compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon";
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2014-06-17 01:22:40 +08:00
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};
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2012-05-16 23:37:06 +08:00
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};
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};
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2011-10-14 09:40:52 +08:00
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};
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