2009-04-27 21:49:44 +08:00
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/*
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* wm8940.c -- WM8940 ALSA Soc Audio driver
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*
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* Author: Jonathan Cameron <jic23@cam.ac.uk>
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*
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* Based on wm8510.c
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* Copyright 2006 Wolfson Microelectronics PLC.
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* Author: Liam Girdwood <lrg@slimlogic.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Not currently handled:
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* Notch filter control
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* AUXMode (inverting vs mixer)
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* No means to obtain current gain if alc enabled.
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* No use made of gpio
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* Fast VMID discharge for power down
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* Soft Start
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* DLR and ALR Swaps not enabled
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* Digital Sidetone not supported
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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2013-11-09 01:22:23 +08:00
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#include <linux/regmap.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2009-04-27 21:49:44 +08:00
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "wm8940.h"
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struct wm8940_priv {
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unsigned int sysclk;
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2013-11-09 01:22:23 +08:00
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struct regmap *regmap;
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2009-04-27 21:49:44 +08:00
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};
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2013-11-09 01:22:23 +08:00
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static bool wm8940_volatile_register(struct device *dev, unsigned int reg)
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2011-10-07 21:42:49 +08:00
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{
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switch (reg) {
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case WM8940_SOFTRESET:
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2013-11-09 01:22:23 +08:00
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return true;
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2011-10-07 21:42:49 +08:00
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default:
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2013-11-09 01:22:23 +08:00
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return false;
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}
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}
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static bool wm8940_readable_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case WM8940_SOFTRESET:
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case WM8940_POWER1:
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case WM8940_POWER2:
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case WM8940_POWER3:
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case WM8940_IFACE:
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case WM8940_COMPANDINGCTL:
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case WM8940_CLOCK:
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case WM8940_ADDCNTRL:
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case WM8940_GPIO:
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case WM8940_CTLINT:
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case WM8940_DAC:
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case WM8940_DACVOL:
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case WM8940_ADC:
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case WM8940_ADCVOL:
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case WM8940_NOTCH1:
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case WM8940_NOTCH2:
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case WM8940_NOTCH3:
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case WM8940_NOTCH4:
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case WM8940_NOTCH5:
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case WM8940_NOTCH6:
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case WM8940_NOTCH7:
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case WM8940_NOTCH8:
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case WM8940_DACLIM1:
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case WM8940_DACLIM2:
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case WM8940_ALC1:
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case WM8940_ALC2:
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case WM8940_ALC3:
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case WM8940_NOISEGATE:
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case WM8940_PLLN:
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case WM8940_PLLK1:
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case WM8940_PLLK2:
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case WM8940_PLLK3:
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case WM8940_ALC4:
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case WM8940_INPUTCTL:
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case WM8940_PGAGAIN:
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case WM8940_ADCBOOST:
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case WM8940_OUTPUTCTL:
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case WM8940_SPKMIX:
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case WM8940_SPKVOL:
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case WM8940_MONOMIX:
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return true;
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default:
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return false;
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2011-10-07 21:42:49 +08:00
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}
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}
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2013-11-09 01:22:23 +08:00
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static const struct reg_default wm8940_reg_defaults[] = {
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{ 0x1, 0x0000 }, /* Power 1 */
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{ 0x2, 0x0000 }, /* Power 2 */
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{ 0x3, 0x0000 }, /* Power 3 */
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{ 0x4, 0x0010 }, /* Interface Control */
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{ 0x5, 0x0000 }, /* Companding Control */
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{ 0x6, 0x0140 }, /* Clock Control */
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{ 0x7, 0x0000 }, /* Additional Controls */
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{ 0x8, 0x0000 }, /* GPIO Control */
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{ 0x9, 0x0002 }, /* Auto Increment Control */
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{ 0xa, 0x0000 }, /* DAC Control */
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{ 0xb, 0x00FF }, /* DAC Volume */
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{ 0xe, 0x0100 }, /* ADC Control */
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{ 0xf, 0x00FF }, /* ADC Volume */
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{ 0x10, 0x0000 }, /* Notch Filter 1 Control 1 */
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{ 0x11, 0x0000 }, /* Notch Filter 1 Control 2 */
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{ 0x12, 0x0000 }, /* Notch Filter 2 Control 1 */
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{ 0x13, 0x0000 }, /* Notch Filter 2 Control 2 */
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{ 0x14, 0x0000 }, /* Notch Filter 3 Control 1 */
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{ 0x15, 0x0000 }, /* Notch Filter 3 Control 2 */
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{ 0x16, 0x0000 }, /* Notch Filter 4 Control 1 */
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{ 0x17, 0x0000 }, /* Notch Filter 4 Control 2 */
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{ 0x18, 0x0032 }, /* DAC Limit Control 1 */
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{ 0x19, 0x0000 }, /* DAC Limit Control 2 */
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{ 0x20, 0x0038 }, /* ALC Control 1 */
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{ 0x21, 0x000B }, /* ALC Control 2 */
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{ 0x22, 0x0032 }, /* ALC Control 3 */
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{ 0x23, 0x0000 }, /* Noise Gate */
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{ 0x24, 0x0041 }, /* PLLN */
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{ 0x25, 0x000C }, /* PLLK1 */
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{ 0x26, 0x0093 }, /* PLLK2 */
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{ 0x27, 0x00E9 }, /* PLLK3 */
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{ 0x2a, 0x0030 }, /* ALC Control 4 */
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{ 0x2c, 0x0002 }, /* Input Control */
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{ 0x2d, 0x0050 }, /* PGA Gain */
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{ 0x2f, 0x0002 }, /* ADC Boost Control */
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{ 0x31, 0x0002 }, /* Output Control */
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{ 0x32, 0x0000 }, /* Speaker Mixer Control */
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{ 0x36, 0x0079 }, /* Speaker Volume */
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{ 0x38, 0x0000 }, /* Mono Mixer Control */
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2009-04-27 21:49:44 +08:00
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};
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static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
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2014-02-18 17:42:06 +08:00
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static SOC_ENUM_SINGLE_DECL(wm8940_adc_companding_enum,
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WM8940_COMPANDINGCTL, 1, wm8940_companding);
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static SOC_ENUM_SINGLE_DECL(wm8940_dac_companding_enum,
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WM8940_COMPANDINGCTL, 3, wm8940_companding);
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2009-04-27 21:49:44 +08:00
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static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"};
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2014-02-18 17:42:06 +08:00
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static SOC_ENUM_SINGLE_DECL(wm8940_alc_mode_enum,
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WM8940_ALC3, 8, wm8940_alc_mode_text);
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2009-04-27 21:49:44 +08:00
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static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"};
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2014-02-18 17:42:06 +08:00
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static SOC_ENUM_SINGLE_DECL(wm8940_mic_bias_level_enum,
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WM8940_INPUTCTL, 8, wm8940_mic_bias_level_text);
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2009-04-27 21:49:44 +08:00
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static const char *wm8940_filter_mode_text[] = {"Audio", "Application"};
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2014-02-18 17:42:06 +08:00
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static SOC_ENUM_SINGLE_DECL(wm8940_filter_mode_enum,
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WM8940_ADC, 7, wm8940_filter_mode_text);
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2009-04-27 21:49:44 +08:00
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2009-04-28 03:57:42 +08:00
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static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
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static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
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static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
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static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
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static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0);
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static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
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static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0);
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static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0);
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static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1);
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static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0);
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2009-04-27 21:49:44 +08:00
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static const struct snd_kcontrol_new wm8940_snd_controls[] = {
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SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL,
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6, 1, 0),
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SOC_ENUM("DAC Companding", wm8940_dac_companding_enum),
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SOC_ENUM("ADC Companding", wm8940_adc_companding_enum),
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SOC_ENUM("ALC Mode", wm8940_alc_mode_enum),
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SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0),
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SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1,
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3, 7, 1, wm8940_alc_max_tlv),
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SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1,
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0, 7, 0, wm8940_alc_min_tlv),
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SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2,
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0, 14, 0, wm8940_alc_tar_tlv),
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SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0),
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SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0),
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SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0),
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SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0),
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SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE,
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3, 1, 0),
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SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE,
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0, 7, 0),
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SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0),
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SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0),
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SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0),
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SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2,
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4, 9, 1, wm8940_lim_thresh_tlv),
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SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2,
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0, 12, 0, wm8940_lim_boost_tlv),
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SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0),
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SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN,
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0, 63, 0, wm8940_pga_vol_tlv),
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SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL,
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0, 255, 0, wm8940_adc_tlv),
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SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
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0, 255, 0, wm8940_adc_tlv),
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SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
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SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
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8, 1, 0, wm8940_capture_boost_vol_tlv),
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SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
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0, 63, 0, wm8940_spk_vol_tlv),
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SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1),
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SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL,
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8, 1, 1, wm8940_att_tlv),
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|
|
SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0),
|
|
|
|
|
|
|
|
|
|
SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1),
|
|
|
|
|
SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX,
|
|
|
|
|
7, 1, 1, wm8940_att_tlv),
|
|
|
|
|
|
|
|
|
|
SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0),
|
|
|
|
|
SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum),
|
|
|
|
|
SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0),
|
|
|
|
|
SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0),
|
|
|
|
|
SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0),
|
|
|
|
|
SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0),
|
|
|
|
|
SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = {
|
|
|
|
|
SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0),
|
|
|
|
|
SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0),
|
|
|
|
|
SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = {
|
|
|
|
|
SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0),
|
|
|
|
|
SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0),
|
|
|
|
|
SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0),
|
|
|
|
|
};
|
|
|
|
|
|
2009-04-28 03:57:42 +08:00
|
|
|
static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1);
|
2009-04-27 21:49:44 +08:00
|
|
|
static const struct snd_kcontrol_new wm8940_input_boost_controls[] = {
|
|
|
|
|
SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1),
|
|
|
|
|
SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST,
|
|
|
|
|
0, 7, 0, wm8940_boost_vol_tlv),
|
|
|
|
|
SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST,
|
|
|
|
|
4, 7, 0, wm8940_boost_vol_tlv),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct snd_kcontrol_new wm8940_micpga_controls[] = {
|
|
|
|
|
SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0),
|
|
|
|
|
SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0),
|
|
|
|
|
SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = {
|
|
|
|
|
SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0,
|
|
|
|
|
&wm8940_speaker_mixer_controls[0],
|
|
|
|
|
ARRAY_SIZE(wm8940_speaker_mixer_controls)),
|
|
|
|
|
SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0,
|
|
|
|
|
&wm8940_mono_mixer_controls[0],
|
|
|
|
|
ARRAY_SIZE(wm8940_mono_mixer_controls)),
|
|
|
|
|
SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0),
|
|
|
|
|
|
|
|
|
|
SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0),
|
|
|
|
|
SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0),
|
|
|
|
|
SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0),
|
|
|
|
|
SND_SOC_DAPM_OUTPUT("MONOOUT"),
|
|
|
|
|
SND_SOC_DAPM_OUTPUT("SPKOUTP"),
|
|
|
|
|
SND_SOC_DAPM_OUTPUT("SPKOUTN"),
|
|
|
|
|
|
|
|
|
|
SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0),
|
|
|
|
|
SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0),
|
|
|
|
|
SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0,
|
|
|
|
|
&wm8940_micpga_controls[0],
|
|
|
|
|
ARRAY_SIZE(wm8940_micpga_controls)),
|
|
|
|
|
SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0,
|
|
|
|
|
&wm8940_input_boost_controls[0],
|
|
|
|
|
ARRAY_SIZE(wm8940_input_boost_controls)),
|
|
|
|
|
SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0),
|
|
|
|
|
|
|
|
|
|
SND_SOC_DAPM_INPUT("MICN"),
|
|
|
|
|
SND_SOC_DAPM_INPUT("MICP"),
|
|
|
|
|
SND_SOC_DAPM_INPUT("AUX"),
|
|
|
|
|
};
|
|
|
|
|
|
2013-11-09 01:19:55 +08:00
|
|
|
static const struct snd_soc_dapm_route wm8940_dapm_routes[] = {
|
2009-04-27 21:49:44 +08:00
|
|
|
/* Mono output mixer */
|
|
|
|
|
{"Mono Mixer", "PCM Playback Switch", "DAC"},
|
|
|
|
|
{"Mono Mixer", "Aux Playback Switch", "Aux Input"},
|
|
|
|
|
{"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
|
|
|
|
|
|
|
|
|
|
/* Speaker output mixer */
|
|
|
|
|
{"Speaker Mixer", "PCM Playback Switch", "DAC"},
|
|
|
|
|
{"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
|
|
|
|
|
{"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
|
|
|
|
|
|
|
|
|
|
/* Outputs */
|
|
|
|
|
{"Mono Out", NULL, "Mono Mixer"},
|
|
|
|
|
{"MONOOUT", NULL, "Mono Out"},
|
|
|
|
|
{"SpkN Out", NULL, "Speaker Mixer"},
|
|
|
|
|
{"SpkP Out", NULL, "Speaker Mixer"},
|
|
|
|
|
{"SPKOUTN", NULL, "SpkN Out"},
|
|
|
|
|
{"SPKOUTP", NULL, "SpkP Out"},
|
|
|
|
|
|
|
|
|
|
/* Microphone PGA */
|
|
|
|
|
{"Mic PGA", "MICN Switch", "MICN"},
|
|
|
|
|
{"Mic PGA", "MICP Switch", "MICP"},
|
|
|
|
|
{"Mic PGA", "AUX Switch", "AUX"},
|
|
|
|
|
|
|
|
|
|
/* Boost Mixer */
|
|
|
|
|
{"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
|
|
|
|
|
{"Boost Mixer", "Mic Volume", "MICP"},
|
|
|
|
|
{"Boost Mixer", "Aux Volume", "Aux Input"},
|
|
|
|
|
|
|
|
|
|
{"ADC", NULL, "Boost Mixer"},
|
|
|
|
|
};
|
|
|
|
|
|
2009-07-11 06:12:01 +08:00
|
|
|
#define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|
|
|
|
unsigned int fmt)
|
|
|
|
|
{
|
|
|
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
2009-07-11 06:12:01 +08:00
|
|
|
u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFE67;
|
|
|
|
|
u16 clk = snd_soc_read(codec, WM8940_CLOCK) & 0x1fe;
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
|
|
|
|
case SND_SOC_DAIFMT_CBM_CFM:
|
|
|
|
|
clk |= 1;
|
|
|
|
|
break;
|
|
|
|
|
case SND_SOC_DAIFMT_CBS_CFS:
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
2009-07-11 06:12:01 +08:00
|
|
|
snd_soc_write(codec, WM8940_CLOCK, clk);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
|
|
|
case SND_SOC_DAIFMT_I2S:
|
|
|
|
|
iface |= (2 << 3);
|
|
|
|
|
break;
|
|
|
|
|
case SND_SOC_DAIFMT_LEFT_J:
|
|
|
|
|
iface |= (1 << 3);
|
|
|
|
|
break;
|
|
|
|
|
case SND_SOC_DAIFMT_RIGHT_J:
|
|
|
|
|
break;
|
|
|
|
|
case SND_SOC_DAIFMT_DSP_A:
|
|
|
|
|
iface |= (3 << 3);
|
|
|
|
|
break;
|
|
|
|
|
case SND_SOC_DAIFMT_DSP_B:
|
|
|
|
|
iface |= (3 << 3) | (1 << 7);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
|
|
|
|
case SND_SOC_DAIFMT_NB_NF:
|
|
|
|
|
break;
|
|
|
|
|
case SND_SOC_DAIFMT_NB_IF:
|
|
|
|
|
iface |= (1 << 7);
|
|
|
|
|
break;
|
|
|
|
|
case SND_SOC_DAIFMT_IB_NF:
|
|
|
|
|
iface |= (1 << 8);
|
|
|
|
|
break;
|
|
|
|
|
case SND_SOC_DAIFMT_IB_IF:
|
|
|
|
|
iface |= (1 << 8) | (1 << 7);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2009-07-11 06:12:01 +08:00
|
|
|
snd_soc_write(codec, WM8940_IFACE, iface);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
|
|
|
|
|
struct snd_pcm_hw_params *params,
|
|
|
|
|
struct snd_soc_dai *dai)
|
|
|
|
|
{
|
2012-04-04 22:58:16 +08:00
|
|
|
struct snd_soc_codec *codec = dai->codec;
|
2009-07-11 06:12:01 +08:00
|
|
|
u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFD9F;
|
|
|
|
|
u16 addcntrl = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFF1;
|
|
|
|
|
u16 companding = snd_soc_read(codec,
|
2009-04-27 21:49:44 +08:00
|
|
|
WM8940_COMPANDINGCTL) & 0xFFDF;
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
|
|
/* LoutR control */
|
|
|
|
|
if (substream->stream == SNDRV_PCM_STREAM_CAPTURE
|
|
|
|
|
&& params_channels(params) == 2)
|
|
|
|
|
iface |= (1 << 9);
|
|
|
|
|
|
|
|
|
|
switch (params_rate(params)) {
|
2009-12-24 08:13:51 +08:00
|
|
|
case 8000:
|
2009-04-27 21:49:44 +08:00
|
|
|
addcntrl |= (0x5 << 1);
|
|
|
|
|
break;
|
2009-12-24 08:13:51 +08:00
|
|
|
case 11025:
|
2009-04-27 21:49:44 +08:00
|
|
|
addcntrl |= (0x4 << 1);
|
|
|
|
|
break;
|
2009-12-24 08:13:51 +08:00
|
|
|
case 16000:
|
2009-04-27 21:49:44 +08:00
|
|
|
addcntrl |= (0x3 << 1);
|
|
|
|
|
break;
|
2009-12-24 08:13:51 +08:00
|
|
|
case 22050:
|
2009-04-27 21:49:44 +08:00
|
|
|
addcntrl |= (0x2 << 1);
|
|
|
|
|
break;
|
2009-12-24 08:13:51 +08:00
|
|
|
case 32000:
|
2009-04-27 21:49:44 +08:00
|
|
|
addcntrl |= (0x1 << 1);
|
|
|
|
|
break;
|
2009-12-24 08:13:51 +08:00
|
|
|
case 44100:
|
|
|
|
|
case 48000:
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
|
|
|
|
}
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl);
|
2009-04-27 21:49:44 +08:00
|
|
|
if (ret)
|
|
|
|
|
goto error_ret;
|
|
|
|
|
|
2014-07-31 19:53:08 +08:00
|
|
|
switch (params_width(params)) {
|
|
|
|
|
case 8:
|
2009-04-27 21:49:44 +08:00
|
|
|
companding = companding | (1 << 5);
|
|
|
|
|
break;
|
2014-07-31 19:53:08 +08:00
|
|
|
case 16:
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
2014-07-31 19:53:08 +08:00
|
|
|
case 20:
|
2009-04-27 21:49:44 +08:00
|
|
|
iface |= (1 << 5);
|
|
|
|
|
break;
|
2014-07-31 19:53:08 +08:00
|
|
|
case 24:
|
2009-04-27 21:49:44 +08:00
|
|
|
iface |= (2 << 5);
|
|
|
|
|
break;
|
2014-07-31 19:53:08 +08:00
|
|
|
case 32:
|
2009-04-27 21:49:44 +08:00
|
|
|
iface |= (3 << 5);
|
|
|
|
|
break;
|
|
|
|
|
}
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_COMPANDINGCTL, companding);
|
2009-04-27 21:49:44 +08:00
|
|
|
if (ret)
|
|
|
|
|
goto error_ret;
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_IFACE, iface);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
error_ret:
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int wm8940_mute(struct snd_soc_dai *dai, int mute)
|
|
|
|
|
{
|
|
|
|
|
struct snd_soc_codec *codec = dai->codec;
|
2009-07-11 06:12:01 +08:00
|
|
|
u16 mute_reg = snd_soc_read(codec, WM8940_DAC) & 0xffbf;
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
if (mute)
|
|
|
|
|
mute_reg |= 0x40;
|
|
|
|
|
|
2009-07-11 06:12:01 +08:00
|
|
|
return snd_soc_write(codec, WM8940_DAC, mute_reg);
|
2009-04-27 21:49:44 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int wm8940_set_bias_level(struct snd_soc_codec *codec,
|
|
|
|
|
enum snd_soc_bias_level level)
|
|
|
|
|
{
|
2013-11-09 01:22:23 +08:00
|
|
|
struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
|
2009-04-27 21:49:44 +08:00
|
|
|
u16 val;
|
2009-07-11 06:12:01 +08:00
|
|
|
u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0;
|
2009-04-27 21:49:44 +08:00
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
|
|
switch (level) {
|
|
|
|
|
case SND_SOC_BIAS_ON:
|
|
|
|
|
/* ensure bufioen and biasen */
|
|
|
|
|
pwr_reg |= (1 << 2) | (1 << 3);
|
|
|
|
|
/* Enable thermal shutdown */
|
2009-07-11 06:12:01 +08:00
|
|
|
val = snd_soc_read(codec, WM8940_OUTPUTCTL);
|
|
|
|
|
ret = snd_soc_write(codec, WM8940_OUTPUTCTL, val | 0x2);
|
2009-04-27 21:49:44 +08:00
|
|
|
if (ret)
|
|
|
|
|
break;
|
|
|
|
|
/* set vmid to 75k */
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
|
|
|
|
case SND_SOC_BIAS_PREPARE:
|
|
|
|
|
/* ensure bufioen and biasen */
|
|
|
|
|
pwr_reg |= (1 << 2) | (1 << 3);
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
|
|
|
|
case SND_SOC_BIAS_STANDBY:
|
2015-06-01 16:10:46 +08:00
|
|
|
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
2013-11-09 01:22:23 +08:00
|
|
|
ret = regcache_sync(wm8940->regmap);
|
2011-10-07 21:42:49 +08:00
|
|
|
if (ret < 0) {
|
|
|
|
|
dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2009-04-27 21:49:44 +08:00
|
|
|
/* ensure bufioen and biasen */
|
|
|
|
|
pwr_reg |= (1 << 2) | (1 << 3);
|
|
|
|
|
/* set vmid to 300k for standby */
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x2);
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
|
|
|
|
case SND_SOC_BIAS_OFF:
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg);
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
struct pll_ {
|
|
|
|
|
unsigned int pre_scale:2;
|
|
|
|
|
unsigned int n:4;
|
|
|
|
|
unsigned int k;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct pll_ pll_div;
|
|
|
|
|
|
|
|
|
|
/* The size in bits of the pll divide multiplied by 10
|
|
|
|
|
* to allow rounding later */
|
|
|
|
|
#define FIXED_PLL_SIZE ((1 << 24) * 10)
|
|
|
|
|
static void pll_factors(unsigned int target, unsigned int source)
|
|
|
|
|
{
|
|
|
|
|
unsigned long long Kpart;
|
|
|
|
|
unsigned int K, Ndiv, Nmod;
|
|
|
|
|
/* The left shift ist to avoid accuracy loss when right shifting */
|
|
|
|
|
Ndiv = target / source;
|
|
|
|
|
|
|
|
|
|
if (Ndiv > 12) {
|
|
|
|
|
source <<= 1;
|
|
|
|
|
/* Multiply by 2 */
|
|
|
|
|
pll_div.pre_scale = 0;
|
|
|
|
|
Ndiv = target / source;
|
|
|
|
|
} else if (Ndiv < 3) {
|
|
|
|
|
source >>= 2;
|
|
|
|
|
/* Divide by 4 */
|
|
|
|
|
pll_div.pre_scale = 3;
|
|
|
|
|
Ndiv = target / source;
|
|
|
|
|
} else if (Ndiv < 6) {
|
|
|
|
|
source >>= 1;
|
|
|
|
|
/* divide by 2 */
|
|
|
|
|
pll_div.pre_scale = 2;
|
|
|
|
|
Ndiv = target / source;
|
|
|
|
|
} else
|
|
|
|
|
pll_div.pre_scale = 1;
|
|
|
|
|
|
|
|
|
|
if ((Ndiv < 6) || (Ndiv > 12))
|
|
|
|
|
printk(KERN_WARNING
|
|
|
|
|
"WM8940 N value %d outwith recommended range!d\n",
|
|
|
|
|
Ndiv);
|
|
|
|
|
|
|
|
|
|
pll_div.n = Ndiv;
|
|
|
|
|
Nmod = target % source;
|
|
|
|
|
Kpart = FIXED_PLL_SIZE * (long long)Nmod;
|
|
|
|
|
|
|
|
|
|
do_div(Kpart, source);
|
|
|
|
|
|
|
|
|
|
K = Kpart & 0xFFFFFFFF;
|
|
|
|
|
|
|
|
|
|
/* Check if we need to round */
|
|
|
|
|
if ((K % 10) >= 5)
|
|
|
|
|
K += 5;
|
|
|
|
|
|
|
|
|
|
/* Move down to proper range now rounding is done */
|
|
|
|
|
K /= 10;
|
|
|
|
|
|
|
|
|
|
pll_div.k = K;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Untested at the moment */
|
2009-09-06 01:52:16 +08:00
|
|
|
static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
|
|
|
|
|
int source, unsigned int freq_in, unsigned int freq_out)
|
2009-04-27 21:49:44 +08:00
|
|
|
{
|
|
|
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
|
|
|
|
u16 reg;
|
|
|
|
|
|
|
|
|
|
/* Turn off PLL */
|
2009-07-11 06:12:01 +08:00
|
|
|
reg = snd_soc_read(codec, WM8940_POWER1);
|
|
|
|
|
snd_soc_write(codec, WM8940_POWER1, reg & 0x1df);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
if (freq_in == 0 || freq_out == 0) {
|
|
|
|
|
/* Clock CODEC directly from MCLK */
|
2009-07-11 06:12:01 +08:00
|
|
|
reg = snd_soc_read(codec, WM8940_CLOCK);
|
|
|
|
|
snd_soc_write(codec, WM8940_CLOCK, reg & 0x0ff);
|
2009-04-27 21:49:44 +08:00
|
|
|
/* Pll power down */
|
2009-07-11 06:12:01 +08:00
|
|
|
snd_soc_write(codec, WM8940_PLLN, (1 << 7));
|
2009-04-27 21:49:44 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Pll is followed by a frequency divide by 4 */
|
|
|
|
|
pll_factors(freq_out*4, freq_in);
|
|
|
|
|
if (pll_div.k)
|
2009-07-11 06:12:01 +08:00
|
|
|
snd_soc_write(codec, WM8940_PLLN,
|
2009-04-27 21:49:44 +08:00
|
|
|
(pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
|
|
|
|
|
else /* No factional component */
|
2009-07-11 06:12:01 +08:00
|
|
|
snd_soc_write(codec, WM8940_PLLN,
|
2009-04-27 21:49:44 +08:00
|
|
|
(pll_div.pre_scale << 4) | pll_div.n);
|
2009-07-11 06:12:01 +08:00
|
|
|
snd_soc_write(codec, WM8940_PLLK1, pll_div.k >> 18);
|
|
|
|
|
snd_soc_write(codec, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
|
|
|
|
|
snd_soc_write(codec, WM8940_PLLK3, pll_div.k & 0x1ff);
|
2009-04-27 21:49:44 +08:00
|
|
|
/* Enable the PLL */
|
2009-07-11 06:12:01 +08:00
|
|
|
reg = snd_soc_read(codec, WM8940_POWER1);
|
|
|
|
|
snd_soc_write(codec, WM8940_POWER1, reg | 0x020);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
/* Run CODEC from PLL instead of MCLK */
|
2009-07-11 06:12:01 +08:00
|
|
|
reg = snd_soc_read(codec, WM8940_CLOCK);
|
|
|
|
|
snd_soc_write(codec, WM8940_CLOCK, reg | 0x100);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
|
|
|
|
|
int clk_id, unsigned int freq, int dir)
|
|
|
|
|
{
|
|
|
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
2010-04-14 14:35:19 +08:00
|
|
|
struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
switch (freq) {
|
|
|
|
|
case 11289600:
|
|
|
|
|
case 12000000:
|
|
|
|
|
case 12288000:
|
|
|
|
|
case 16934400:
|
|
|
|
|
case 18432000:
|
|
|
|
|
wm8940->sysclk = freq;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
return -EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
|
|
|
|
|
int div_id, int div)
|
|
|
|
|
{
|
|
|
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
|
|
|
|
u16 reg;
|
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
|
|
switch (div_id) {
|
|
|
|
|
case WM8940_BCLKDIV:
|
2011-10-27 16:27:33 +08:00
|
|
|
reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3;
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
|
|
|
|
case WM8940_MCLKDIV:
|
2009-07-11 06:12:01 +08:00
|
|
|
reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFF1F;
|
|
|
|
|
ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5));
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
|
|
|
|
case WM8940_OPCLKDIV:
|
2011-10-24 11:32:41 +08:00
|
|
|
reg = snd_soc_read(codec, WM8940_GPIO) & 0xFFCF;
|
|
|
|
|
ret = snd_soc_write(codec, WM8940_GPIO, reg | (div << 4));
|
2009-04-27 21:49:44 +08:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define WM8940_RATES SNDRV_PCM_RATE_8000_48000
|
|
|
|
|
|
|
|
|
|
#define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
|
|
|
|
|
SNDRV_PCM_FMTBIT_S16_LE | \
|
|
|
|
|
SNDRV_PCM_FMTBIT_S20_3LE | \
|
|
|
|
|
SNDRV_PCM_FMTBIT_S24_LE | \
|
|
|
|
|
SNDRV_PCM_FMTBIT_S32_LE)
|
|
|
|
|
|
2011-11-23 18:40:40 +08:00
|
|
|
static const struct snd_soc_dai_ops wm8940_dai_ops = {
|
2009-04-27 21:49:44 +08:00
|
|
|
.hw_params = wm8940_i2s_hw_params,
|
|
|
|
|
.set_sysclk = wm8940_set_dai_sysclk,
|
|
|
|
|
.digital_mute = wm8940_mute,
|
|
|
|
|
.set_fmt = wm8940_set_dai_fmt,
|
|
|
|
|
.set_clkdiv = wm8940_set_dai_clkdiv,
|
|
|
|
|
.set_pll = wm8940_set_dai_pll,
|
|
|
|
|
};
|
|
|
|
|
|
2010-03-18 04:15:21 +08:00
|
|
|
static struct snd_soc_dai_driver wm8940_dai = {
|
|
|
|
|
.name = "wm8940-hifi",
|
2009-04-27 21:49:44 +08:00
|
|
|
.playback = {
|
|
|
|
|
.stream_name = "Playback",
|
|
|
|
|
.channels_min = 1,
|
|
|
|
|
.channels_max = 2,
|
|
|
|
|
.rates = WM8940_RATES,
|
|
|
|
|
.formats = WM8940_FORMATS,
|
|
|
|
|
},
|
|
|
|
|
.capture = {
|
|
|
|
|
.stream_name = "Capture",
|
|
|
|
|
.channels_min = 1,
|
|
|
|
|
.channels_max = 2,
|
|
|
|
|
.rates = WM8940_RATES,
|
|
|
|
|
.formats = WM8940_FORMATS,
|
|
|
|
|
},
|
|
|
|
|
.ops = &wm8940_dai_ops,
|
|
|
|
|
.symmetric_rates = 1,
|
|
|
|
|
};
|
|
|
|
|
|
2010-03-18 04:15:21 +08:00
|
|
|
static int wm8940_probe(struct snd_soc_codec *codec)
|
2009-04-27 21:49:44 +08:00
|
|
|
{
|
2010-03-18 04:15:21 +08:00
|
|
|
struct wm8940_setup_data *pdata = codec->dev->platform_data;
|
2009-04-27 21:49:44 +08:00
|
|
|
int ret;
|
|
|
|
|
u16 reg;
|
|
|
|
|
|
|
|
|
|
ret = wm8940_reset(codec);
|
|
|
|
|
if (ret < 0) {
|
|
|
|
|
dev_err(codec->dev, "Failed to issue reset\n");
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2015-04-28 04:13:24 +08:00
|
|
|
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
2009-07-11 06:12:01 +08:00
|
|
|
ret = snd_soc_write(codec, WM8940_POWER1, 0x180);
|
2009-04-27 21:49:44 +08:00
|
|
|
if (ret < 0)
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
|
|
if (!pdata)
|
|
|
|
|
dev_warn(codec->dev, "No platform data supplied\n");
|
|
|
|
|
else {
|
2009-07-11 06:12:01 +08:00
|
|
|
reg = snd_soc_read(codec, WM8940_OUTPUTCTL);
|
|
|
|
|
ret = snd_soc_write(codec, WM8940_OUTPUTCTL, reg | pdata->vroi);
|
2009-04-27 21:49:44 +08:00
|
|
|
if (ret < 0)
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2010-03-18 04:15:21 +08:00
|
|
|
return ret;
|
2009-04-27 21:49:44 +08:00
|
|
|
}
|
|
|
|
|
|
2010-03-18 04:15:21 +08:00
|
|
|
static struct snd_soc_codec_driver soc_codec_dev_wm8940 = {
|
|
|
|
|
.probe = wm8940_probe,
|
|
|
|
|
.set_bias_level = wm8940_set_bias_level,
|
2014-11-23 20:37:31 +08:00
|
|
|
.suspend_bias_off = true,
|
|
|
|
|
|
2013-11-09 01:19:55 +08:00
|
|
|
.controls = wm8940_snd_controls,
|
|
|
|
|
.num_controls = ARRAY_SIZE(wm8940_snd_controls),
|
|
|
|
|
.dapm_widgets = wm8940_dapm_widgets,
|
|
|
|
|
.num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets),
|
|
|
|
|
.dapm_routes = wm8940_dapm_routes,
|
|
|
|
|
.num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes),
|
2013-11-09 01:22:23 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct regmap_config wm8940_regmap = {
|
|
|
|
|
.reg_bits = 8,
|
|
|
|
|
.val_bits = 16,
|
|
|
|
|
|
|
|
|
|
.max_register = WM8940_MONOMIX,
|
|
|
|
|
.reg_defaults = wm8940_reg_defaults,
|
|
|
|
|
.num_reg_defaults = ARRAY_SIZE(wm8940_reg_defaults),
|
2016-06-16 20:34:32 +08:00
|
|
|
.cache_type = REGCACHE_RBTREE,
|
2013-11-09 01:22:23 +08:00
|
|
|
|
|
|
|
|
.readable_reg = wm8940_readable_register,
|
|
|
|
|
.volatile_reg = wm8940_volatile_register,
|
2010-03-18 04:15:21 +08:00
|
|
|
};
|
|
|
|
|
|
2012-12-07 22:26:37 +08:00
|
|
|
static int wm8940_i2c_probe(struct i2c_client *i2c,
|
|
|
|
|
const struct i2c_device_id *id)
|
2009-04-27 21:49:44 +08:00
|
|
|
{
|
|
|
|
|
struct wm8940_priv *wm8940;
|
2010-03-18 04:15:21 +08:00
|
|
|
int ret;
|
2009-04-27 21:49:44 +08:00
|
|
|
|
2011-12-30 05:16:59 +08:00
|
|
|
wm8940 = devm_kzalloc(&i2c->dev, sizeof(struct wm8940_priv),
|
|
|
|
|
GFP_KERNEL);
|
2009-04-27 21:49:44 +08:00
|
|
|
if (wm8940 == NULL)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
2013-11-09 01:22:23 +08:00
|
|
|
wm8940->regmap = devm_regmap_init_i2c(i2c, &wm8940_regmap);
|
|
|
|
|
if (IS_ERR(wm8940->regmap))
|
|
|
|
|
return PTR_ERR(wm8940->regmap);
|
|
|
|
|
|
2009-04-27 21:49:44 +08:00
|
|
|
i2c_set_clientdata(i2c, wm8940);
|
|
|
|
|
|
2010-03-18 04:15:21 +08:00
|
|
|
ret = snd_soc_register_codec(&i2c->dev,
|
|
|
|
|
&soc_codec_dev_wm8940, &wm8940_dai, 1);
|
2011-12-30 05:16:59 +08:00
|
|
|
|
2010-07-23 13:53:49 +08:00
|
|
|
return ret;
|
2009-04-27 21:49:44 +08:00
|
|
|
}
|
|
|
|
|
|
2012-12-07 22:26:37 +08:00
|
|
|
static int wm8940_i2c_remove(struct i2c_client *client)
|
2009-04-27 21:49:44 +08:00
|
|
|
{
|
2010-03-18 04:15:21 +08:00
|
|
|
snd_soc_unregister_codec(&client->dev);
|
2011-12-30 05:16:59 +08:00
|
|
|
|
2009-04-27 21:49:44 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const struct i2c_device_id wm8940_i2c_id[] = {
|
|
|
|
|
{ "wm8940", 0 },
|
|
|
|
|
{ }
|
|
|
|
|
};
|
|
|
|
|
MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id);
|
|
|
|
|
|
|
|
|
|
static struct i2c_driver wm8940_i2c_driver = {
|
|
|
|
|
.driver = {
|
2011-12-03 06:08:49 +08:00
|
|
|
.name = "wm8940",
|
2009-04-27 21:49:44 +08:00
|
|
|
},
|
2010-03-18 04:15:21 +08:00
|
|
|
.probe = wm8940_i2c_probe,
|
2012-12-07 22:26:37 +08:00
|
|
|
.remove = wm8940_i2c_remove,
|
2009-04-27 21:49:44 +08:00
|
|
|
.id_table = wm8940_i2c_id,
|
|
|
|
|
};
|
|
|
|
|
|
2012-08-06 19:55:55 +08:00
|
|
|
module_i2c_driver(wm8940_i2c_driver);
|
2009-04-27 21:49:44 +08:00
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("ASoC WM8940 driver");
|
|
|
|
|
MODULE_AUTHOR("Jonathan Cameron");
|
|
|
|
|
MODULE_LICENSE("GPL");
|
