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linux/arch/arm/boot/dts/imx6qdl-sabresd.dtsi

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ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
ARM: dts: imx6qdl-sabresd: correct gpio key's active state From schematic, the power, vol+/- key's active state is low, so we need to set the gpio flag to active low. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-01-20 20:02:38 +08:00
#include <dt-bindings/gpio/gpio.h>
ARM: dts: imx6qdl-sabresd: Add power key support This patch adds support for imx6qdl-sabresd board's power key, the key is named "SW1" on board, press it can wake up system from suspend. Add a new pinctrl entry for gpio keys and move all gpio keys pin to this entry. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 05:07:24 +08:00
#include <dt-bindings/input/input.h>
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
/ {
ARM: dts: Add stdout-path property to i.MX boards This adds the stdout-path property to various i.MX boards. Values of the property have been taken from barebox, so they should be correct. Also, the older linux,stdout-path property is converted to stdout-path. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-07 21:19:00 +08:00
chosen {
stdout-path = &uart1;
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
memory {
reg = <0x10000000 0x40000000>;
};
regulators {
compatible = "simple-bus";
ARM: dts: imx6: use generic node name for fixed regulator The device tree specification recommends that generic name should be used for nodes. So instead of naming those fixed regulator nodes arbitrarily, let's use the generic name 'regulator@num' for those nodes. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-07 23:22:50 +08:00
#address-cells = <1>;
#size-cells = <0>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
ARM: dts: imx6: use generic node name for fixed regulator The device tree specification recommends that generic name should be used for nodes. So instead of naming those fixed regulator nodes arbitrarily, let's use the generic name 'regulator@num' for those nodes. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-07 23:22:50 +08:00
reg_usb_otg_vbus: regulator@0 {
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
compatible = "regulator-fixed";
ARM: dts: imx6: use generic node name for fixed regulator The device tree specification recommends that generic name should be used for nodes. So instead of naming those fixed regulator nodes arbitrarily, let's use the generic name 'regulator@num' for those nodes. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-07 23:22:50 +08:00
reg = <0>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
enable-active-high;
ARM: imx6qdl-sabresd: set swbst_reg as vbus's parent reg USB vbus 5V is from PMIC SWBST, so set swbst_reg as vbus's parent reg, it fixed a bug that the voltage of vbus is incorrect due to swbst_reg is disabled after boots up. Cc: stable@vger.kernel.org Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-03-06 16:04:20 +08:00
vin-supply = <&swbst_reg>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
};
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962 On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10, so add a regulator controled by GPIO_4_10 for WM8962. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 19:51:00 +08:00
ARM: dts: imx6: use generic node name for fixed regulator The device tree specification recommends that generic name should be used for nodes. So instead of naming those fixed regulator nodes arbitrarily, let's use the generic name 'regulator@num' for those nodes. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-07 23:22:50 +08:00
reg_usb_h1_vbus: regulator@1 {
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator We enabled USB host 1, so host 1's vbus should be on to let host 1 work. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-12 16:46:24 +08:00
compatible = "regulator-fixed";
ARM: dts: imx6: use generic node name for fixed regulator The device tree specification recommends that generic name should be used for nodes. So instead of naming those fixed regulator nodes arbitrarily, let's use the generic name 'regulator@num' for those nodes. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-07 23:22:50 +08:00
reg = <1>;
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator We enabled USB host 1, so host 1's vbus should be on to let host 1 work. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-12 16:46:24 +08:00
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 29 0>;
enable-active-high;
ARM: imx6qdl-sabresd: set swbst_reg as vbus's parent reg USB vbus 5V is from PMIC SWBST, so set swbst_reg as vbus's parent reg, it fixed a bug that the voltage of vbus is incorrect due to swbst_reg is disabled after boots up. Cc: stable@vger.kernel.org Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-03-06 16:04:20 +08:00
vin-supply = <&swbst_reg>;
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator We enabled USB host 1, so host 1's vbus should be on to let host 1 work. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-12 16:46:24 +08:00
};
ARM: dts: imx6: use generic node name for fixed regulator The device tree specification recommends that generic name should be used for nodes. So instead of naming those fixed regulator nodes arbitrarily, let's use the generic name 'regulator@num' for those nodes. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-07 23:22:50 +08:00
reg_audio: regulator@2 {
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962 On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10, so add a regulator controled by GPIO_4_10 for WM8962. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 19:51:00 +08:00
compatible = "regulator-fixed";
ARM: dts: imx6: use generic node name for fixed regulator The device tree specification recommends that generic name should be used for nodes. So instead of naming those fixed regulator nodes arbitrarily, let's use the generic name 'regulator@num' for those nodes. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-07 23:22:50 +08:00
reg = <2>;
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962 On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10, so add a regulator controled by GPIO_4_10 for WM8962. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 19:51:00 +08:00
regulator-name = "wm8962-supply";
gpio = <&gpio4 10 0>;
enable-active-high;
};
ARM: dts: imx6qdl-sabresd: add always on pcie regulator Everything in the PCI specification assumes devices to be enumerable on startup. This is only possible if they have power available. A future improvement may allow this regulator to be switched off for D3hot and D3cold power states, but there is a lot of work to do the pcie host controller side for this to work. To keep things simple always enable the regulator for now. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-24 01:29:11 +08:00
reg_pcie: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie_reg>;
regulator-name = "MPCIE_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 19 0>;
regulator-always-on;
enable-active-high;
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
};
gpio-keys {
compatible = "gpio-keys";
ARM: dts: imx6qdl-sabresd: Add power key support This patch adds support for imx6qdl-sabresd board's power key, the key is named "SW1" on board, press it can wake up system from suspend. Add a new pinctrl entry for gpio keys and move all gpio keys pin to this entry. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 05:07:24 +08:00
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
power {
label = "Power Button";
ARM: dts: imx6qdl-sabresd: correct gpio key's active state From schematic, the power, vol+/- key's active state is low, so we need to set the gpio flag to active low. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-01-20 20:02:38 +08:00
gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
ARM: dts: imx: replace legacy wakeup property with 'wakeup-source' Though the keyboard and other driver will continue to support the legacy "gpio-key,wakeup", "linux,wakeup" and "enable-sdio-wakeup" boolean property to enable the wakeup source, "wakeup-source" is the new standard binding. This patch replaces all the legacy wakeup properties with the unified "wakeup-source" property in order to avoid any futher copy-paste duplication. Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-21 18:10:08 +08:00
wakeup-source;
ARM: dts: imx6qdl-sabresd: Add power key support This patch adds support for imx6qdl-sabresd board's power key, the key is named "SW1" on board, press it can wake up system from suspend. Add a new pinctrl entry for gpio keys and move all gpio keys pin to this entry. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 05:07:24 +08:00
linux,code = <KEY_POWER>;
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
volume-up {
label = "Volume Up";
ARM: dts: imx6qdl-sabresd: correct gpio key's active state From schematic, the power, vol+/- key's active state is low, so we need to set the gpio flag to active low. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-01-20 20:02:38 +08:00
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
ARM: dts: imx: replace legacy wakeup property with 'wakeup-source' Though the keyboard and other driver will continue to support the legacy "gpio-key,wakeup", "linux,wakeup" and "enable-sdio-wakeup" boolean property to enable the wakeup source, "wakeup-source" is the new standard binding. This patch replaces all the legacy wakeup properties with the unified "wakeup-source" property in order to avoid any futher copy-paste duplication. Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-21 18:10:08 +08:00
wakeup-source;
ARM: dts: imx6qdl-sabresd: Add power key support This patch adds support for imx6qdl-sabresd board's power key, the key is named "SW1" on board, press it can wake up system from suspend. Add a new pinctrl entry for gpio keys and move all gpio keys pin to this entry. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 05:07:24 +08:00
linux,code = <KEY_VOLUMEUP>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
};
volume-down {
label = "Volume Down";
ARM: dts: imx6qdl-sabresd: correct gpio key's active state From schematic, the power, vol+/- key's active state is low, so we need to set the gpio flag to active low. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-01-20 20:02:38 +08:00
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
ARM: dts: imx: replace legacy wakeup property with 'wakeup-source' Though the keyboard and other driver will continue to support the legacy "gpio-key,wakeup", "linux,wakeup" and "enable-sdio-wakeup" boolean property to enable the wakeup source, "wakeup-source" is the new standard binding. This patch replaces all the legacy wakeup properties with the unified "wakeup-source" property in order to avoid any futher copy-paste duplication. Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-21 18:10:08 +08:00
wakeup-source;
ARM: dts: imx6qdl-sabresd: Add power key support This patch adds support for imx6qdl-sabresd board's power key, the key is named "SW1" on board, press it can wake up system from suspend. Add a new pinctrl entry for gpio keys and move all gpio keys pin to this entry. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 05:07:24 +08:00
linux,code = <KEY_VOLUMEDOWN>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
};
};
ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support Enable WM8962 ALSA machine driver via devicetree. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 13:22:46 +08:00
sound {
compatible = "fsl,imx6q-sabresd-wm8962",
"fsl,imx-audio-wm8962";
model = "wm8962-audio";
ssi-controller = <&ssi2>;
audio-codec = <&codec>;
audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"Ext Spk", "SPKOUTL",
"Ext Spk", "SPKOUTR",
ARM: dts: imx6qdl-sabresd: Fix the microphone route Since commit e409dfbfccf9a49 ("ASoC: dapm: Add a few supply widget sanity checks") the following error is seen: imx-wm8962 sound: wm8962 <-> 202c000.ssi mapping ok imx-wm8962 sound: Connecting non-supply widget to supply widget is not supported (AMIC -> MICBIAS) imx-wm8962 sound: ASoC: no dapm match for AMIC --> (null) --> MICBIAS imx-wm8962 sound: ASoC: Failed to add route AMIC -> direct -> MICBIAS Invert the route between the microphone and the bias in order to fix it. While at it, align the audio routing with imx6sl-evk and imx6sx-sdb, which have the same wm8962 circuitry. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-11-07 22:08:01 +08:00
"AMIC", "MICBIAS",
"IN3R", "AMIC";
ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support Enable WM8962 ALSA machine driver via devicetree. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 13:22:46 +08:00
mux-int-port = <2>;
mux-ext-port = <3>;
};
ARM: dts: imx6qdl-sabresd: Add backlight support for lvds This patch adds support for lvds backlight on boards i.MX6q-SabreSD and i.MX6dl-SabreSD Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-12 03:48:16 +08:00
ARM: dts: imx6qdl-sabresd: Pass the hannstar panel compatible string It is preferred to use the panel compatible string rather than passing the LCD timings in the device tree. So pass the "hannstar,hsd100pxn1" compatible string to describe the LVDS panel on this board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-03-29 01:10:48 +08:00
backlight_lvds: backlight-lvds {
ARM: dts: imx6qdl-sabresd: Add backlight support for lvds This patch adds support for lvds backlight on boards i.MX6q-SabreSD and i.MX6dl-SabreSD Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-12 03:48:16 +08:00
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
status = "okay";
};
ARM: dts: imx6qdl-sabresd.dtsi: Add red led Make the red gpio led available to the user. This can be toggled with the sysfs for example, or used as a heartbeat or mmc activity light by changing the trigger. Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-06 02:58:39 +08:00
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
red {
gpios = <&gpio1 2 0>;
default-state = "on";
};
};
ARM: dts: imx6qdl-sabresd: Pass the hannstar panel compatible string It is preferred to use the panel compatible string rather than passing the LCD timings in the device tree. So pass the "hannstar,hsd100pxn1" compatible string to describe the LVDS panel on this board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-03-29 01:10:48 +08:00
panel {
compatible = "hannstar,hsd100pxn1";
backlight = <&backlight_lvds>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
};
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX Enable SSI2 and its pin configuration in AUDMUX. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 13:19:57 +08:00
&audmux {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_audmux>;
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX Enable SSI2 and its pin configuration in AUDMUX. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 13:19:57 +08:00
status = "okay";
};
ARM: dts: imx6qdl-sabresd: Allow HDMI and LVDS to work simultaneously Currently it is not possible to have HDMI and LVDS working simultaneously, because both ports try to use PLL5. Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be driven from independent sources. With this change the LDB pixel clock goes to 68.57 MHz, which is still within the valid range for the HSD100PXN1 LVDS panel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-06-27 01:10:53 +08:00
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
ARM: dts: imx6qdl-sabresd: enable the SPI NOR enable the spi nor for imx6q{dl}-sabresd boards. Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-06-21 10:19:11 +08:00
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 9 0>;
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_ecspi1>;
ARM: dts: imx6qdl-sabresd: enable the SPI NOR enable the spi nor for imx6q{dl}-sabresd boards. Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-06-21 10:19:11 +08:00
status = "okay";
flash: m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
ARM: dts: imx: add "jedec,spi-nor" flash compatible binding Starting with commit 8947e396a829 ("Documentation: dt: mtd: replace "nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor" binding indicating support for JEDEC identification. Use it for all flashes that are supposed to support READ ID op according to the datasheets. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-16 14:39:17 +08:00
compatible = "st,m25p32", "jedec,spi-nor";
ARM: dts: imx6qdl-sabresd: enable the SPI NOR enable the spi nor for imx6q{dl}-sabresd boards. Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-06-21 10:19:11 +08:00
spi-max-frequency = <20000000>;
reg = <0>;
};
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
&fec {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_enet>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
phy-mode = "rgmii";
ARM: dts: imx6qdl-sabresd: Provide phy-reset-gpios GPIO1_25 is used to reset the ethernet phy. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-27 22:12:41 +08:00
phy-reset-gpios = <&gpio1 25 0>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
status = "okay";
};
ARM: dts: imx6qdl-sabresd: Add HDMI support Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-04-22 21:04:59 +08:00
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support Add WM8962 CODEC support and enable its parent I2C bus. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 19:51:01 +08:00
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_i2c1>;
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support Add WM8962 CODEC support and enable its parent I2C bus. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 19:51:01 +08:00
status = "okay";
codec: wm8962@1a {
compatible = "wlf,wm8962";
reg = <0x1a>;
ARM: dts: imx6qdl-sabresd: Use IMX6QDL_CLK_CKO define Use IMX6QDL_CLK_CKO definition instead of its hard coded clock number for better readability. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-10-20 21:02:13 +08:00
clocks = <&clks IMX6QDL_CLK_CKO>;
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support Add WM8962 CODEC support and enable its parent I2C bus. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-13 19:51:01 +08:00
DCVDD-supply = <&reg_audio>;
DBVDD-supply = <&reg_audio>;
AVDD-supply = <&reg_audio>;
CPVDD-supply = <&reg_audio>;
MICVDD-supply = <&reg_audio>;
PLLVDD-supply = <&reg_audio>;
SPKVDD1-supply = <&reg_audio>;
SPKVDD2-supply = <&reg_audio>;
gpio-cfg = <
0x0000 /* 0:Default */
0x0000 /* 1:Default */
0x0013 /* 2:FN_DMICCLK */
0x0000 /* 3:Default */
0x8014 /* 4:FN_DMICCDAT */
0x0000 /* 5:Default */
>;
};
};
ARM: dts: imx6qdl-sabresd: Add PFUZE100 support mx6 sabresd boards have Freescale PFUZE100 regulator, so add support for it. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-24 11:04:49 +08:00
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pmic: pfuze100@08 {
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
ARM: dts: imx: Add basic dts support for imx6qp SOC The i.MX6Quad Plus processor is an high performance SOC of i.MX6 family. It has enhanced graphics performance and increased overall memory bandwidth compared to i.MX6Q. Most of the design are same as i.MX6Quad/Dual, so code for i.MX6Quad can be resued by this chip. The revision number is identied as i.MX6Q Rev2.0, but actually it is a new chip, as we did many change to the overall architecture. This patch adds basic dtsi file support for the new i.MX6Quad Plus processor. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-02 18:01:35 +08:00
regulator-ramp-delay = <6250>;
ARM: dts: imx6qdl-sabresd: Add PFUZE100 support mx6 sabresd boards have Freescale PFUZE100 regulator, so add support for it. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-24 11:04:49 +08:00
};
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
};
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
vgen4_reg: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
};
ARM: dts: imx6qdl-sabresd: Add touchscreen support mx6 sabresd boards have a egalax touchscreen controller connected via I2C3. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-25 04:20:03 +08:00
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_i2c3>;
ARM: dts: imx6qdl-sabresd: Add touchscreen support mx6 sabresd boards have a egalax touchscreen controller connected via I2C3. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-25 04:20:03 +08:00
status = "okay";
egalax_ts@04 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
interrupt-parent = <&gpio6>;
interrupts = <7 2>;
wakeup-gpios = <&gpio6 7 0>;
};
};
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 13:58:36 +08:00
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
imx6qdl-sabresd {
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 13:58:36 +08:00
pinctrl_hog: hoggrp {
fsl,pins = <
ARM: dts: imx6qdl-sabresd: Configure the pins locally Passing '0x80000000' to the pin configuration means that kernel will skip the IOMUXC_SW_PAD_CTL configuration and will use whathever values come from the bootloader. Instead of relying on the bootloader setup, let's configure it in the kernel to have predictable settings. '0x1b0b0' is the default POR value for all these pins and has also been verified that the pins are using this value by manually inspecting the IOMUXC_SW_PAD_CTL registers, so no functional change has been made. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-05 20:46:10 +08:00
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 13:58:36 +08:00
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
ARM: dts: imx6qdl-sabresd: Configure the pins locally Passing '0x80000000' to the pin configuration means that kernel will skip the IOMUXC_SW_PAD_CTL configuration and will use whathever values come from the bootloader. Instead of relying on the bootloader setup, let's configure it in the kernel to have predictable settings. '0x1b0b0' is the default POR value for all these pins and has also been verified that the pins are using this value by manually inspecting the IOMUXC_SW_PAD_CTL registers, so no functional change has been made. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-05 20:46:10 +08:00
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 13:58:36 +08:00
>;
};
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl_audmux: audmuxgrp {
fsl,pins = <
ARM: dts: imx: specify the value of audmux pinctrl instead of 0x80000000 We must specify the value of audmux pinctrl if we want to use pinctrl_pm(). Thus change bypass value 0x80000000 to what we exactly need. This patch also seperately unset PUE bit for TXD so that IOMUX won't pull up/down the pin after turning into tristate. When we use SSI normal mode to playback monaural audio via I2S signal, there'd be a pulled curve occur to its signal at the second slot if setting PUE bit for TXD. And it will make the second channel to play a constant noise. So by keeping the signal level in the second slot, we can get a constant high level signal (-1) or a low level one (0). Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-08 10:14:28 +08:00
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
ARM: dts: imx6qdl-sabresd: Configure the ECSPI1 chip select pin GPIO4_9 is used as ECSPI1 chip select and it needs to be configured as GPIO. Configure the pin functionality explicitly in the dts file instead of relying on the fact that it comes configured as GPIO from POR or from the bootloader. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-15 03:53:55 +08:00
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
ARM: dts: imx6qdl-sabresd: Add power key support This patch adds support for imx6qdl-sabresd board's power key, the key is named "SW1" on board, press it can wake up system from suspend. Add a new pinctrl entry for gpio keys and move all gpio keys pin to this entry. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 05:07:24 +08:00
pinctrl_gpio_keys: gpio_keysgrp {
fsl,pins = <
ARM: dts: imx6qdl-sabresd: Configure the pins locally Passing '0x80000000' to the pin configuration means that kernel will skip the IOMUXC_SW_PAD_CTL configuration and will use whathever values come from the bootloader. Instead of relying on the bootloader setup, let's configure it in the kernel to have predictable settings. '0x1b0b0' is the default POR value for all these pins and has also been verified that the pins are using this value by manually inspecting the IOMUXC_SW_PAD_CTL registers, so no functional change has been made. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-05 20:46:10 +08:00
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
ARM: dts: imx6qdl-sabresd: Add power key support This patch adds support for imx6qdl-sabresd board's power key, the key is named "SW1" on board, press it can wake up system from suspend. Add a new pinctrl entry for gpio keys and move all gpio keys pin to this entry. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 05:07:24 +08:00
>;
};
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
>;
};
ARM: dts: imx6qdl-sabresd: Add PFUZE100 support mx6 sabresd boards have Freescale PFUZE100 regulator, so add support for it. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-24 11:04:49 +08:00
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
ARM: dts: imx6qdl-sabresd: Add PCIe support Add support for the PCI express bus available on MX6 SabreSDP. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-04-22 04:56:49 +08:00
pinctrl_pcie: pciegrp {
fsl,pins = <
ARM: dts: imx6qdl-sabresd: Configure the pins locally Passing '0x80000000' to the pin configuration means that kernel will skip the IOMUXC_SW_PAD_CTL configuration and will use whathever values come from the bootloader. Instead of relying on the bootloader setup, let's configure it in the kernel to have predictable settings. '0x1b0b0' is the default POR value for all these pins and has also been verified that the pins are using this value by manually inspecting the IOMUXC_SW_PAD_CTL registers, so no functional change has been made. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-05 20:46:10 +08:00
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
ARM: dts: imx6qdl-sabresd: Add PCIe support Add support for the PCI express bus available on MX6 SabreSDP. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-04-22 04:56:49 +08:00
>;
};
ARM: dts: imx6qdl-sabresd: add always on pcie regulator Everything in the PCI specification assumes devices to be enumerable on startup. This is only possible if they have power available. A future improvement may allow this regulator to be switched off for D3hot and D3cold power states, but there is a lot of work to do the pcie host controller side for this to work. To keep things simple always enable the regulator for now. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-24 01:29:11 +08:00
pinctrl_pcie_reg: pciereggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
>;
};
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
ARM: dts: imx6qdl-sabresd: Add USDHC4 support USDHC4 is connected to a DDR MMC. Add support for it. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-08 22:10:56 +08:00
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
>;
};
ARM: dts: imx6qdl-sabresd: Use WDOG_B pin reset imx6qdl-sabresd has WDOG2_B pin connected to the PMIC. Pass the 'fsl,ext-reset-output' property so that the watchdog can trigger a system POR reset via the PMIC. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-14 09:07:56 +08:00
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
>;
};
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 13:58:36 +08:00
};
ARM: dts: imx6qdl-sabresd.dtsi: Add red led Make the red gpio led available to the user. This can be toggled with the sysfs for example, or used as a heartbeat or mmc activity light by changing the trigger. Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-06 02:58:39 +08:00
gpio_leds {
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
ARM: dts: imx6qdl-sabresd: Configure the pins locally Passing '0x80000000' to the pin configuration means that kernel will skip the IOMUXC_SW_PAD_CTL configuration and will use whathever values come from the bootloader. Instead of relying on the bootloader setup, let's configure it in the kernel to have predictable settings. '0x1b0b0' is the default POR value for all these pins and has also been verified that the pins are using this value by manually inspecting the IOMUXC_SW_PAD_CTL registers, so no functional change has been made. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-05 20:46:10 +08:00
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
ARM: dts: imx6qdl-sabresd.dtsi: Add red led Make the red gpio led available to the user. This can be toggled with the sysfs for example, or used as a heartbeat or mmc activity light by changing the trigger. Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-06 02:58:39 +08:00
>;
};
};
ARM: dts: imx: share pad macro names between imx6q and imx6dl The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-11 13:58:36 +08:00
};
ARM: dts: imx: add LVDS panel for imx6qdl-sabresd Add HannStar HSD100PXN1 XGA panel support on LVDS1 port of imx6qdl-sabresd board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-16 22:15:18 +08:00
&ldb {
status = "okay";
lvds-channel@1 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
ARM: dts: imx6qdl-sabresd: Pass the hannstar panel compatible string It is preferred to use the panel compatible string rather than passing the LCD timings in the device tree. So pass the "hannstar,hsd100pxn1" compatible string to describe the LVDS panel on this board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-03-29 01:10:48 +08:00
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
ARM: dts: imx: add LVDS panel for imx6qdl-sabresd Add HannStar HSD100PXN1 XGA panel support on LVDS1 port of imx6qdl-sabresd board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-07-16 22:15:18 +08:00
};
};
};
};
ARM: dts: imx6qdl-sabresd: Add PCIe support Add support for the PCI express bus available on MX6 SabreSDP. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-04-22 04:56:49 +08:00
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
ARM: dts: imx6qdl-sabresd: Pass the correct PCI reset polarity The PCI reset GPIO is active low, so represent it with the GPIO_ACTIVE_LOW flag. Even though the imx6 PCI driver will not take the polarity into account in this case, it is better to provide a correct description in device-tree. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-06 10:00:47 +08:00
reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
ARM: dts: imx6qdl-sabresd: Add PCIe support Add support for the PCI express bus available on MX6 SabreSDP. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-04-22 04:56:49 +08:00
status = "okay";
};
ARM: dts: imx6qdl-sabresd: Add backlight support for lvds This patch adds support for lvds backlight on boards i.MX6q-SabreSD and i.MX6dl-SabreSD Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-12 03:48:16 +08:00
&pwm1 {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_pwm1>;
ARM: dts: imx6qdl-sabresd: Add backlight support for lvds This patch adds support for lvds backlight on boards i.MX6q-SabreSD and i.MX6dl-SabreSD Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-12 03:48:16 +08:00
status = "okay";
};
ARM: dts: imx6: add pm_power_off support for i.mx6 chips All chips of i.mx6 can be powered off by programming SNVS. For example : On i.mx6q-sabresd board, PMIC_ON_REQ connect with external pmic ON/OFF pin, that will cause the whole PMIC powered off except VSNVS. And system can restart once PMIC_ON_REQ goes high by push POWRER key. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-11-12 16:20:37 +08:00
&snvs_poweroff {
status = "okay";
};
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX Enable SSI2 and its pin configuration in AUDMUX. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-14 13:19:57 +08:00
&ssi2 {
status = "okay";
};
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
&uart1 {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_uart1>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
status = "okay";
};
&usbh1 {
ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator We enabled USB host 1, so host 1's vbus should be on to let host 1 work. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-12 16:46:24 +08:00
vbus-supply = <&reg_usb_h1_vbus>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_usbotg>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
disable-over-current;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_usdhc2>;
ARM: dts: imx6qdl-sabresd: SDHC ports are 8 bit-wide On imx6qdl-sabresd the SDHC2 and SDHC3 are 8 bit-wide, so pass the bus-width property to reflect that. Otherwise the mmc driver will operate with the default bus-width value of 4. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-18 00:46:23 +08:00
bus-width = <8>;
dts: imx6: fix sd card gpio polarity specified in device tree cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios should be changed to GPIO_ACTIVE_HIGH. Otherwise, the SD may not work properly due to wrong polarity inversion specified in DT after switch to common parsing function mmc_of_parse(). Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-22 20:53:02 +08:00
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
ARM: dts: imx6qdl: make pinctrl nodes board specific Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-10-23 15:36:09 +08:00
pinctrl-0 = <&pinctrl_usdhc3>;
ARM: dts: imx6qdl-sabresd: SDHC ports are 8 bit-wide On imx6qdl-sabresd the SDHC2 and SDHC3 are 8 bit-wide, so pass the bus-width property to reflect that. Otherwise the mmc driver will operate with the default bus-width value of 4. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-09-18 00:46:23 +08:00
bus-width = <8>;
dts: imx6: fix sd card gpio polarity specified in device tree cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios should be changed to GPIO_ACTIVE_HIGH. Otherwise, the SD may not work properly due to wrong polarity inversion specified in DT after switch to common parsing function mmc_of_parse(). Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-22 20:53:02 +08:00
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
ARM: dts: imx: make sabreauto and sabresd common The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 13:15:16 +08:00
status = "okay";
};
ARM: dts: imx6qdl-sabresd: Add USDHC4 support USDHC4 is connected to a DDR MMC. Add support for it. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-08 22:10:56 +08:00
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <8>;
non-removable;
no-1-8-v;
status = "okay";
};
ARM: dts: imx6qdl-sabresd: Use WDOG_B pin reset imx6qdl-sabresd has WDOG2_B pin connected to the PMIC. Pass the 'fsl,ext-reset-output' property so that the watchdog can trigger a system POR reset via the PMIC. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-14 09:07:56 +08:00
&wdog1 {
status = "disabled";
};
&wdog2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};
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