2022-11-14 13:40:37 +08:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2022-08-17 11:46:28 +08:00
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/*
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* AMD Processor P-state Frequency Driver Unit Test
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*
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* Copyright (C) 2022 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Author: Meng Li <li.meng@amd.com>
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*
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* The AMD P-State Unit Test is a test module for testing the amd-pstate
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* driver. 1) It can help all users to verify their processor support
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* (SBIOS/Firmware or Hardware). 2) Kernel can have a basic function
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* test to avoid the kernel regression during the update. 3) We can
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* introduce more functional or performance tests to align the result
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* together, it will benefit power and performance scale optimization.
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*
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* This driver implements basic framework with plans to enhance it with
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* additional test cases to improve the depth and coverage of the test.
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*
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* See Documentation/admin-guide/pm/amd-pstate.rst Unit Tests for
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* amd-pstate to get more detail.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/fs.h>
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#include <linux/amd-pstate.h>
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#include <acpi/cppc_acpi.h>
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/*
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* Abbreviations:
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* amd_pstate_ut: used as a shortform for AMD P-State unit test.
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* It helps to keep variable names smaller, simpler
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*/
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enum amd_pstate_ut_result {
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AMD_PSTATE_UT_RESULT_PASS,
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AMD_PSTATE_UT_RESULT_FAIL,
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};
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struct amd_pstate_ut_struct {
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const char *name;
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void (*func)(u32 index);
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enum amd_pstate_ut_result result;
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};
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/*
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* Kernel module for testing the AMD P-State unit test
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*/
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static void amd_pstate_ut_acpi_cpc_valid(u32 index);
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static void amd_pstate_ut_check_enabled(u32 index);
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static void amd_pstate_ut_check_perf(u32 index);
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static void amd_pstate_ut_check_freq(u32 index);
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static struct amd_pstate_ut_struct amd_pstate_ut_cases[] = {
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{"amd_pstate_ut_acpi_cpc_valid", amd_pstate_ut_acpi_cpc_valid },
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{"amd_pstate_ut_check_enabled", amd_pstate_ut_check_enabled },
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{"amd_pstate_ut_check_perf", amd_pstate_ut_check_perf },
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{"amd_pstate_ut_check_freq", amd_pstate_ut_check_freq }
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};
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static bool get_shared_mem(void)
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{
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bool result = false;
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char path[] = "/sys/module/amd_pstate/parameters/shared_mem";
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char buf[5] = {0};
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struct file *filp = NULL;
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loff_t pos = 0;
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ssize_t ret;
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if (!boot_cpu_has(X86_FEATURE_CPPC)) {
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2022-09-06 10:48:26 +08:00
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filp = filp_open(path, O_RDONLY, 0);
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2022-08-17 11:46:28 +08:00
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if (IS_ERR(filp))
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pr_err("%s unable to open %s file!\n", __func__, path);
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else {
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ret = kernel_read(filp, &buf, sizeof(buf), &pos);
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if (ret < 0)
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pr_err("%s read %s file fail ret=%ld!\n",
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__func__, path, (long)ret);
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filp_close(filp, NULL);
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}
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if ('Y' == *buf)
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result = true;
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}
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return result;
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}
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/*
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* check the _CPC object is present in SBIOS.
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*/
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static void amd_pstate_ut_acpi_cpc_valid(u32 index)
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{
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if (acpi_cpc_valid())
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
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else {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s the _CPC object is not present in SBIOS!\n", __func__);
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}
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}
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static void amd_pstate_ut_pstate_enable(u32 index)
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{
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int ret = 0;
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u64 cppc_enable = 0;
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ret = rdmsrl_safe(MSR_AMD_CPPC_ENABLE, &cppc_enable);
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if (ret) {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s rdmsrl_safe MSR_AMD_CPPC_ENABLE ret=%d error!\n", __func__, ret);
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return;
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}
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if (cppc_enable)
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
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else {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s amd pstate must be enabled!\n", __func__);
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}
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}
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/*
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* check if amd pstate is enabled
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*/
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static void amd_pstate_ut_check_enabled(u32 index)
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{
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if (get_shared_mem())
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
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else
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amd_pstate_ut_pstate_enable(index);
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}
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/*
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* check if performance values are reasonable.
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* highest_perf >= nominal_perf > lowest_nonlinear_perf > lowest_perf > 0
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*/
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static void amd_pstate_ut_check_perf(u32 index)
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{
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int cpu = 0, ret = 0;
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u32 highest_perf = 0, nominal_perf = 0, lowest_nonlinear_perf = 0, lowest_perf = 0;
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u64 cap1 = 0;
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struct cppc_perf_caps cppc_perf;
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struct cpufreq_policy *policy = NULL;
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struct amd_cpudata *cpudata = NULL;
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highest_perf = amd_get_highest_perf();
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for_each_possible_cpu(cpu) {
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policy = cpufreq_cpu_get(cpu);
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if (!policy)
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break;
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cpudata = policy->driver_data;
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if (get_shared_mem()) {
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ret = cppc_get_perf_caps(cpu, &cppc_perf);
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if (ret) {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cppc_get_perf_caps ret=%d error!\n", __func__, ret);
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return;
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}
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nominal_perf = cppc_perf.nominal_perf;
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lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;
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lowest_perf = cppc_perf.lowest_perf;
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} else {
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ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1);
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if (ret) {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s read CPPC_CAP1 ret=%d error!\n", __func__, ret);
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return;
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}
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nominal_perf = AMD_CPPC_NOMINAL_PERF(cap1);
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lowest_nonlinear_perf = AMD_CPPC_LOWNONLIN_PERF(cap1);
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lowest_perf = AMD_CPPC_LOWEST_PERF(cap1);
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}
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if ((highest_perf != READ_ONCE(cpudata->highest_perf)) ||
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(nominal_perf != READ_ONCE(cpudata->nominal_perf)) ||
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(lowest_nonlinear_perf != READ_ONCE(cpudata->lowest_nonlinear_perf)) ||
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(lowest_perf != READ_ONCE(cpudata->lowest_perf))) {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cpu%d highest=%d %d nominal=%d %d lowest_nonlinear=%d %d lowest=%d %d, they should be equal!\n",
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__func__, cpu, highest_perf, cpudata->highest_perf,
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nominal_perf, cpudata->nominal_perf,
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lowest_nonlinear_perf, cpudata->lowest_nonlinear_perf,
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lowest_perf, cpudata->lowest_perf);
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return;
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}
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if (!((highest_perf >= nominal_perf) &&
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(nominal_perf > lowest_nonlinear_perf) &&
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(lowest_nonlinear_perf > lowest_perf) &&
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(lowest_perf > 0))) {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cpu%d highest=%d >= nominal=%d > lowest_nonlinear=%d > lowest=%d > 0, the formula is incorrect!\n",
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__func__, cpu, highest_perf, nominal_perf,
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lowest_nonlinear_perf, lowest_perf);
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return;
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}
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}
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
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}
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/*
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* Check if frequency values are reasonable.
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* max_freq >= nominal_freq > lowest_nonlinear_freq > min_freq > 0
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* check max freq when set support boost mode.
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*/
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static void amd_pstate_ut_check_freq(u32 index)
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{
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int cpu = 0;
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struct cpufreq_policy *policy = NULL;
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struct amd_cpudata *cpudata = NULL;
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for_each_possible_cpu(cpu) {
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policy = cpufreq_cpu_get(cpu);
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if (!policy)
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break;
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cpudata = policy->driver_data;
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if (!((cpudata->max_freq >= cpudata->nominal_freq) &&
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(cpudata->nominal_freq > cpudata->lowest_nonlinear_freq) &&
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(cpudata->lowest_nonlinear_freq > cpudata->min_freq) &&
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(cpudata->min_freq > 0))) {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cpu%d max=%d >= nominal=%d > lowest_nonlinear=%d > min=%d > 0, the formula is incorrect!\n",
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__func__, cpu, cpudata->max_freq, cpudata->nominal_freq,
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cpudata->lowest_nonlinear_freq, cpudata->min_freq);
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return;
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}
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if (cpudata->min_freq != policy->min) {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cpu%d cpudata_min_freq=%d policy_min=%d, they should be equal!\n",
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__func__, cpu, cpudata->min_freq, policy->min);
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return;
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}
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if (cpudata->boost_supported) {
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if ((policy->max == cpudata->max_freq) ||
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(policy->max == cpudata->nominal_freq))
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
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else {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cpu%d policy_max=%d should be equal cpu_max=%d or cpu_nominal=%d !\n",
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__func__, cpu, policy->max, cpudata->max_freq,
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cpudata->nominal_freq);
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return;
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}
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} else {
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
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pr_err("%s cpu%d must support boost!\n", __func__, cpu);
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return;
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}
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}
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amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS;
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}
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static int __init amd_pstate_ut_init(void)
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{
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u32 i = 0, arr_size = ARRAY_SIZE(amd_pstate_ut_cases);
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for (i = 0; i < arr_size; i++) {
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amd_pstate_ut_cases[i].func(i);
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switch (amd_pstate_ut_cases[i].result) {
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case AMD_PSTATE_UT_RESULT_PASS:
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pr_info("%-4d %-20s\t success!\n", i+1, amd_pstate_ut_cases[i].name);
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break;
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case AMD_PSTATE_UT_RESULT_FAIL:
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default:
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pr_info("%-4d %-20s\t fail!\n", i+1, amd_pstate_ut_cases[i].name);
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break;
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}
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}
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return 0;
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}
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static void __exit amd_pstate_ut_exit(void)
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{
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}
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module_init(amd_pstate_ut_init);
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module_exit(amd_pstate_ut_exit);
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MODULE_AUTHOR("Meng Li <li.meng@amd.com>");
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MODULE_DESCRIPTION("AMD P-state driver Test module");
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MODULE_LICENSE("GPL");
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