2007-12-05 01:41:54 +08:00
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/*
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2015-12-15 04:22:09 +08:00
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* HPE WatchDog Driver
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2007-12-05 01:41:54 +08:00
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* based on
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*
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* SoftDog 0.05: A Software Watchdog Device
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*
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2018-02-26 11:22:19 +08:00
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* (c) Copyright 2018 Hewlett Packard Enterprise Development LP
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2015-12-15 04:22:09 +08:00
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* Thomas Mingarelli <thomas.mingarelli@hpe.com>
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2007-12-05 01:41:54 +08:00
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation
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*
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*/
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2012-02-16 07:06:19 +08:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2007-12-05 01:41:54 +08:00
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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2011-10-06 20:20:27 +08:00
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#include <asm/nmi.h>
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2007-12-05 01:41:54 +08:00
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2018-02-26 11:22:27 +08:00
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#define HPWDT_VERSION "2.0.0"
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2010-06-03 06:23:39 +08:00
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#define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
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2010-06-03 06:23:40 +08:00
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#define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
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#define HPWDT_MAX_TIMER TICKS_TO_SECS(65535)
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2010-07-28 07:50:54 +08:00
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#define DEFAULT_MARGIN 30
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2018-02-26 11:22:25 +08:00
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#define PRETIMEOUT_SEC 9
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2010-07-28 07:50:54 +08:00
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2018-02-26 11:22:23 +08:00
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static bool ilo5;
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2010-07-28 07:50:54 +08:00
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static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
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2012-03-05 23:51:11 +08:00
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static bool nowayout = WATCHDOG_NOWAYOUT;
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2018-02-26 11:22:25 +08:00
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static bool pretimeout = IS_ENABLED(CONFIG_HPWDT_NMI_DECODING);
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2010-07-28 07:50:54 +08:00
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static void __iomem *pci_mem_addr; /* the PCI-memory address */
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2017-10-24 06:46:17 +08:00
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static unsigned long __iomem *hpwdt_nmistat;
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2010-07-28 07:50:54 +08:00
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static unsigned long __iomem *hpwdt_timer_reg;
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static unsigned long __iomem *hpwdt_timer_con;
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2013-12-03 07:30:22 +08:00
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static const struct pci_device_id hpwdt_devices[] = {
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2010-07-28 07:50:57 +08:00
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{ PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
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{ PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
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2010-07-28 07:50:54 +08:00
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{0}, /* terminate list */
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};
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MODULE_DEVICE_TABLE(pci, hpwdt_devices);
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2007-12-05 01:41:54 +08:00
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/*
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* Watchdog operations
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*/
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2018-02-26 11:22:22 +08:00
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static int hpwdt_start(struct watchdog_device *wdd)
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2007-12-05 01:41:54 +08:00
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{
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2018-02-26 11:22:25 +08:00
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int control = 0x81 | (pretimeout ? 0x4 : 0);
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int reload = SECS_TO_TICKS(wdd->timeout);
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2018-02-26 11:22:22 +08:00
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2018-02-26 11:22:26 +08:00
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dev_dbg(wdd->parent, "start watchdog 0x%08x:0x%02x\n", reload, control);
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2007-12-05 01:41:54 +08:00
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iowrite16(reload, hpwdt_timer_reg);
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2018-02-26 11:22:25 +08:00
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iowrite8(control, hpwdt_timer_con);
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2018-02-26 11:22:22 +08:00
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return 0;
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2007-12-05 01:41:54 +08:00
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}
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static void hpwdt_stop(void)
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{
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unsigned long data;
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2018-02-26 11:22:26 +08:00
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pr_debug("stop watchdog\n");
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2012-04-03 13:37:01 +08:00
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data = ioread8(hpwdt_timer_con);
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2007-12-05 01:41:54 +08:00
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data &= 0xFE;
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2012-04-03 13:37:01 +08:00
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iowrite8(data, hpwdt_timer_con);
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2007-12-05 01:41:54 +08:00
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}
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2018-02-26 11:22:22 +08:00
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static int hpwdt_stop_core(struct watchdog_device *wdd)
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2007-12-05 01:41:54 +08:00
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{
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2018-02-26 11:22:22 +08:00
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hpwdt_stop();
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return 0;
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2007-12-05 01:41:54 +08:00
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}
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2018-02-26 11:22:22 +08:00
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static int hpwdt_ping(struct watchdog_device *wdd)
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2007-12-05 01:41:54 +08:00
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{
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2018-02-26 11:22:25 +08:00
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int reload = SECS_TO_TICKS(wdd->timeout);
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2018-02-26 11:22:26 +08:00
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dev_dbg(wdd->parent, "ping watchdog 0x%08x\n", reload);
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2018-02-26 11:22:22 +08:00
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iowrite16(reload, hpwdt_timer_reg);
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2018-02-26 11:22:25 +08:00
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2007-12-05 01:41:54 +08:00
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return 0;
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}
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2018-02-26 11:22:22 +08:00
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static unsigned int hpwdt_gettimeleft(struct watchdog_device *wdd)
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2010-06-03 06:23:41 +08:00
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{
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return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
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}
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2018-02-26 11:22:22 +08:00
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static int hpwdt_settimeout(struct watchdog_device *wdd, unsigned int val)
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{
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2018-02-26 11:22:26 +08:00
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dev_dbg(wdd->parent, "set_timeout = %d\n", val);
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2018-02-26 11:22:22 +08:00
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wdd->timeout = val;
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2018-02-26 11:22:25 +08:00
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if (val <= wdd->pretimeout) {
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2018-02-26 11:22:26 +08:00
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dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n");
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2018-02-26 11:22:25 +08:00
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wdd->pretimeout = 0;
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pretimeout = 0;
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if (watchdog_active(wdd))
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hpwdt_start(wdd);
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}
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2018-02-26 11:22:22 +08:00
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hpwdt_ping(wdd);
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return 0;
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}
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2017-12-07 05:02:37 +08:00
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#ifdef CONFIG_HPWDT_NMI_DECODING
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2018-02-26 11:22:25 +08:00
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static int hpwdt_set_pretimeout(struct watchdog_device *wdd, unsigned int req)
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{
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unsigned int val = 0;
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2018-02-26 11:22:26 +08:00
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dev_dbg(wdd->parent, "set_pretimeout = %d\n", req);
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2018-02-26 11:22:25 +08:00
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if (req) {
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val = PRETIMEOUT_SEC;
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if (val >= wdd->timeout)
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return -EINVAL;
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}
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2018-02-26 11:22:26 +08:00
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if (val != req)
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dev_dbg(wdd->parent, "Rounding pretimeout to: %d\n", val);
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2018-02-26 11:22:25 +08:00
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wdd->pretimeout = val;
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pretimeout = !!val;
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if (watchdog_active(wdd))
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hpwdt_start(wdd);
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return 0;
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}
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2017-10-24 06:46:17 +08:00
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static int hpwdt_my_nmi(void)
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{
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return ioread8(hpwdt_nmistat) & 0x6;
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}
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2008-07-16 03:40:41 +08:00
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/*
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* NMI Handler
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*/
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2011-10-01 03:06:21 +08:00
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static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
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2008-07-16 03:40:41 +08:00
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{
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2018-02-26 11:22:21 +08:00
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unsigned int mynmi = hpwdt_my_nmi();
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static char panic_msg[] =
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"00: An NMI occurred. Depending on your system the reason "
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"for the NMI is logged in any one of the following resources:\n"
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"1. Integrated Management Log (IML)\n"
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"2. OA Syslog\n"
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"3. OA Forward Progress Log\n"
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"4. iLO Event Log";
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2018-05-04 05:00:55 +08:00
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if (ilo5 && ulReason == NMI_UNKNOWN && !mynmi)
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2017-10-24 06:46:17 +08:00
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return NMI_DONE;
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2018-02-26 11:22:25 +08:00
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if (ilo5 && !pretimeout)
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return NMI_DONE;
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2018-02-26 11:22:24 +08:00
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hpwdt_stop();
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2011-08-10 06:27:26 +08:00
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2018-02-26 11:22:21 +08:00
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hex_byte_pack(panic_msg, mynmi);
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nmi_panic(regs, panic_msg);
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2011-07-26 21:05:53 +08:00
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2016-03-23 05:27:24 +08:00
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return NMI_HANDLED;
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2008-07-16 03:40:41 +08:00
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}
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2010-07-28 07:51:02 +08:00
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#endif /* CONFIG_HPWDT_NMI_DECODING */
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2008-07-16 03:40:41 +08:00
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2007-12-05 01:41:54 +08:00
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2009-12-27 02:55:22 +08:00
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static const struct watchdog_info ident = {
|
2018-02-26 11:22:25 +08:00
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.options = WDIOF_PRETIMEOUT |
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WDIOF_SETTIMEOUT |
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2007-12-05 01:41:54 +08:00
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
|
2015-12-15 04:22:09 +08:00
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.identity = "HPE iLO2+ HW Watchdog Timer",
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2007-12-05 01:41:54 +08:00
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};
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/*
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* Kernel interfaces
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*/
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2018-02-26 11:22:22 +08:00
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static const struct watchdog_ops hpwdt_ops = {
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.owner = THIS_MODULE,
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.start = hpwdt_start,
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.stop = hpwdt_stop_core,
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.ping = hpwdt_ping,
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.set_timeout = hpwdt_settimeout,
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.get_timeleft = hpwdt_gettimeleft,
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2018-02-26 11:22:25 +08:00
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#ifdef CONFIG_HPWDT_NMI_DECODING
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.set_pretimeout = hpwdt_set_pretimeout,
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#endif
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2007-12-05 01:41:54 +08:00
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};
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2018-02-26 11:22:22 +08:00
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static struct watchdog_device hpwdt_dev = {
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.info = &ident,
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.ops = &hpwdt_ops,
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.min_timeout = 1,
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.max_timeout = HPWDT_MAX_TIMER,
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.timeout = DEFAULT_MARGIN,
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2018-02-26 11:22:25 +08:00
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#ifdef CONFIG_HPWDT_NMI_DECODING
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.pretimeout = PRETIMEOUT_SEC,
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#endif
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2007-12-05 01:41:54 +08:00
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};
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2018-02-26 11:22:22 +08:00
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2007-12-05 01:41:54 +08:00
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/*
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* Init & Exit
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*/
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2012-11-20 02:21:41 +08:00
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static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
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2010-07-29 02:38:43 +08:00
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{
|
2018-02-26 11:22:20 +08:00
|
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#ifdef CONFIG_HPWDT_NMI_DECODING
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2010-07-29 02:38:43 +08:00
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int retval;
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/*
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2012-03-30 04:11:15 +08:00
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* Only one function can register for NMI_UNKNOWN
|
2010-07-29 02:38:43 +08:00
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*/
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2012-03-30 04:11:15 +08:00
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retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
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2012-03-30 04:11:16 +08:00
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if (retval)
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goto error;
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retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
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if (retval)
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goto error1;
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retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
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if (retval)
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goto error2;
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2010-07-29 02:38:43 +08:00
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dev_info(&dev->dev,
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2018-02-26 11:22:24 +08:00
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"HPE Watchdog Timer Driver: NMI decoding initialized\n");
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2010-07-29 02:38:43 +08:00
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return 0;
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2012-03-30 04:11:16 +08:00
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error2:
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unregister_nmi_handler(NMI_SERR, "hpwdt");
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error1:
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unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
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error:
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dev_warn(&dev->dev,
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|
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"Unable to register a die notifier (err=%d).\n",
|
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retval);
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return retval;
|
2018-02-26 11:22:20 +08:00
|
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#endif /* CONFIG_HPWDT_NMI_DECODING */
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return 0;
|
2010-07-29 02:38:43 +08:00
|
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}
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2011-03-02 11:49:44 +08:00
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static void hpwdt_exit_nmi_decoding(void)
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2010-07-29 02:38:43 +08:00
|
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{
|
2018-02-26 11:22:20 +08:00
|
|
|
#ifdef CONFIG_HPWDT_NMI_DECODING
|
2011-10-01 03:06:21 +08:00
|
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unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
|
2012-06-26 16:27:00 +08:00
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unregister_nmi_handler(NMI_SERR, "hpwdt");
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unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
|
2018-02-26 11:22:20 +08:00
|
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#endif
|
2010-07-28 07:51:02 +08:00
|
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}
|
|
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|
|
2012-11-20 02:21:41 +08:00
|
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static int hpwdt_init_one(struct pci_dev *dev,
|
2008-07-16 03:40:41 +08:00
|
|
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const struct pci_device_id *ent)
|
2007-12-05 01:41:54 +08:00
|
|
|
{
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|
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int retval;
|
|
|
|
|
|
|
|
/*
|
2010-07-28 07:50:57 +08:00
|
|
|
* First let's find out if we are on an iLO2+ server. We will
|
2007-12-05 01:41:54 +08:00
|
|
|
* not run on a legacy ASM box.
|
2008-07-16 03:40:41 +08:00
|
|
|
* So we only support the G5 ProLiant servers and higher.
|
2007-12-05 01:41:54 +08:00
|
|
|
*/
|
2016-09-27 02:57:14 +08:00
|
|
|
if (dev->subsystem_vendor != PCI_VENDOR_ID_HP &&
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|
|
|
dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) {
|
2007-12-05 01:41:54 +08:00
|
|
|
dev_warn(&dev->dev,
|
2010-07-28 07:50:57 +08:00
|
|
|
"This server does not have an iLO2+ ASIC.\n");
|
2007-12-05 01:41:54 +08:00
|
|
|
return -ENODEV;
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|
|
|
}
|
|
|
|
|
2013-08-10 00:31:09 +08:00
|
|
|
/*
|
|
|
|
* Ignore all auxilary iLO devices with the following PCI ID
|
|
|
|
*/
|
2016-09-27 02:57:14 +08:00
|
|
|
if (dev->subsystem_vendor == PCI_VENDOR_ID_HP &&
|
|
|
|
dev->subsystem_device == 0x1979)
|
2013-08-10 00:31:09 +08:00
|
|
|
return -ENODEV;
|
|
|
|
|
2007-12-05 01:41:54 +08:00
|
|
|
if (pci_enable_device(dev)) {
|
|
|
|
dev_warn(&dev->dev,
|
|
|
|
"Not possible to enable PCI Device: 0x%x:0x%x.\n",
|
|
|
|
ent->vendor, ent->device);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
pci_mem_addr = pci_iomap(dev, 1, 0x80);
|
|
|
|
if (!pci_mem_addr) {
|
|
|
|
dev_warn(&dev->dev,
|
2010-07-28 07:50:57 +08:00
|
|
|
"Unable to detect the iLO2+ server memory.\n");
|
2007-12-05 01:41:54 +08:00
|
|
|
retval = -ENOMEM;
|
|
|
|
goto error_pci_iomap;
|
|
|
|
}
|
2017-10-24 06:46:17 +08:00
|
|
|
hpwdt_nmistat = pci_mem_addr + 0x6e;
|
2007-12-05 01:41:54 +08:00
|
|
|
hpwdt_timer_reg = pci_mem_addr + 0x70;
|
|
|
|
hpwdt_timer_con = pci_mem_addr + 0x72;
|
|
|
|
|
2012-08-28 02:52:24 +08:00
|
|
|
/* Make sure that timer is disabled until /dev/watchdog is opened */
|
|
|
|
hpwdt_stop();
|
|
|
|
|
2010-07-29 02:38:43 +08:00
|
|
|
/* Initialize NMI Decoding functionality */
|
|
|
|
retval = hpwdt_init_nmi_decoding(dev);
|
|
|
|
if (retval != 0)
|
|
|
|
goto error_init_nmi_decoding;
|
2007-12-05 01:41:54 +08:00
|
|
|
|
2018-02-26 11:22:22 +08:00
|
|
|
watchdog_set_nowayout(&hpwdt_dev, nowayout);
|
|
|
|
if (watchdog_init_timeout(&hpwdt_dev, soft_margin, NULL))
|
|
|
|
dev_warn(&dev->dev, "Invalid soft_margin: %d.\n", soft_margin);
|
|
|
|
|
|
|
|
hpwdt_dev.parent = &dev->dev;
|
|
|
|
retval = watchdog_register_device(&hpwdt_dev);
|
2007-12-05 01:41:54 +08:00
|
|
|
if (retval < 0) {
|
2018-02-26 11:22:22 +08:00
|
|
|
dev_err(&dev->dev, "watchdog register failed: %d.\n", retval);
|
|
|
|
goto error_wd_register;
|
2007-12-05 01:41:54 +08:00
|
|
|
}
|
|
|
|
|
2015-12-15 04:22:09 +08:00
|
|
|
dev_info(&dev->dev, "HPE Watchdog Timer Driver: %s"
|
2010-07-29 02:38:43 +08:00
|
|
|
", timer margin: %d seconds (nowayout=%d).\n",
|
2018-02-26 11:22:22 +08:00
|
|
|
HPWDT_VERSION, hpwdt_dev.timeout, nowayout);
|
|
|
|
|
2018-02-26 11:22:23 +08:00
|
|
|
if (dev->subsystem_vendor == PCI_VENDOR_ID_HP_3PAR)
|
|
|
|
ilo5 = true;
|
|
|
|
|
2007-12-05 01:41:54 +08:00
|
|
|
return 0;
|
|
|
|
|
2018-02-26 11:22:22 +08:00
|
|
|
error_wd_register:
|
2010-07-29 02:38:43 +08:00
|
|
|
hpwdt_exit_nmi_decoding();
|
|
|
|
error_init_nmi_decoding:
|
2007-12-05 01:41:54 +08:00
|
|
|
pci_iounmap(dev, pci_mem_addr);
|
|
|
|
error_pci_iomap:
|
|
|
|
pci_disable_device(dev);
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2012-11-20 02:26:24 +08:00
|
|
|
static void hpwdt_exit(struct pci_dev *dev)
|
2007-12-05 01:41:54 +08:00
|
|
|
{
|
|
|
|
if (!nowayout)
|
|
|
|
hpwdt_stop();
|
|
|
|
|
2018-02-26 11:22:22 +08:00
|
|
|
watchdog_unregister_device(&hpwdt_dev);
|
2010-07-29 02:38:43 +08:00
|
|
|
hpwdt_exit_nmi_decoding();
|
2007-12-05 01:41:54 +08:00
|
|
|
pci_iounmap(dev, pci_mem_addr);
|
|
|
|
pci_disable_device(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct pci_driver hpwdt_driver = {
|
|
|
|
.name = "hpwdt",
|
|
|
|
.id_table = hpwdt_devices,
|
|
|
|
.probe = hpwdt_init_one,
|
2012-11-20 02:21:12 +08:00
|
|
|
.remove = hpwdt_exit,
|
2007-12-05 01:41:54 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Tom Mingarelli");
|
2018-02-26 11:22:19 +08:00
|
|
|
MODULE_DESCRIPTION("hpe watchdog driver");
|
2007-12-05 01:41:54 +08:00
|
|
|
MODULE_LICENSE("GPL");
|
2009-03-03 08:17:16 +08:00
|
|
|
MODULE_VERSION(HPWDT_VERSION);
|
2007-12-05 01:41:54 +08:00
|
|
|
|
|
|
|
module_param(soft_margin, int, 0);
|
|
|
|
MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
|
|
|
|
|
2012-03-05 23:51:11 +08:00
|
|
|
module_param(nowayout, bool, 0);
|
2007-12-05 01:41:54 +08:00
|
|
|
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
|
|
|
|
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
|
|
|
|
|
2018-02-26 11:22:25 +08:00
|
|
|
#ifdef CONFIG_HPWDT_NMI_DECODING
|
|
|
|
module_param(pretimeout, bool, 0);
|
|
|
|
MODULE_PARM_DESC(pretimeout, "Watchdog pretimeout enabled");
|
|
|
|
#endif
|
|
|
|
|
2012-05-04 20:43:25 +08:00
|
|
|
module_pci_driver(hpwdt_driver);
|