2018-06-13 05:26:43 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2020-07-02 22:46:10 +08:00
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/*
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2018-06-13 05:26:43 +08:00
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* dwc3-haps.c - Synopsys HAPS PCI Specific glue layer
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*
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* Copyright (C) 2018 Synopsys, Inc.
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*
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* Authors: Thinh Nguyen <thinhn@synopsys.com>,
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* John Youn <johnyoun@synopsys.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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/**
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* struct dwc3_haps - Driver private structure
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* @dwc3: child dwc3 platform_device
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* @pci: our link to PCI bus
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*/
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struct dwc3_haps {
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struct platform_device *dwc3;
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struct pci_dev *pci;
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};
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static const struct property_entry initial_properties[] = {
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PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
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PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
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PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
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PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
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{ },
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};
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2021-02-04 22:17:08 +08:00
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static const struct software_node dwc3_haps_swnode = {
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.properties = initial_properties,
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};
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2018-06-13 05:26:43 +08:00
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static int dwc3_haps_probe(struct pci_dev *pci,
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const struct pci_device_id *id)
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{
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struct dwc3_haps *dwc;
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struct device *dev = &pci->dev;
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struct resource res[2];
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int ret;
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ret = pcim_enable_device(pci);
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if (ret) {
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dev_err(dev, "failed to enable pci device\n");
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return -ENODEV;
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}
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pci_set_master(pci);
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dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
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if (!dwc)
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return -ENOMEM;
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dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
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if (!dwc->dwc3)
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return -ENOMEM;
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memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
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res[0].start = pci_resource_start(pci, 0);
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res[0].end = pci_resource_end(pci, 0);
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res[0].name = "dwc_usb3";
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res[0].flags = IORESOURCE_MEM;
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res[1].start = pci->irq;
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res[1].name = "dwc_usb3";
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res[1].flags = IORESOURCE_IRQ;
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ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
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if (ret) {
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dev_err(dev, "couldn't add resources to dwc3 device\n");
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goto err;
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}
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dwc->pci = pci;
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dwc->dwc3->dev.parent = dev;
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2021-02-04 22:17:08 +08:00
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ret = device_add_software_node(&dwc->dwc3->dev, &dwc3_haps_swnode);
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2018-06-13 05:26:43 +08:00
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if (ret)
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goto err;
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ret = platform_device_add(dwc->dwc3);
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if (ret) {
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dev_err(dev, "failed to register dwc3 device\n");
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goto err;
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}
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pci_set_drvdata(pci, dwc);
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return 0;
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err:
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2021-02-04 22:17:08 +08:00
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device_remove_software_node(&dwc->dwc3->dev);
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2018-06-13 05:26:43 +08:00
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platform_device_put(dwc->dwc3);
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return ret;
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}
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static void dwc3_haps_remove(struct pci_dev *pci)
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{
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struct dwc3_haps *dwc = pci_get_drvdata(pci);
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2021-02-04 22:17:08 +08:00
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device_remove_software_node(&dwc->dwc3->dev);
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2018-06-13 05:26:43 +08:00
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platform_device_unregister(dwc->dwc3);
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}
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static const struct pci_device_id dwc3_haps_id_table[] = {
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{
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PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
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PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
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2019-02-07 02:49:26 +08:00
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/*
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* i.MX6QP and i.MX7D platform use a PCIe controller with the
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* same VID and PID as this USB controller. The system may
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* incorrectly match this driver to that PCIe controller. To
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* workaround this, specifically use class type USB to prevent
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* incorrect driver matching.
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*/
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.class = (PCI_CLASS_SERIAL_USB << 8),
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.class_mask = 0xffff00,
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2018-06-13 05:26:43 +08:00
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
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PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
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PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
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},
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{ } /* Terminating Entry */
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};
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MODULE_DEVICE_TABLE(pci, dwc3_haps_id_table);
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static struct pci_driver dwc3_haps_driver = {
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.name = "dwc3-haps",
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.id_table = dwc3_haps_id_table,
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.probe = dwc3_haps_probe,
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.remove = dwc3_haps_remove,
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};
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MODULE_AUTHOR("Thinh Nguyen <thinhn@synopsys.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Synopsys HAPS PCI Glue Layer");
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module_pci_driver(dwc3_haps_driver);
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