2018-05-17 07:49:58 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2016-11-02 03:14:28 +08:00
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/*
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* FPGA Bridge Framework Driver
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*
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* Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
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2017-11-16 04:20:11 +08:00
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* Copyright (C) 2017 Intel Corporation
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2016-11-02 03:14:28 +08:00
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*/
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#include <linux/fpga/fpga-bridge.h>
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#include <linux/idr.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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static DEFINE_IDA(fpga_bridge_ida);
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2023-08-11 15:30:41 +08:00
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static const struct class fpga_bridge_class;
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2016-11-02 03:14:28 +08:00
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/* Lock for adding/removing bridges to linked lists*/
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2020-12-28 21:51:35 +08:00
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static DEFINE_SPINLOCK(bridge_list_lock);
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2016-11-02 03:14:28 +08:00
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/**
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* fpga_bridge_enable - Enable transactions on the bridge
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*
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* @bridge: FPGA bridge
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*
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* Return: 0 for success, error code otherwise.
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*/
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int fpga_bridge_enable(struct fpga_bridge *bridge)
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{
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dev_dbg(&bridge->dev, "enable\n");
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if (bridge->br_ops && bridge->br_ops->enable_set)
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return bridge->br_ops->enable_set(bridge, 1);
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return 0;
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}
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EXPORT_SYMBOL_GPL(fpga_bridge_enable);
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/**
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* fpga_bridge_disable - Disable transactions on the bridge
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*
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* @bridge: FPGA bridge
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*
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* Return: 0 for success, error code otherwise.
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*/
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int fpga_bridge_disable(struct fpga_bridge *bridge)
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{
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dev_dbg(&bridge->dev, "disable\n");
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if (bridge->br_ops && bridge->br_ops->enable_set)
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return bridge->br_ops->enable_set(bridge, 0);
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return 0;
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}
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EXPORT_SYMBOL_GPL(fpga_bridge_disable);
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2017-11-16 04:20:11 +08:00
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static struct fpga_bridge *__fpga_bridge_get(struct device *dev,
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struct fpga_image_info *info)
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2016-11-02 03:14:28 +08:00
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{
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struct fpga_bridge *bridge;
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int ret = -ENODEV;
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bridge = to_fpga_bridge(dev);
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bridge->info = info;
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if (!mutex_trylock(&bridge->mutex)) {
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ret = -EBUSY;
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goto err_dev;
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}
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if (!try_module_get(dev->parent->driver->owner))
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goto err_ll_mod;
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dev_dbg(&bridge->dev, "get\n");
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return bridge;
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err_ll_mod:
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mutex_unlock(&bridge->mutex);
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err_dev:
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put_device(dev);
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return ERR_PTR(ret);
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}
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2017-11-16 04:20:11 +08:00
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/**
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2021-06-09 05:23:45 +08:00
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* of_fpga_bridge_get - get an exclusive reference to an fpga bridge
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2017-11-16 04:20:11 +08:00
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*
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2023-07-06 22:27:55 +08:00
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* @np: node pointer of an FPGA bridge.
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* @info: fpga image specific information.
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2017-11-16 04:20:11 +08:00
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*
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2023-07-06 22:27:55 +08:00
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* Return:
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* * fpga_bridge struct pointer if successful.
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* * -EBUSY if someone already has a reference to the bridge.
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* * -ENODEV if @np is not an FPGA Bridge or can't take parent driver refcount.
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2017-11-16 04:20:11 +08:00
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*/
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struct fpga_bridge *of_fpga_bridge_get(struct device_node *np,
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struct fpga_image_info *info)
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{
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struct device *dev;
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2023-08-11 15:30:41 +08:00
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dev = class_find_device_by_of_node(&fpga_bridge_class, np);
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2017-11-16 04:20:11 +08:00
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if (!dev)
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return ERR_PTR(-ENODEV);
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return __fpga_bridge_get(dev, info);
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}
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2016-11-02 03:14:28 +08:00
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EXPORT_SYMBOL_GPL(of_fpga_bridge_get);
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2017-11-16 04:20:11 +08:00
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static int fpga_bridge_dev_match(struct device *dev, const void *data)
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{
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return dev->parent == data;
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}
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/**
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2021-06-09 05:23:45 +08:00
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* fpga_bridge_get - get an exclusive reference to an fpga bridge
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2017-11-16 04:20:11 +08:00
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* @dev: parent device that fpga bridge was registered with
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2023-03-01 22:03:08 +08:00
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* @info: fpga image specific information
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2017-11-16 04:20:11 +08:00
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*
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2021-06-09 05:23:45 +08:00
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* Given a device, get an exclusive reference to an fpga bridge.
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2017-11-16 04:20:11 +08:00
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*
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2018-09-12 22:43:24 +08:00
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* Return: fpga bridge struct or IS_ERR() condition containing error code.
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2017-11-16 04:20:11 +08:00
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*/
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struct fpga_bridge *fpga_bridge_get(struct device *dev,
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struct fpga_image_info *info)
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{
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struct device *bridge_dev;
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2023-08-11 15:30:41 +08:00
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bridge_dev = class_find_device(&fpga_bridge_class, NULL, dev,
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2017-11-16 04:20:11 +08:00
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fpga_bridge_dev_match);
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if (!bridge_dev)
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return ERR_PTR(-ENODEV);
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return __fpga_bridge_get(bridge_dev, info);
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}
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EXPORT_SYMBOL_GPL(fpga_bridge_get);
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2016-11-02 03:14:28 +08:00
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/**
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* fpga_bridge_put - release a reference to a bridge
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*
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* @bridge: FPGA bridge
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*/
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void fpga_bridge_put(struct fpga_bridge *bridge)
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{
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dev_dbg(&bridge->dev, "put\n");
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bridge->info = NULL;
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module_put(bridge->dev.parent->driver->owner);
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mutex_unlock(&bridge->mutex);
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put_device(&bridge->dev);
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}
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EXPORT_SYMBOL_GPL(fpga_bridge_put);
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/**
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* fpga_bridges_enable - enable bridges in a list
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* @bridge_list: list of FPGA bridges
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*
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2023-07-06 22:27:55 +08:00
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* Enable each bridge in the list. If list is empty, do nothing.
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2016-11-02 03:14:28 +08:00
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*
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2023-07-06 22:27:55 +08:00
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* Return: 0 for success or empty bridge list or an error code otherwise.
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2016-11-02 03:14:28 +08:00
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*/
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int fpga_bridges_enable(struct list_head *bridge_list)
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{
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struct fpga_bridge *bridge;
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int ret;
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2017-03-11 04:47:11 +08:00
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list_for_each_entry(bridge, bridge_list, node) {
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2016-11-02 03:14:28 +08:00
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ret = fpga_bridge_enable(bridge);
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if (ret)
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return ret;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(fpga_bridges_enable);
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/**
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* fpga_bridges_disable - disable bridges in a list
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*
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* @bridge_list: list of FPGA bridges
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*
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2023-07-06 22:27:55 +08:00
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* Disable each bridge in the list. If list is empty, do nothing.
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2016-11-02 03:14:28 +08:00
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*
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2023-07-06 22:27:55 +08:00
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* Return: 0 for success or empty bridge list or an error code otherwise.
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2016-11-02 03:14:28 +08:00
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*/
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int fpga_bridges_disable(struct list_head *bridge_list)
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{
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struct fpga_bridge *bridge;
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int ret;
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2017-03-11 04:47:11 +08:00
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list_for_each_entry(bridge, bridge_list, node) {
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2016-11-02 03:14:28 +08:00
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ret = fpga_bridge_disable(bridge);
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if (ret)
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return ret;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(fpga_bridges_disable);
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/**
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* fpga_bridges_put - put bridges
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*
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* @bridge_list: list of FPGA bridges
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*
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* For each bridge in the list, put the bridge and remove it from the list.
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* If list is empty, do nothing.
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*/
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void fpga_bridges_put(struct list_head *bridge_list)
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{
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2017-03-11 04:47:11 +08:00
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struct fpga_bridge *bridge, *next;
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2016-11-02 03:14:28 +08:00
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unsigned long flags;
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2017-03-11 04:47:11 +08:00
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list_for_each_entry_safe(bridge, next, bridge_list, node) {
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2016-11-02 03:14:28 +08:00
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fpga_bridge_put(bridge);
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spin_lock_irqsave(&bridge_list_lock, flags);
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list_del(&bridge->node);
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spin_unlock_irqrestore(&bridge_list_lock, flags);
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}
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}
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EXPORT_SYMBOL_GPL(fpga_bridges_put);
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/**
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2017-11-16 04:20:11 +08:00
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* of_fpga_bridge_get_to_list - get a bridge, add it to a list
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2016-11-02 03:14:28 +08:00
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*
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2021-06-09 05:23:45 +08:00
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* @np: node pointer of an FPGA bridge
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2016-11-02 03:14:28 +08:00
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* @info: fpga image specific information
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* @bridge_list: list of FPGA bridges
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*
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2021-05-28 23:05:57 +08:00
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* Get an exclusive reference to the bridge and it to the list.
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2016-11-02 03:14:28 +08:00
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*
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2023-07-06 22:27:55 +08:00
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* Return: 0 for success, error code from of_fpga_bridge_get() otherwise.
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2016-11-02 03:14:28 +08:00
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*/
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2017-11-16 04:20:11 +08:00
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int of_fpga_bridge_get_to_list(struct device_node *np,
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struct fpga_image_info *info,
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struct list_head *bridge_list)
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{
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struct fpga_bridge *bridge;
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unsigned long flags;
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bridge = of_fpga_bridge_get(np, info);
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if (IS_ERR(bridge))
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return PTR_ERR(bridge);
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spin_lock_irqsave(&bridge_list_lock, flags);
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list_add(&bridge->node, bridge_list);
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spin_unlock_irqrestore(&bridge_list_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(of_fpga_bridge_get_to_list);
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/**
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* fpga_bridge_get_to_list - given device, get a bridge, add it to a list
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*
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* @dev: FPGA bridge device
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* @info: fpga image specific information
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* @bridge_list: list of FPGA bridges
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*
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2021-05-28 23:05:57 +08:00
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* Get an exclusive reference to the bridge and it to the list.
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2017-11-16 04:20:11 +08:00
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*
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2023-07-06 22:27:55 +08:00
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* Return: 0 for success, error code from fpga_bridge_get() otherwise.
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2017-11-16 04:20:11 +08:00
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*/
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int fpga_bridge_get_to_list(struct device *dev,
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2016-11-02 03:14:28 +08:00
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struct fpga_image_info *info,
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struct list_head *bridge_list)
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{
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struct fpga_bridge *bridge;
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unsigned long flags;
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2017-11-16 04:20:11 +08:00
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bridge = fpga_bridge_get(dev, info);
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2016-11-02 03:14:28 +08:00
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if (IS_ERR(bridge))
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return PTR_ERR(bridge);
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spin_lock_irqsave(&bridge_list_lock, flags);
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list_add(&bridge->node, bridge_list);
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spin_unlock_irqrestore(&bridge_list_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(fpga_bridge_get_to_list);
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static ssize_t name_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct fpga_bridge *bridge = to_fpga_bridge(dev);
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return sprintf(buf, "%s\n", bridge->name);
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}
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static ssize_t state_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct fpga_bridge *bridge = to_fpga_bridge(dev);
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fpga: bridge: return errors in the show() method of the "state" attribute
This patch changes the show() method of the "state" sysfs attribute to
propagate errors returned by the enable_show() op. In this way,
userspace can distinguish between when the bridge is actually "enabled"
(i.e., allowing signals) or "disabled" (i.e., gating signals), or when
there is an error.
Currently, enable_show() returns an integer representing the bridge's
state (enabled or disabled) or an error code. However, this integer
value is interpreted in state_show() as a bool, resulting in the method
printing "enabled" (i.e., the bridge allows signals to pass), without
propagating the error, even when enable_show() returns an error code.
Signed-off-by: Marco Pagani <marpagan@redhat.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20230125140622.176870-1-marpagan@redhat.com
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
2023-01-25 22:06:22 +08:00
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int state = 1;
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2016-11-02 03:14:28 +08:00
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fpga: bridge: return errors in the show() method of the "state" attribute
This patch changes the show() method of the "state" sysfs attribute to
propagate errors returned by the enable_show() op. In this way,
userspace can distinguish between when the bridge is actually "enabled"
(i.e., allowing signals) or "disabled" (i.e., gating signals), or when
there is an error.
Currently, enable_show() returns an integer representing the bridge's
state (enabled or disabled) or an error code. However, this integer
value is interpreted in state_show() as a bool, resulting in the method
printing "enabled" (i.e., the bridge allows signals to pass), without
propagating the error, even when enable_show() returns an error code.
Signed-off-by: Marco Pagani <marpagan@redhat.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20230125140622.176870-1-marpagan@redhat.com
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
2023-01-25 22:06:22 +08:00
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if (bridge->br_ops && bridge->br_ops->enable_show) {
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state = bridge->br_ops->enable_show(bridge);
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if (state < 0)
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return state;
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}
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2016-11-02 03:14:28 +08:00
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fpga: bridge: return errors in the show() method of the "state" attribute
This patch changes the show() method of the "state" sysfs attribute to
propagate errors returned by the enable_show() op. In this way,
userspace can distinguish between when the bridge is actually "enabled"
(i.e., allowing signals) or "disabled" (i.e., gating signals), or when
there is an error.
Currently, enable_show() returns an integer representing the bridge's
state (enabled or disabled) or an error code. However, this integer
value is interpreted in state_show() as a bool, resulting in the method
printing "enabled" (i.e., the bridge allows signals to pass), without
propagating the error, even when enable_show() returns an error code.
Signed-off-by: Marco Pagani <marpagan@redhat.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20230125140622.176870-1-marpagan@redhat.com
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
2023-01-25 22:06:22 +08:00
|
|
|
return sysfs_emit(buf, "%s\n", state ? "enabled" : "disabled");
|
2016-11-02 03:14:28 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR_RO(name);
|
|
|
|
static DEVICE_ATTR_RO(state);
|
|
|
|
|
|
|
|
static struct attribute *fpga_bridge_attrs[] = {
|
|
|
|
&dev_attr_name.attr,
|
|
|
|
&dev_attr_state.attr,
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
ATTRIBUTE_GROUPS(fpga_bridge);
|
|
|
|
|
|
|
|
/**
|
2021-11-19 09:55:52 +08:00
|
|
|
* fpga_bridge_register - create and register an FPGA Bridge device
|
2021-06-15 01:09:05 +08:00
|
|
|
* @parent: FPGA bridge device from pdev
|
2016-11-02 03:14:28 +08:00
|
|
|
* @name: FPGA bridge name
|
|
|
|
* @br_ops: pointer to structure of fpga bridge ops
|
|
|
|
* @priv: FPGA bridge private data
|
|
|
|
*
|
2021-11-19 09:55:52 +08:00
|
|
|
* Return: struct fpga_bridge pointer or ERR_PTR()
|
2016-11-02 03:14:28 +08:00
|
|
|
*/
|
2021-11-19 09:55:52 +08:00
|
|
|
struct fpga_bridge *
|
|
|
|
fpga_bridge_register(struct device *parent, const char *name,
|
|
|
|
const struct fpga_bridge_ops *br_ops,
|
|
|
|
void *priv)
|
2016-11-02 03:14:28 +08:00
|
|
|
{
|
|
|
|
struct fpga_bridge *bridge;
|
2020-06-08 20:54:46 +08:00
|
|
|
int id, ret;
|
2016-11-02 03:14:28 +08:00
|
|
|
|
2021-11-19 09:55:52 +08:00
|
|
|
if (!br_ops) {
|
|
|
|
dev_err(parent, "Attempt to register without fpga_bridge_ops\n");
|
|
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
}
|
|
|
|
|
2016-11-02 03:14:28 +08:00
|
|
|
if (!name || !strlen(name)) {
|
2021-06-15 01:09:05 +08:00
|
|
|
dev_err(parent, "Attempt to register with no name!\n");
|
2021-11-19 09:55:52 +08:00
|
|
|
return ERR_PTR(-EINVAL);
|
2016-11-02 03:14:28 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);
|
|
|
|
if (!bridge)
|
2021-11-19 09:55:52 +08:00
|
|
|
return ERR_PTR(-ENOMEM);
|
2016-11-02 03:14:28 +08:00
|
|
|
|
2022-05-27 16:59:15 +08:00
|
|
|
id = ida_alloc(&fpga_bridge_ida, GFP_KERNEL);
|
2021-11-19 09:55:52 +08:00
|
|
|
if (id < 0) {
|
|
|
|
ret = id;
|
2016-11-02 03:14:28 +08:00
|
|
|
goto error_kfree;
|
2021-11-19 09:55:52 +08:00
|
|
|
}
|
2016-11-02 03:14:28 +08:00
|
|
|
|
|
|
|
mutex_init(&bridge->mutex);
|
|
|
|
INIT_LIST_HEAD(&bridge->node);
|
|
|
|
|
|
|
|
bridge->name = name;
|
|
|
|
bridge->br_ops = br_ops;
|
|
|
|
bridge->priv = priv;
|
|
|
|
|
2017-11-16 04:20:28 +08:00
|
|
|
bridge->dev.groups = br_ops->groups;
|
2023-08-11 15:30:41 +08:00
|
|
|
bridge->dev.class = &fpga_bridge_class;
|
2021-06-15 01:09:05 +08:00
|
|
|
bridge->dev.parent = parent;
|
|
|
|
bridge->dev.of_node = parent->of_node;
|
2016-11-02 03:14:28 +08:00
|
|
|
bridge->dev.id = id;
|
|
|
|
|
|
|
|
ret = dev_set_name(&bridge->dev, "br%d", id);
|
|
|
|
if (ret)
|
|
|
|
goto error_device;
|
|
|
|
|
2021-11-19 09:55:52 +08:00
|
|
|
ret = device_register(&bridge->dev);
|
|
|
|
if (ret) {
|
|
|
|
put_device(&bridge->dev);
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
|
2023-04-04 21:31:02 +08:00
|
|
|
of_platform_populate(bridge->dev.of_node, NULL, NULL, &bridge->dev);
|
|
|
|
|
2018-05-17 07:49:56 +08:00
|
|
|
return bridge;
|
2016-11-02 03:14:28 +08:00
|
|
|
|
|
|
|
error_device:
|
2022-05-27 16:59:15 +08:00
|
|
|
ida_free(&fpga_bridge_ida, id);
|
2016-11-02 03:14:28 +08:00
|
|
|
error_kfree:
|
|
|
|
kfree(bridge);
|
|
|
|
|
2021-11-19 09:55:52 +08:00
|
|
|
return ERR_PTR(ret);
|
2016-11-02 03:14:28 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(fpga_bridge_register);
|
|
|
|
|
|
|
|
/**
|
2021-06-09 05:23:45 +08:00
|
|
|
* fpga_bridge_unregister - unregister an FPGA bridge
|
2018-10-16 06:20:02 +08:00
|
|
|
*
|
|
|
|
* @bridge: FPGA bridge struct
|
|
|
|
*
|
2021-06-09 05:23:45 +08:00
|
|
|
* This function is intended for use in an FPGA bridge driver's remove function.
|
2016-11-02 03:14:28 +08:00
|
|
|
*/
|
2018-05-17 07:49:56 +08:00
|
|
|
void fpga_bridge_unregister(struct fpga_bridge *bridge)
|
2016-11-02 03:14:28 +08:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* If the low level driver provides a method for putting bridge into
|
|
|
|
* a desired state upon unregister, do it.
|
|
|
|
*/
|
|
|
|
if (bridge->br_ops && bridge->br_ops->fpga_bridge_remove)
|
|
|
|
bridge->br_ops->fpga_bridge_remove(bridge);
|
|
|
|
|
|
|
|
device_unregister(&bridge->dev);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(fpga_bridge_unregister);
|
|
|
|
|
|
|
|
static void fpga_bridge_dev_release(struct device *dev)
|
|
|
|
{
|
2021-11-19 09:55:52 +08:00
|
|
|
struct fpga_bridge *bridge = to_fpga_bridge(dev);
|
|
|
|
|
2022-05-27 16:59:15 +08:00
|
|
|
ida_free(&fpga_bridge_ida, bridge->dev.id);
|
2021-11-19 09:55:52 +08:00
|
|
|
kfree(bridge);
|
2016-11-02 03:14:28 +08:00
|
|
|
}
|
|
|
|
|
2023-08-11 15:30:41 +08:00
|
|
|
static const struct class fpga_bridge_class = {
|
|
|
|
.name = "fpga_bridge",
|
|
|
|
.dev_groups = fpga_bridge_groups,
|
|
|
|
.dev_release = fpga_bridge_dev_release,
|
|
|
|
};
|
|
|
|
|
2016-11-02 03:14:28 +08:00
|
|
|
static int __init fpga_bridge_dev_init(void)
|
|
|
|
{
|
2023-08-11 15:30:41 +08:00
|
|
|
return class_register(&fpga_bridge_class);
|
2016-11-02 03:14:28 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit fpga_bridge_dev_exit(void)
|
|
|
|
{
|
2023-08-11 15:30:41 +08:00
|
|
|
class_unregister(&fpga_bridge_class);
|
2016-11-02 03:14:28 +08:00
|
|
|
ida_destroy(&fpga_bridge_ida);
|
|
|
|
}
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("FPGA Bridge Driver");
|
2017-11-16 04:20:11 +08:00
|
|
|
MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
|
2016-11-02 03:14:28 +08:00
|
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
|
|
|
|
subsys_initcall(fpga_bridge_dev_init);
|
|
|
|
module_exit(fpga_bridge_dev_exit);
|