2018-02-20 16:56:07 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2018-02-14 21:21:06 +08:00
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/*
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* Audio driver for AK4458
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*
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* Copyright (C) 2016 Asahi Kasei Microdevices Corporation
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* Copyright 2018 NXP
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*/
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#ifndef _AK4458_H
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#define _AK4458_H
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#include <linux/regmap.h>
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/* Settings */
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#define AK4458_00_CONTROL1 0x00
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#define AK4458_01_CONTROL2 0x01
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#define AK4458_02_CONTROL3 0x02
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#define AK4458_03_LCHATT 0x03
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#define AK4458_04_RCHATT 0x04
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#define AK4458_05_CONTROL4 0x05
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#define AK4458_06_DSD1 0x06
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#define AK4458_07_CONTROL5 0x07
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#define AK4458_08_SOUND_CONTROL 0x08
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#define AK4458_09_DSD2 0x09
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#define AK4458_0A_CONTROL6 0x0A
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#define AK4458_0B_CONTROL7 0x0B
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#define AK4458_0C_CONTROL8 0x0C
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#define AK4458_0D_CONTROL9 0x0D
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#define AK4458_0E_CONTROL10 0x0E
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#define AK4458_0F_L2CHATT 0x0F
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#define AK4458_10_R2CHATT 0x10
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#define AK4458_11_L3CHATT 0x11
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#define AK4458_12_R3CHATT 0x12
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#define AK4458_13_L4CHATT 0x13
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#define AK4458_14_R4CHATT 0x14
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/* Bitfield Definitions */
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/* AK4458_00_CONTROL1 (0x00) Fields
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* Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
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* 00H Control 1 ACKS 0 0 0 DIF2 DIF1 DIF0 RSTN
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*/
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/* Digital Filter (SD, SLOW, SSLOW) */
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#define AK4458_SD_MASK GENMASK(5, 5)
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#define AK4458_SLOW_MASK GENMASK(0, 0)
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#define AK4458_SSLOW_MASK GENMASK(0, 0)
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/* DIF2 1 0
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* x 1 0 MSB justified Figure 3 (default)
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* x 1 1 I2S Compliment Figure 4
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*/
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#define AK4458_DIF_SHIFT 1
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#define AK4458_DIF_MASK GENMASK(3, 1)
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#define AK4458_DIF_16BIT_LSB (0 << 1)
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#define AK4458_DIF_24BIT_I2S (3 << 1)
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#define AK4458_DIF_32BIT_LSB (5 << 1)
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#define AK4458_DIF_32BIT_MSB (6 << 1)
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#define AK4458_DIF_32BIT_I2S (7 << 1)
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/* AK4458_00_CONTROL1 (0x00) D0 bit */
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#define AK4458_RSTN_MASK GENMASK(0, 0)
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#define AK4458_RSTN (0x1 << 0)
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/* AK4458_0A_CONTROL6 Mode bits */
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#define AK4458_MODE_SHIFT 6
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#define AK4458_MODE_MASK GENMASK(7, 6)
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#define AK4458_MODE_NORMAL (0 << AK4458_MODE_SHIFT)
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#define AK4458_MODE_TDM128 (1 << AK4458_MODE_SHIFT)
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#define AK4458_MODE_TDM256 (2 << AK4458_MODE_SHIFT)
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#define AK4458_MODE_TDM512 (3 << AK4458_MODE_SHIFT)
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/* DAC Digital attenuator transition time setting
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* Table 19
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* Mode ATS1 ATS2 ATT speed
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* 0 0 0 4080/fs
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* 1 0 1 2040/fs
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* 2 1 0 510/fs
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* 3 1 1 255/fs
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* */
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#define AK4458_ATS_SHIFT 6
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#define AK4458_ATS_MASK GENMASK(7, 6)
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2021-04-20 18:44:13 +08:00
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#define AK4458_DCHAIN_MASK (0x1 << 1)
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2018-02-14 21:21:06 +08:00
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2020-09-15 21:57:00 +08:00
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#define AK4458_DSDSEL_MASK (0x1 << 0)
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#define AK4458_DP_MASK (0x1 << 7)
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#endif
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