License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
|
|
|
# SPDX-License-Identifier: GPL-2.0
|
2011-06-05 02:52:05 +08:00
|
|
|
#
|
|
|
|
|
# For a description of the syntax of this configuration file,
|
2019-06-13 01:52:48 +08:00
|
|
|
# see Documentation/kbuild/kconfig-language.rst.
|
2011-06-05 02:52:05 +08:00
|
|
|
#
|
|
|
|
|
|
|
|
|
|
config OPENRISC
|
|
|
|
|
def_bool y
|
32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option
All new 32-bit architectures should have 64-bit userspace off_t type, but
existing architectures has 32-bit ones.
To enforce the rule, new config option is added to arch/Kconfig that defaults
ARCH_32BIT_OFF_T to be disabled for new 32-bit architectures. All existing
32-bit architectures enable it explicitly.
New option affects force_o_largefile() behaviour. Namely, if userspace
off_t is 64-bits long, we have no reason to reject user to open big files.
Note that even if architectures has only 64-bit off_t in the kernel
(arc, c6x, h8300, hexagon, nios2, openrisc, and unicore32),
a libc may use 32-bit off_t, and therefore want to limit the file size
to 4GB unless specified differently in the open flags.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Yury Norov <ynorov@marvell.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-05-16 16:18:49 +08:00
|
|
|
select ARCH_32BIT_OFF_T
|
2019-11-08 01:08:39 +08:00
|
|
|
select ARCH_HAS_DMA_SET_UNCACHED
|
|
|
|
|
select ARCH_HAS_DMA_CLEAR_UNCACHED
|
2018-07-19 21:02:32 +08:00
|
|
|
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
|
2022-01-11 10:55:37 +08:00
|
|
|
select COMMON_CLK
|
2011-06-05 02:52:05 +08:00
|
|
|
select OF
|
|
|
|
|
select OF_EARLY_FLATTREE
|
2012-04-06 18:52:54 +08:00
|
|
|
select IRQ_DOMAIN
|
2016-04-19 19:15:43 +08:00
|
|
|
select GPIOLIB
|
2019-11-20 21:37:12 +08:00
|
|
|
select HAVE_ARCH_TRACEHOOK
|
2012-05-10 05:19:44 +08:00
|
|
|
select SPARSE_IRQ
|
2011-06-05 02:52:05 +08:00
|
|
|
select GENERIC_IRQ_CHIP
|
|
|
|
|
select GENERIC_IRQ_PROBE
|
|
|
|
|
select GENERIC_IRQ_SHOW
|
2022-06-12 07:42:33 +08:00
|
|
|
select GENERIC_PCI_IOMAP
|
2012-01-10 11:04:32 +08:00
|
|
|
select GENERIC_CPU_DEVICES
|
2022-06-12 07:42:33 +08:00
|
|
|
select HAVE_PCI
|
2015-07-18 07:23:28 +08:00
|
|
|
select HAVE_UID16
|
2012-03-02 08:55:11 +08:00
|
|
|
select GENERIC_ATOMIC64
|
2014-05-12 02:49:34 +08:00
|
|
|
select GENERIC_CLOCKEVENTS_BROADCAST
|
|
|
|
|
select GENERIC_SMP_IDLE_THREAD
|
2012-09-28 13:01:03 +08:00
|
|
|
select MODULES_USE_ELF_RELA
|
2013-07-02 04:04:42 +08:00
|
|
|
select HAVE_DEBUG_STACKOVERFLOW
|
2014-05-27 04:31:42 +08:00
|
|
|
select OR1K_PIC
|
lib/GCD.c: use binary GCD algorithm instead of Euclidean
The binary GCD algorithm is based on the following facts:
1. If a and b are all evens, then gcd(a,b) = 2 * gcd(a/2, b/2)
2. If a is even and b is odd, then gcd(a,b) = gcd(a/2, b)
3. If a and b are all odds, then gcd(a,b) = gcd((a-b)/2, b) = gcd((a+b)/2, b)
Even on x86 machines with reasonable division hardware, the binary
algorithm runs about 25% faster (80% the execution time) than the
division-based Euclidian algorithm.
On platforms like Alpha and ARMv6 where division is a function call to
emulation code, it's even more significant.
There are two variants of the code here, depending on whether a fast
__ffs (find least significant set bit) instruction is available. This
allows the unpredictable branches in the bit-at-a-time shifting loop to
be eliminated.
If fast __ffs is not available, the "even/odd" GCD variant is used.
I use the following code to benchmark:
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <time.h>
#include <unistd.h>
#define swap(a, b) \
do { \
a ^= b; \
b ^= a; \
a ^= b; \
} while (0)
unsigned long gcd0(unsigned long a, unsigned long b)
{
unsigned long r;
if (a < b) {
swap(a, b);
}
if (b == 0)
return a;
while ((r = a % b) != 0) {
a = b;
b = r;
}
return b;
}
unsigned long gcd1(unsigned long a, unsigned long b)
{
unsigned long r = a | b;
if (!a || !b)
return r;
b >>= __builtin_ctzl(b);
for (;;) {
a >>= __builtin_ctzl(a);
if (a == b)
return a << __builtin_ctzl(r);
if (a < b)
swap(a, b);
a -= b;
}
}
unsigned long gcd2(unsigned long a, unsigned long b)
{
unsigned long r = a | b;
if (!a || !b)
return r;
r &= -r;
while (!(b & r))
b >>= 1;
for (;;) {
while (!(a & r))
a >>= 1;
if (a == b)
return a;
if (a < b)
swap(a, b);
a -= b;
a >>= 1;
if (a & r)
a += b;
a >>= 1;
}
}
unsigned long gcd3(unsigned long a, unsigned long b)
{
unsigned long r = a | b;
if (!a || !b)
return r;
b >>= __builtin_ctzl(b);
if (b == 1)
return r & -r;
for (;;) {
a >>= __builtin_ctzl(a);
if (a == 1)
return r & -r;
if (a == b)
return a << __builtin_ctzl(r);
if (a < b)
swap(a, b);
a -= b;
}
}
unsigned long gcd4(unsigned long a, unsigned long b)
{
unsigned long r = a | b;
if (!a || !b)
return r;
r &= -r;
while (!(b & r))
b >>= 1;
if (b == r)
return r;
for (;;) {
while (!(a & r))
a >>= 1;
if (a == r)
return r;
if (a == b)
return a;
if (a < b)
swap(a, b);
a -= b;
a >>= 1;
if (a & r)
a += b;
a >>= 1;
}
}
static unsigned long (*gcd_func[])(unsigned long a, unsigned long b) = {
gcd0, gcd1, gcd2, gcd3, gcd4,
};
#define TEST_ENTRIES (sizeof(gcd_func) / sizeof(gcd_func[0]))
#if defined(__x86_64__)
#define rdtscll(val) do { \
unsigned long __a,__d; \
__asm__ __volatile__("rdtsc" : "=a" (__a), "=d" (__d)); \
(val) = ((unsigned long long)__a) | (((unsigned long long)__d)<<32); \
} while(0)
static unsigned long long benchmark_gcd_func(unsigned long (*gcd)(unsigned long, unsigned long),
unsigned long a, unsigned long b, unsigned long *res)
{
unsigned long long start, end;
unsigned long long ret;
unsigned long gcd_res;
rdtscll(start);
gcd_res = gcd(a, b);
rdtscll(end);
if (end >= start)
ret = end - start;
else
ret = ~0ULL - start + 1 + end;
*res = gcd_res;
return ret;
}
#else
static inline struct timespec read_time(void)
{
struct timespec time;
clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &time);
return time;
}
static inline unsigned long long diff_time(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec - start.tv_nsec) < 0) {
temp.tv_sec = end.tv_sec - start.tv_sec - 1;
temp.tv_nsec = 1000000000ULL + end.tv_nsec - start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec - start.tv_sec;
temp.tv_nsec = end.tv_nsec - start.tv_nsec;
}
return temp.tv_sec * 1000000000ULL + temp.tv_nsec;
}
static unsigned long long benchmark_gcd_func(unsigned long (*gcd)(unsigned long, unsigned long),
unsigned long a, unsigned long b, unsigned long *res)
{
struct timespec start, end;
unsigned long gcd_res;
start = read_time();
gcd_res = gcd(a, b);
end = read_time();
*res = gcd_res;
return diff_time(start, end);
}
#endif
static inline unsigned long get_rand()
{
if (sizeof(long) == 8)
return (unsigned long)rand() << 32 | rand();
else
return rand();
}
int main(int argc, char **argv)
{
unsigned int seed = time(0);
int loops = 100;
int repeats = 1000;
unsigned long (*res)[TEST_ENTRIES];
unsigned long long elapsed[TEST_ENTRIES];
int i, j, k;
for (;;) {
int opt = getopt(argc, argv, "n:r:s:");
/* End condition always first */
if (opt == -1)
break;
switch (opt) {
case 'n':
loops = atoi(optarg);
break;
case 'r':
repeats = atoi(optarg);
break;
case 's':
seed = strtoul(optarg, NULL, 10);
break;
default:
/* You won't actually get here. */
break;
}
}
res = malloc(sizeof(unsigned long) * TEST_ENTRIES * loops);
memset(elapsed, 0, sizeof(elapsed));
srand(seed);
for (j = 0; j < loops; j++) {
unsigned long a = get_rand();
/* Do we have args? */
unsigned long b = argc > optind ? strtoul(argv[optind], NULL, 10) : get_rand();
unsigned long long min_elapsed[TEST_ENTRIES];
for (k = 0; k < repeats; k++) {
for (i = 0; i < TEST_ENTRIES; i++) {
unsigned long long tmp = benchmark_gcd_func(gcd_func[i], a, b, &res[j][i]);
if (k == 0 || min_elapsed[i] > tmp)
min_elapsed[i] = tmp;
}
}
for (i = 0; i < TEST_ENTRIES; i++)
elapsed[i] += min_elapsed[i];
}
for (i = 0; i < TEST_ENTRIES; i++)
printf("gcd%d: elapsed %llu\n", i, elapsed[i]);
k = 0;
srand(seed);
for (j = 0; j < loops; j++) {
unsigned long a = get_rand();
unsigned long b = argc > optind ? strtoul(argv[optind], NULL, 10) : get_rand();
for (i = 1; i < TEST_ENTRIES; i++) {
if (res[j][i] != res[j][0])
break;
}
if (i < TEST_ENTRIES) {
if (k == 0) {
k = 1;
fprintf(stderr, "Error:\n");
}
fprintf(stderr, "gcd(%lu, %lu): ", a, b);
for (i = 0; i < TEST_ENTRIES; i++)
fprintf(stderr, "%ld%s", res[j][i], i < TEST_ENTRIES - 1 ? ", " : "\n");
}
}
if (k == 0)
fprintf(stderr, "PASS\n");
free(res);
return 0;
}
Compiled with "-O2", on "VirtualBox 4.4.0-22-generic #38-Ubuntu x86_64" got:
zhaoxiuzeng@zhaoxiuzeng-VirtualBox:~/develop$ ./gcd -r 500000 -n 10
gcd0: elapsed 10174
gcd1: elapsed 2120
gcd2: elapsed 2902
gcd3: elapsed 2039
gcd4: elapsed 2812
PASS
zhaoxiuzeng@zhaoxiuzeng-VirtualBox:~/develop$ ./gcd -r 500000 -n 10
gcd0: elapsed 9309
gcd1: elapsed 2280
gcd2: elapsed 2822
gcd3: elapsed 2217
gcd4: elapsed 2710
PASS
zhaoxiuzeng@zhaoxiuzeng-VirtualBox:~/develop$ ./gcd -r 500000 -n 10
gcd0: elapsed 9589
gcd1: elapsed 2098
gcd2: elapsed 2815
gcd3: elapsed 2030
gcd4: elapsed 2718
PASS
zhaoxiuzeng@zhaoxiuzeng-VirtualBox:~/develop$ ./gcd -r 500000 -n 10
gcd0: elapsed 9914
gcd1: elapsed 2309
gcd2: elapsed 2779
gcd3: elapsed 2228
gcd4: elapsed 2709
PASS
[akpm@linux-foundation.org: avoid #defining a CONFIG_ variable]
Signed-off-by: Zhaoxiu Zeng <zhaoxiu.zeng@gmail.com>
Signed-off-by: George Spelvin <linux@horizon.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-21 08:03:57 +08:00
|
|
|
select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
|
2017-03-24 06:13:03 +08:00
|
|
|
select ARCH_USE_QUEUED_RWLOCKS
|
2017-10-30 20:38:35 +08:00
|
|
|
select OMPIC if SMP
|
2022-06-12 07:42:33 +08:00
|
|
|
select PCI_DOMAINS_GENERIC if PCI
|
|
|
|
|
select PCI_MSI if PCI
|
2017-07-24 20:44:35 +08:00
|
|
|
select ARCH_WANT_FRAME_POINTERS
|
2018-06-23 01:01:25 +08:00
|
|
|
select GENERIC_IRQ_MULTI_HANDLER
|
2018-09-04 23:04:07 +08:00
|
|
|
select MMU_GATHER_NO_RANGE if MMU
|
2021-07-31 13:22:32 +08:00
|
|
|
select TRACE_IRQFLAGS_SUPPORT
|
2011-06-05 02:52:05 +08:00
|
|
|
|
2017-09-09 07:14:22 +08:00
|
|
|
config CPU_BIG_ENDIAN
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2011-06-05 02:52:05 +08:00
|
|
|
config MMU
|
|
|
|
|
def_bool y
|
|
|
|
|
|
|
|
|
|
config GENERIC_HWEIGHT
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2014-04-08 06:39:19 +08:00
|
|
|
config NO_IOPORT_MAP
|
2011-06-05 02:52:05 +08:00
|
|
|
def_bool y
|
|
|
|
|
|
|
|
|
|
# For now, use generic checksum functions
|
|
|
|
|
#These can be reimplemented in assembly later if so inclined
|
|
|
|
|
config GENERIC_CSUM
|
2019-11-20 21:37:12 +08:00
|
|
|
def_bool y
|
2011-06-05 02:52:05 +08:00
|
|
|
|
2017-07-24 20:44:35 +08:00
|
|
|
config STACKTRACE_SUPPORT
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2017-07-24 20:55:16 +08:00
|
|
|
config LOCKDEP_SUPPORT
|
|
|
|
|
def_bool y
|
|
|
|
|
|
2011-06-05 02:52:05 +08:00
|
|
|
menu "Processor type and features"
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "Subarchitecture"
|
|
|
|
|
default OR1K_1200
|
|
|
|
|
|
|
|
|
|
config OR1K_1200
|
|
|
|
|
bool "OR1200"
|
|
|
|
|
help
|
|
|
|
|
Generic OpenRISC 1200 architecture
|
|
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
2015-11-05 00:26:10 +08:00
|
|
|
config DCACHE_WRITETHROUGH
|
|
|
|
|
bool "Have write through data caches"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
Select this if your implementation features write through data caches.
|
|
|
|
|
Selecting 'N' here will allow the kernel to force flushing of data
|
|
|
|
|
caches at relevant times. Most OpenRISC implementations support write-
|
|
|
|
|
through data caches.
|
|
|
|
|
|
|
|
|
|
If unsure say N here
|
|
|
|
|
|
2011-06-05 02:52:05 +08:00
|
|
|
config OPENRISC_BUILTIN_DTB
|
2019-11-20 21:37:12 +08:00
|
|
|
string "Builtin DTB"
|
|
|
|
|
default ""
|
2011-06-05 02:52:05 +08:00
|
|
|
|
|
|
|
|
menu "Class II Instructions"
|
|
|
|
|
|
|
|
|
|
config OPENRISC_HAVE_INST_FF1
|
|
|
|
|
bool "Have instruction l.ff1"
|
|
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
Select this if your implementation has the Class II instruction l.ff1
|
|
|
|
|
|
|
|
|
|
config OPENRISC_HAVE_INST_FL1
|
|
|
|
|
bool "Have instruction l.fl1"
|
|
|
|
|
default y
|
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|
help
|
|
|
|
|
Select this if your implementation has the Class II instruction l.fl1
|
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|
|
config OPENRISC_HAVE_INST_MUL
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|
|
bool "Have instruction l.mul for hardware multiply"
|
|
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
Select this if your implementation has a hardware multiply instruction
|
|
|
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|
|
config OPENRISC_HAVE_INST_DIV
|
|
|
|
|
bool "Have instruction l.div for hardware divide"
|
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|
|
default y
|
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|
|
help
|
|
|
|
|
Select this if your implementation has a hardware divide instruction
|
2022-01-22 12:32:38 +08:00
|
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|
|
config OPENRISC_HAVE_INST_CMOV
|
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|
|
bool "Have instruction l.cmov for conditional move"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This config enables gcc to generate l.cmov instructions when compiling
|
|
|
|
|
the kernel which in general will improve performance and reduce the
|
|
|
|
|
binary size.
|
|
|
|
|
|
|
|
|
|
Select this if your implementation has support for the Class II
|
|
|
|
|
l.cmov conistional move instruction.
|
|
|
|
|
|
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|
|
Say N if you are unsure.
|
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|
|
|
|
|
|
|
|
config OPENRISC_HAVE_INST_ROR
|
|
|
|
|
bool "Have instruction l.ror for rotate right"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This config enables gcc to generate l.ror instructions when compiling
|
|
|
|
|
the kernel which in general will improve performance and reduce the
|
|
|
|
|
binary size.
|
|
|
|
|
|
|
|
|
|
Select this if your implementation has support for the Class II
|
|
|
|
|
l.ror rotate right instruction.
|
|
|
|
|
|
|
|
|
|
Say N if you are unsure.
|
|
|
|
|
|
|
|
|
|
config OPENRISC_HAVE_INST_RORI
|
|
|
|
|
bool "Have instruction l.rori for rotate right with immediate"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This config enables gcc to generate l.rori instructions when compiling
|
|
|
|
|
the kernel which in general will improve performance and reduce the
|
|
|
|
|
binary size.
|
|
|
|
|
|
|
|
|
|
Select this if your implementation has support for the Class II
|
|
|
|
|
l.rori rotate right with immediate instruction.
|
|
|
|
|
|
|
|
|
|
Say N if you are unsure.
|
|
|
|
|
|
|
|
|
|
config OPENRISC_HAVE_INST_SEXT
|
|
|
|
|
bool "Have instructions l.ext* for sign extension"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This config enables gcc to generate l.ext* instructions when compiling
|
|
|
|
|
the kernel which in general will improve performance and reduce the
|
|
|
|
|
binary size.
|
|
|
|
|
|
|
|
|
|
Select this if your implementation has support for the Class II
|
|
|
|
|
l.exths, l.extbs, l.exthz and l.extbz size extend instructions.
|
|
|
|
|
|
|
|
|
|
Say N if you are unsure.
|
|
|
|
|
|
2011-06-05 02:52:05 +08:00
|
|
|
endmenu
|
|
|
|
|
|
2016-09-24 21:20:42 +08:00
|
|
|
config NR_CPUS
|
2014-05-12 02:49:34 +08:00
|
|
|
int "Maximum number of CPUs (2-32)"
|
|
|
|
|
range 2 32
|
|
|
|
|
depends on SMP
|
|
|
|
|
default "2"
|
|
|
|
|
|
|
|
|
|
config SMP
|
|
|
|
|
bool "Symmetric Multi-Processing support"
|
|
|
|
|
help
|
|
|
|
|
This enables support for systems with more than one CPU. If you have
|
|
|
|
|
a system with only one CPU, say N. If you have a system with more
|
|
|
|
|
than one CPU, say Y.
|
|
|
|
|
|
|
|
|
|
If you don't know what to do here, say N.
|
2011-06-05 02:52:05 +08:00
|
|
|
|
2018-12-11 19:01:04 +08:00
|
|
|
source "kernel/Kconfig.hz"
|
2011-06-05 02:52:05 +08:00
|
|
|
|
|
|
|
|
config OPENRISC_NO_SPR_SR_DSX
|
|
|
|
|
bool "use SPR_SR_DSX software emulation" if OR1K_1200
|
|
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
SPR_SR_DSX bit is status register bit indicating whether
|
|
|
|
|
the last exception has happened in delay slot.
|
|
|
|
|
|
|
|
|
|
OpenRISC architecture makes it optional to have it implemented
|
|
|
|
|
in hardware and the OR1200 does not have it.
|
|
|
|
|
|
|
|
|
|
Say N here if you know that your OpenRISC processor has
|
|
|
|
|
SPR_SR_DSX bit implemented. Say Y if you are unsure.
|
|
|
|
|
|
2014-05-11 17:08:37 +08:00
|
|
|
config OPENRISC_HAVE_SHADOW_GPRS
|
|
|
|
|
bool "Support for shadow gpr files" if !SMP
|
|
|
|
|
default y if SMP
|
|
|
|
|
help
|
|
|
|
|
Say Y here if your OpenRISC processor features shadowed
|
|
|
|
|
register files. They will in such case be used as a
|
|
|
|
|
scratch reg storage on exception entry.
|
|
|
|
|
|
|
|
|
|
On SMP systems, this feature is mandatory.
|
|
|
|
|
On a unicore system it's safe to say N here if you are unsure.
|
|
|
|
|
|
2011-06-05 02:52:05 +08:00
|
|
|
config CMDLINE
|
2019-11-20 21:37:12 +08:00
|
|
|
string "Default kernel command string"
|
|
|
|
|
default ""
|
|
|
|
|
help
|
|
|
|
|
On some architectures there is currently no way for the boot loader
|
|
|
|
|
to pass arguments to the kernel. For these architectures, you should
|
|
|
|
|
supply some command-line options at build time by entering them
|
|
|
|
|
here.
|
2011-06-05 02:52:05 +08:00
|
|
|
|
|
|
|
|
menu "Debugging options"
|
|
|
|
|
|
|
|
|
|
config JUMP_UPON_UNHANDLED_EXCEPTION
|
|
|
|
|
bool "Try to die gracefully"
|
|
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
Now this puts kernel into infinite loop after first oops. Till
|
|
|
|
|
your kernel crashes this doesn't have any influence.
|
|
|
|
|
|
|
|
|
|
Say Y if you are unsure.
|
|
|
|
|
|
|
|
|
|
config OPENRISC_ESR_EXCEPTION_BUG_CHECK
|
|
|
|
|
bool "Check for possible ESR exception bug"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This option enables some checks that might expose some problems
|
2019-11-20 21:37:12 +08:00
|
|
|
in kernel.
|
2011-06-05 02:52:05 +08:00
|
|
|
|
|
|
|
|
Say N if you are unsure.
|
|
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
endmenu
|
