2008-08-19 16:08:40 +08:00
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/*
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* OMAP powerdomain control
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*
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* Copyright (C) 2007-2008 Texas Instruments, Inc.
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2010-01-27 11:12:59 +08:00
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* Copyright (C) 2007-2009 Nokia Corporation
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2008-08-19 16:08:40 +08:00
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*
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* Written by Paul Walmsley
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*
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2010-01-27 11:12:53 +08:00
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* Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com>
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*
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2008-08-19 16:08:40 +08:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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2009-12-09 07:33:10 +08:00
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#undef DEBUG
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2008-08-19 16:08:40 +08:00
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <asm/atomic.h>
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#include "cm.h"
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#include "cm-regbits-34xx.h"
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2010-01-27 11:12:53 +08:00
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#include "cm-regbits-44xx.h"
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2008-08-19 16:08:40 +08:00
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#include "prm.h"
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#include "prm-regbits-34xx.h"
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2010-01-27 11:12:53 +08:00
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#include "prm-regbits-44xx.h"
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2008-08-19 16:08:40 +08:00
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2009-10-21 00:40:47 +08:00
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#include <plat/cpu.h>
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#include <plat/powerdomain.h>
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#include <plat/clockdomain.h>
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2010-01-27 11:12:59 +08:00
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#include <plat/prcm.h>
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2008-08-19 16:08:40 +08:00
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2008-10-15 23:13:49 +08:00
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#include "pm.h"
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2008-10-15 22:48:43 +08:00
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enum {
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PWRDM_STATE_NOW = 0,
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PWRDM_STATE_PREV,
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};
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2010-01-27 11:12:53 +08:00
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/* Variable holding value of the CPU dependent PWRSTCTRL Register Offset */
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static u16 pwrstctrl_reg_offs;
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/* Variable holding value of the CPU dependent PWRSTST Register Offset */
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static u16 pwrstst_reg_offs;
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/* OMAP3 and OMAP4 specific register bit initialisations
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* Notice that the names here are not according to each power
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* domain but the bit mapping used applies to all of them
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*/
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/* OMAP3 and OMAP4 Memory Onstate Masks (common across all power domains) */
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#define OMAP_MEM0_ONSTATE_MASK OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK
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#define OMAP_MEM1_ONSTATE_MASK OMAP3430_L1FLATMEMONSTATE_MASK
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#define OMAP_MEM2_ONSTATE_MASK OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK
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#define OMAP_MEM3_ONSTATE_MASK OMAP3430_L2FLATMEMONSTATE_MASK
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#define OMAP_MEM4_ONSTATE_MASK OMAP4430_OCP_NRET_BANK_ONSTATE_MASK
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/* OMAP3 and OMAP4 Memory Retstate Masks (common across all power domains) */
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#define OMAP_MEM0_RETSTATE_MASK OMAP3430_SHAREDL1CACHEFLATRETSTATE
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#define OMAP_MEM1_RETSTATE_MASK OMAP3430_L1FLATMEMRETSTATE
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#define OMAP_MEM2_RETSTATE_MASK OMAP3430_SHAREDL2CACHEFLATRETSTATE
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#define OMAP_MEM3_RETSTATE_MASK OMAP3430_L2FLATMEMRETSTATE
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#define OMAP_MEM4_RETSTATE_MASK OMAP4430_OCP_NRET_BANK_RETSTATE_MASK
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/* OMAP3 and OMAP4 Memory Status bits */
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#define OMAP_MEM0_STATEST_MASK OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK
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#define OMAP_MEM1_STATEST_MASK OMAP3430_L1FLATMEMSTATEST_MASK
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#define OMAP_MEM2_STATEST_MASK OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK
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#define OMAP_MEM3_STATEST_MASK OMAP3430_L2FLATMEMSTATEST_MASK
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#define OMAP_MEM4_STATEST_MASK OMAP4430_OCP_NRET_BANK_STATEST_MASK
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2008-08-19 16:08:40 +08:00
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/* pwrdm_list contains all registered struct powerdomains */
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static LIST_HEAD(pwrdm_list);
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/* Private functions */
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static struct powerdomain *_pwrdm_lookup(const char *name)
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{
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struct powerdomain *pwrdm, *temp_pwrdm;
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pwrdm = NULL;
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list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
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if (!strcmp(name, temp_pwrdm->name)) {
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pwrdm = temp_pwrdm;
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break;
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}
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}
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return pwrdm;
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}
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2010-01-27 11:13:00 +08:00
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/**
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* _pwrdm_register - register a powerdomain
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* @pwrdm: struct powerdomain * to register
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*
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* Adds a powerdomain to the internal powerdomain list. Returns
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* -EINVAL if given a null pointer, -EEXIST if a powerdomain is
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* already registered by the provided name, or 0 upon success.
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*/
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static int _pwrdm_register(struct powerdomain *pwrdm)
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{
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int i;
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if (!pwrdm)
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return -EINVAL;
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if (!omap_chip_is(pwrdm->omap_chip))
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return -EINVAL;
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if (_pwrdm_lookup(pwrdm->name))
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return -EEXIST;
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list_add(&pwrdm->node, &pwrdm_list);
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/* Initialize the powerdomain's state counter */
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for (i = 0; i < 4; i++)
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pwrdm->state_counter[i] = 0;
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pwrdm_wait_transition(pwrdm);
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pwrdm->state = pwrdm_read_pwrst(pwrdm);
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pwrdm->state_counter[pwrdm->state] = 1;
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pr_debug("powerdomain: registered %s\n", pwrdm->name);
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return 0;
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}
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2008-10-15 22:48:43 +08:00
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static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
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{
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int prev;
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int state;
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if (pwrdm == NULL)
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return -EINVAL;
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state = pwrdm_read_pwrst(pwrdm);
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switch (flag) {
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case PWRDM_STATE_NOW:
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prev = pwrdm->state;
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break;
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case PWRDM_STATE_PREV:
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prev = pwrdm_read_prev_pwrst(pwrdm);
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if (pwrdm->state != prev)
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pwrdm->state_counter[prev]++;
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break;
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default:
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return -EINVAL;
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}
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if (state != prev)
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pwrdm->state_counter[state]++;
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2008-10-15 23:13:49 +08:00
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pm_dbg_update_time(pwrdm, prev);
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2008-10-15 22:48:43 +08:00
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pwrdm->state = state;
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return 0;
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}
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2008-10-15 23:13:49 +08:00
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static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
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2008-10-15 22:48:43 +08:00
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{
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pwrdm_clear_all_prev_pwrst(pwrdm);
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_pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
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return 0;
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}
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2008-10-15 23:13:49 +08:00
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static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
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2008-10-15 22:48:43 +08:00
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{
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_pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
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return 0;
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}
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2008-08-19 16:08:40 +08:00
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/* Public functions */
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/**
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* pwrdm_init - set up the powerdomain layer
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*
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* Loop through the list of powerdomains, registering all that are
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* available on the current CPU. If pwrdm_list is supplied and not
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* null, all of the referenced powerdomains will be registered. No
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* return value.
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*/
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void pwrdm_init(struct powerdomain **pwrdm_list)
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{
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struct powerdomain **p = NULL;
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2010-01-27 11:12:53 +08:00
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if (cpu_is_omap24xx() | cpu_is_omap34xx()) {
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pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL;
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pwrstst_reg_offs = OMAP2_PM_PWSTST;
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} else if (cpu_is_omap44xx()) {
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pwrstctrl_reg_offs = OMAP4_PM_PWSTCTRL;
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pwrstst_reg_offs = OMAP4_PM_PWSTST;
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} else {
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printk(KERN_ERR "Power Domain struct not supported for " \
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"this CPU\n");
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return;
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}
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2008-10-15 22:48:43 +08:00
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if (pwrdm_list) {
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2010-01-27 11:13:00 +08:00
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for (p = pwrdm_list; *p; p++)
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_pwrdm_register(*p);
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2008-08-19 16:08:40 +08:00
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}
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}
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/**
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* pwrdm_lookup - look up a powerdomain by name, return a pointer
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* @name: name of powerdomain
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*
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* Find a registered powerdomain by its name. Returns a pointer to the
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* struct powerdomain if found, or NULL otherwise.
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*/
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struct powerdomain *pwrdm_lookup(const char *name)
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{
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struct powerdomain *pwrdm;
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if (!name)
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return NULL;
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pwrdm = _pwrdm_lookup(name);
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return pwrdm;
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}
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/**
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2010-01-27 11:13:00 +08:00
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* pwrdm_for_each - call function on each registered clockdomain
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2008-08-19 16:08:40 +08:00
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* @fn: callback function *
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*
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* Call the supplied function for each registered powerdomain. The
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* callback function can return anything but 0 to bail out early from
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2009-10-01 15:01:55 +08:00
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* the iterator. Returns the last return value of the callback function, which
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* should be 0 for success or anything else to indicate failure; or -EINVAL if
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* the function pointer is null.
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2008-08-19 16:08:40 +08:00
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*/
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2010-01-27 11:13:00 +08:00
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int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
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void *user)
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2008-08-19 16:08:40 +08:00
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{
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struct powerdomain *temp_pwrdm;
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int ret = 0;
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if (!fn)
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return -EINVAL;
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list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
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2008-10-15 23:13:49 +08:00
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ret = (*fn)(temp_pwrdm, user);
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2008-08-19 16:08:40 +08:00
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if (ret)
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break;
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}
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2009-10-01 15:01:55 +08:00
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return ret;
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}
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2008-08-19 16:08:44 +08:00
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/**
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* pwrdm_add_clkdm - add a clockdomain to a powerdomain
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* @pwrdm: struct powerdomain * to add the clockdomain to
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* @clkdm: struct clockdomain * to associate with a powerdomain
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*
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* Associate the clockdomain 'clkdm' with a powerdomain 'pwrdm'. This
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* enables the use of pwrdm_for_each_clkdm(). Returns -EINVAL if
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* presented with invalid pointers; -ENOMEM if memory could not be allocated;
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* or 0 upon success.
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*/
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int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
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{
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int i;
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int ret = -EINVAL;
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if (!pwrdm || !clkdm)
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return -EINVAL;
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pr_debug("powerdomain: associating clockdomain %s with powerdomain "
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"%s\n", clkdm->name, pwrdm->name);
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for (i = 0; i < PWRDM_MAX_CLKDMS; i++) {
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if (!pwrdm->pwrdm_clkdms[i])
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break;
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#ifdef DEBUG
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if (pwrdm->pwrdm_clkdms[i] == clkdm) {
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ret = -EINVAL;
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goto pac_exit;
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}
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#endif
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}
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if (i == PWRDM_MAX_CLKDMS) {
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pr_debug("powerdomain: increase PWRDM_MAX_CLKDMS for "
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|
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"pwrdm %s clkdm %s\n", pwrdm->name, clkdm->name);
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WARN_ON(1);
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ret = -ENOMEM;
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|
goto pac_exit;
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}
|
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pwrdm->pwrdm_clkdms[i] = clkdm;
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ret = 0;
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pac_exit:
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return ret;
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|
|
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}
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|
|
|
|
|
|
/**
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* pwrdm_del_clkdm - remove a clockdomain from a powerdomain
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* @pwrdm: struct powerdomain * to add the clockdomain to
|
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|
* @clkdm: struct clockdomain * to associate with a powerdomain
|
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|
|
*
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|
|
* Dissociate the clockdomain 'clkdm' from the powerdomain
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|
* 'pwrdm'. Returns -EINVAL if presented with invalid pointers;
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|
* -ENOENT if the clkdm was not associated with the powerdomain, or 0
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* upon success.
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*/
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|
|
int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
|
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|
|
{
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|
int ret = -EINVAL;
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|
int i;
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|
|
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|
|
|
if (!pwrdm || !clkdm)
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|
return -EINVAL;
|
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|
|
|
|
|
|
pr_debug("powerdomain: dissociating clockdomain %s from powerdomain "
|
|
|
|
"%s\n", clkdm->name, pwrdm->name);
|
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|
|
|
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|
|
for (i = 0; i < PWRDM_MAX_CLKDMS; i++)
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if (pwrdm->pwrdm_clkdms[i] == clkdm)
|
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break;
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|
if (i == PWRDM_MAX_CLKDMS) {
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|
pr_debug("powerdomain: clkdm %s not associated with pwrdm "
|
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|
|
"%s ?!\n", clkdm->name, pwrdm->name);
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|
|
ret = -ENOENT;
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|
goto pdc_exit;
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|
}
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|
|
pwrdm->pwrdm_clkdms[i] = NULL;
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
|
|
|
|
pdc_exit:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_for_each_clkdm - call function on each clkdm in a pwrdm
|
|
|
|
* @pwrdm: struct powerdomain * to iterate over
|
|
|
|
* @fn: callback function *
|
|
|
|
*
|
|
|
|
* Call the supplied function for each clockdomain in the powerdomain
|
|
|
|
* 'pwrdm'. The callback function can return anything but 0 to bail
|
2010-01-27 11:13:00 +08:00
|
|
|
* out early from the iterator. Returns -EINVAL if presented with
|
|
|
|
* invalid pointers; or passes along the last return value of the
|
|
|
|
* callback function, which should be 0 for success or anything else
|
|
|
|
* to indicate failure.
|
2008-08-19 16:08:44 +08:00
|
|
|
*/
|
|
|
|
int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
|
|
|
|
int (*fn)(struct powerdomain *pwrdm,
|
|
|
|
struct clockdomain *clkdm))
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (!fn)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
for (i = 0; i < PWRDM_MAX_CLKDMS && !ret; i++)
|
|
|
|
ret = (*fn)(pwrdm, pwrdm->pwrdm_clkdms[i]);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2008-08-19 16:08:40 +08:00
|
|
|
/**
|
|
|
|
* pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain
|
|
|
|
* @pwrdm: struct powerdomain *
|
|
|
|
*
|
|
|
|
* Return the number of controllable memory banks in powerdomain pwrdm,
|
|
|
|
* starting with 1. Returns -EINVAL if the powerdomain pointer is null.
|
|
|
|
*/
|
|
|
|
int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return pwrdm->banks;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_set_next_pwrst - set next powerdomain power state
|
|
|
|
* @pwrdm: struct powerdomain * to set
|
|
|
|
* @pwrst: one of the PWRDM_POWER_* macros
|
|
|
|
*
|
|
|
|
* Set the powerdomain pwrdm's next power state to pwrst. The powerdomain
|
|
|
|
* may not enter this state immediately if the preconditions for this state
|
|
|
|
* have not been satisfied. Returns -EINVAL if the powerdomain pointer is
|
|
|
|
* null or if the power state is invalid for the powerdomin, or returns 0
|
|
|
|
* upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!(pwrdm->pwrsts & (1 << pwrst)))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("powerdomain: setting next powerstate for %s to %0x\n",
|
|
|
|
pwrdm->name, pwrst);
|
|
|
|
|
|
|
|
prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
|
|
|
|
(pwrst << OMAP_POWERSTATE_SHIFT),
|
2010-01-27 11:12:53 +08:00
|
|
|
pwrdm->prcm_offs, pwrstctrl_reg_offs);
|
2008-08-19 16:08:40 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_read_next_pwrst - get next powerdomain power state
|
|
|
|
* @pwrdm: struct powerdomain * to get power state
|
|
|
|
*
|
|
|
|
* Return the powerdomain pwrdm's next power state. Returns -EINVAL
|
|
|
|
* if the powerdomain pointer is null or returns the next power state
|
|
|
|
* upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-01-27 11:12:53 +08:00
|
|
|
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
|
|
|
pwrstctrl_reg_offs, OMAP_POWERSTATE_MASK);
|
2008-08-19 16:08:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_read_pwrst - get current powerdomain power state
|
|
|
|
* @pwrdm: struct powerdomain * to get power state
|
|
|
|
*
|
|
|
|
* Return the powerdomain pwrdm's current power state. Returns -EINVAL
|
|
|
|
* if the powerdomain pointer is null or returns the current power state
|
|
|
|
* upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_read_pwrst(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-01-27 11:12:53 +08:00
|
|
|
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
|
|
|
pwrstst_reg_offs, OMAP_POWERSTATEST_MASK);
|
2008-08-19 16:08:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_read_prev_pwrst - get previous powerdomain power state
|
|
|
|
* @pwrdm: struct powerdomain * to get previous power state
|
|
|
|
*
|
|
|
|
* Return the powerdomain pwrdm's previous power state. Returns -EINVAL
|
|
|
|
* if the powerdomain pointer is null or returns the previous power state
|
|
|
|
* upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
|
|
|
|
OMAP3430_LASTPOWERSTATEENTERED_MASK);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_set_logic_retst - set powerdomain logic power state upon retention
|
|
|
|
* @pwrdm: struct powerdomain * to set
|
|
|
|
* @pwrst: one of the PWRDM_POWER_* macros
|
|
|
|
*
|
|
|
|
* Set the next power state that the logic portion of the powerdomain
|
|
|
|
* pwrdm will enter when the powerdomain enters retention. This will
|
|
|
|
* be either RETENTION or OFF, if supported. Returns -EINVAL if the
|
|
|
|
* powerdomain pointer is null or the target power state is not not
|
|
|
|
* supported, or returns 0 upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst)))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n",
|
|
|
|
pwrdm->name, pwrst);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The register bit names below may not correspond to the
|
|
|
|
* actual names of the bits in each powerdomain's register,
|
|
|
|
* but the type of value returned is the same for each
|
|
|
|
* powerdomain.
|
|
|
|
*/
|
|
|
|
prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE,
|
|
|
|
(pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE)),
|
2010-01-27 11:12:53 +08:00
|
|
|
pwrdm->prcm_offs, pwrstctrl_reg_offs);
|
2008-08-19 16:08:40 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_set_mem_onst - set memory power state while powerdomain ON
|
|
|
|
* @pwrdm: struct powerdomain * to set
|
|
|
|
* @bank: memory bank number to set (0-3)
|
|
|
|
* @pwrst: one of the PWRDM_POWER_* macros
|
|
|
|
*
|
|
|
|
* Set the next power state that memory bank x of the powerdomain
|
|
|
|
* pwrdm will enter when the powerdomain enters the ON state. Bank
|
|
|
|
* will be a number from 0 to 3, and represents different types of
|
|
|
|
* memory, depending on the powerdomain. Returns -EINVAL if the
|
|
|
|
* powerdomain pointer is null or the target power state is not not
|
|
|
|
* supported for this memory bank, -EEXIST if the target memory bank
|
|
|
|
* does not exist or is not controllable, or returns 0 upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
|
|
|
|
{
|
|
|
|
u32 m;
|
|
|
|
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (pwrdm->banks < (bank + 1))
|
|
|
|
return -EEXIST;
|
|
|
|
|
|
|
|
if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst)))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("powerdomain: setting next memory powerstate for domain %s "
|
|
|
|
"bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The register bit names below may not correspond to the
|
|
|
|
* actual names of the bits in each powerdomain's register,
|
|
|
|
* but the type of value returned is the same for each
|
|
|
|
* powerdomain.
|
|
|
|
*/
|
|
|
|
switch (bank) {
|
|
|
|
case 0:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM0_ONSTATE_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 1:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM1_ONSTATE_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 2:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM2_ONSTATE_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 3:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM3_ONSTATE_MASK;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
m = OMAP_MEM4_ONSTATE_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ON(1); /* should never happen */
|
|
|
|
return -EEXIST;
|
|
|
|
}
|
|
|
|
|
|
|
|
prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)),
|
2010-01-27 11:12:53 +08:00
|
|
|
pwrdm->prcm_offs, pwrstctrl_reg_offs);
|
2008-08-19 16:08:40 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_set_mem_retst - set memory power state while powerdomain in RET
|
|
|
|
* @pwrdm: struct powerdomain * to set
|
|
|
|
* @bank: memory bank number to set (0-3)
|
|
|
|
* @pwrst: one of the PWRDM_POWER_* macros
|
|
|
|
*
|
|
|
|
* Set the next power state that memory bank x of the powerdomain
|
|
|
|
* pwrdm will enter when the powerdomain enters the RETENTION state.
|
|
|
|
* Bank will be a number from 0 to 3, and represents different types
|
|
|
|
* of memory, depending on the powerdomain. pwrst will be either
|
|
|
|
* RETENTION or OFF, if supported. Returns -EINVAL if the powerdomain
|
|
|
|
* pointer is null or the target power state is not not supported for
|
|
|
|
* this memory bank, -EEXIST if the target memory bank does not exist
|
|
|
|
* or is not controllable, or returns 0 upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
|
|
|
|
{
|
|
|
|
u32 m;
|
|
|
|
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (pwrdm->banks < (bank + 1))
|
|
|
|
return -EEXIST;
|
|
|
|
|
|
|
|
if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst)))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("powerdomain: setting next memory powerstate for domain %s "
|
|
|
|
"bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The register bit names below may not correspond to the
|
|
|
|
* actual names of the bits in each powerdomain's register,
|
|
|
|
* but the type of value returned is the same for each
|
|
|
|
* powerdomain.
|
|
|
|
*/
|
|
|
|
switch (bank) {
|
|
|
|
case 0:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM0_RETSTATE_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 1:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM1_RETSTATE_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 2:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM2_RETSTATE_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 3:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM3_RETSTATE_MASK;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
m = OMAP_MEM4_RETSTATE_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ON(1); /* should never happen */
|
|
|
|
return -EEXIST;
|
|
|
|
}
|
|
|
|
|
|
|
|
prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
|
2010-01-27 11:12:53 +08:00
|
|
|
pwrstctrl_reg_offs);
|
2008-08-19 16:08:40 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_read_logic_pwrst - get current powerdomain logic retention power state
|
|
|
|
* @pwrdm: struct powerdomain * to get current logic retention power state
|
|
|
|
*
|
|
|
|
* Return the current power state that the logic portion of
|
|
|
|
* powerdomain pwrdm will enter
|
|
|
|
* Returns -EINVAL if the powerdomain pointer is null or returns the
|
|
|
|
* current logic retention power state upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-01-27 11:12:53 +08:00
|
|
|
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
|
|
|
pwrstst_reg_offs, OMAP3430_LOGICSTATEST);
|
2008-08-19 16:08:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_read_prev_logic_pwrst - get previous powerdomain logic power state
|
|
|
|
* @pwrdm: struct powerdomain * to get previous logic power state
|
|
|
|
*
|
|
|
|
* Return the powerdomain pwrdm's logic power state. Returns -EINVAL
|
|
|
|
* if the powerdomain pointer is null or returns the previous logic
|
|
|
|
* power state upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The register bit names below may not correspond to the
|
|
|
|
* actual names of the bits in each powerdomain's register,
|
|
|
|
* but the type of value returned is the same for each
|
|
|
|
* powerdomain.
|
|
|
|
*/
|
|
|
|
return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
|
|
|
|
OMAP3430_LASTLOGICSTATEENTERED);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_read_mem_pwrst - get current memory bank power state
|
|
|
|
* @pwrdm: struct powerdomain * to get current memory bank power state
|
|
|
|
* @bank: memory bank number (0-3)
|
|
|
|
*
|
|
|
|
* Return the powerdomain pwrdm's current memory power state for bank
|
|
|
|
* x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
|
|
|
|
* the target memory bank does not exist or is not controllable, or
|
|
|
|
* returns the current memory power state upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
|
|
|
|
{
|
|
|
|
u32 m;
|
|
|
|
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (pwrdm->banks < (bank + 1))
|
|
|
|
return -EEXIST;
|
|
|
|
|
2009-12-09 07:33:15 +08:00
|
|
|
if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK)
|
|
|
|
bank = 1;
|
|
|
|
|
2008-08-19 16:08:40 +08:00
|
|
|
/*
|
|
|
|
* The register bit names below may not correspond to the
|
|
|
|
* actual names of the bits in each powerdomain's register,
|
|
|
|
* but the type of value returned is the same for each
|
|
|
|
* powerdomain.
|
|
|
|
*/
|
|
|
|
switch (bank) {
|
|
|
|
case 0:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM0_STATEST_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 1:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM1_STATEST_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 2:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM2_STATEST_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
case 3:
|
2010-01-27 11:12:53 +08:00
|
|
|
m = OMAP_MEM3_STATEST_MASK;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
m = OMAP_MEM4_STATEST_MASK;
|
2008-08-19 16:08:40 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ON(1); /* should never happen */
|
|
|
|
return -EEXIST;
|
|
|
|
}
|
|
|
|
|
2010-01-27 11:12:53 +08:00
|
|
|
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
|
|
|
pwrstst_reg_offs, m);
|
2008-08-19 16:08:40 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_read_prev_mem_pwrst - get previous memory bank power state
|
|
|
|
* @pwrdm: struct powerdomain * to get previous memory bank power state
|
|
|
|
* @bank: memory bank number (0-3)
|
|
|
|
*
|
|
|
|
* Return the powerdomain pwrdm's previous memory power state for bank
|
|
|
|
* x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
|
|
|
|
* the target memory bank does not exist or is not controllable, or
|
|
|
|
* returns the previous memory power state upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
|
|
|
|
{
|
|
|
|
u32 m;
|
|
|
|
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (pwrdm->banks < (bank + 1))
|
|
|
|
return -EEXIST;
|
|
|
|
|
2009-12-09 07:33:15 +08:00
|
|
|
if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK)
|
|
|
|
bank = 1;
|
|
|
|
|
2008-08-19 16:08:40 +08:00
|
|
|
/*
|
|
|
|
* The register bit names below may not correspond to the
|
|
|
|
* actual names of the bits in each powerdomain's register,
|
|
|
|
* but the type of value returned is the same for each
|
|
|
|
* powerdomain.
|
|
|
|
*/
|
|
|
|
switch (bank) {
|
|
|
|
case 0:
|
|
|
|
m = OMAP3430_LASTMEM1STATEENTERED_MASK;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
m = OMAP3430_LASTMEM2STATEENTERED_MASK;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
m = OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
m = OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN_ON(1); /* should never happen */
|
|
|
|
return -EEXIST;
|
|
|
|
}
|
|
|
|
|
|
|
|
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
|
|
|
OMAP3430_PM_PREPWSTST, m);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm
|
|
|
|
* @pwrdm: struct powerdomain * to clear
|
|
|
|
*
|
|
|
|
* Clear the powerdomain's previous power state register. Clears the
|
|
|
|
* entire register, including logic and memory bank previous power states.
|
|
|
|
* Returns -EINVAL if the powerdomain pointer is null, or returns 0 upon
|
|
|
|
* success.
|
|
|
|
*/
|
|
|
|
int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX should get the powerdomain's current state here;
|
|
|
|
* warn & fail if it is not ON.
|
|
|
|
*/
|
|
|
|
|
|
|
|
pr_debug("powerdomain: clearing previous power state reg for %s\n",
|
|
|
|
pwrdm->name);
|
|
|
|
|
|
|
|
prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
[ARM] OMAP3 pwrdm: add hardware save-and-restore (SAR) support
OMAP3430ES2+ introduces a new feature: optional powerdomain context
hardware save-and-restore (SAR). Currently, this feature only applies
to USBHOST and USBTLL module context when the USBHOST or CORE
powerdomains enter a low-power sleep state[1]. This feature avoids
re-enumeration of USB devices when the powerdomains return from idle,
which is potentially time-consuming.
This patch adds support for enabling and disabling hardware
save-and-restore to the powerdomain code. Three new functions are
added, pwrdm_enable_hdwr_sar(), pwrdm_disable_hdwr_sar(), and
pwrdm_can_hdwr_sar(). A new struct powerdomain "flags" field is
added, with a PWRDM_HAS_HDWR_SAR flag to indicate powerdomains with
SAR support.
Thanks to Jouni Högander <jouni.hogander@nokia.com> for reviewing an
earlier version of these patches, and Richard Woodruff <r-woodruff2@ti.com>
for clarifying the purpose of these bits.
1. For the USBHOST controller module, context loss occurs when the
USBHOST powerdomain enters off-idle. For USBTLL, context loss
occurs either if CORE enters off-idle, or if the CORE logic is
configured to turn off when CORE enters retention-idle (OSWR).
34xx ES2 TRM 4.8.6.1.1, 4.8.6.1.2
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-26 08:09:37 +08:00
|
|
|
/**
|
|
|
|
* pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm
|
|
|
|
* @pwrdm: struct powerdomain *
|
|
|
|
*
|
|
|
|
* Enable automatic context save-and-restore upon power state change
|
|
|
|
* for some devices in a powerdomain. Warning: this only affects a
|
|
|
|
* subset of devices in a powerdomain; check the TRM closely. Returns
|
|
|
|
* -EINVAL if the powerdomain pointer is null or if the powerdomain
|
|
|
|
* does not support automatic save-and-restore, or returns 0 upon
|
|
|
|
* success.
|
|
|
|
*/
|
|
|
|
int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n",
|
|
|
|
pwrdm->name);
|
|
|
|
|
|
|
|
prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
|
2010-01-27 11:12:53 +08:00
|
|
|
pwrdm->prcm_offs, pwrstctrl_reg_offs);
|
[ARM] OMAP3 pwrdm: add hardware save-and-restore (SAR) support
OMAP3430ES2+ introduces a new feature: optional powerdomain context
hardware save-and-restore (SAR). Currently, this feature only applies
to USBHOST and USBTLL module context when the USBHOST or CORE
powerdomains enter a low-power sleep state[1]. This feature avoids
re-enumeration of USB devices when the powerdomains return from idle,
which is potentially time-consuming.
This patch adds support for enabling and disabling hardware
save-and-restore to the powerdomain code. Three new functions are
added, pwrdm_enable_hdwr_sar(), pwrdm_disable_hdwr_sar(), and
pwrdm_can_hdwr_sar(). A new struct powerdomain "flags" field is
added, with a PWRDM_HAS_HDWR_SAR flag to indicate powerdomains with
SAR support.
Thanks to Jouni Högander <jouni.hogander@nokia.com> for reviewing an
earlier version of these patches, and Richard Woodruff <r-woodruff2@ti.com>
for clarifying the purpose of these bits.
1. For the USBHOST controller module, context loss occurs when the
USBHOST powerdomain enters off-idle. For USBTLL, context loss
occurs either if CORE enters off-idle, or if the CORE logic is
configured to turn off when CORE enters retention-idle (OSWR).
34xx ES2 TRM 4.8.6.1.1, 4.8.6.1.2
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-26 08:09:37 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm
|
|
|
|
* @pwrdm: struct powerdomain *
|
|
|
|
*
|
|
|
|
* Disable automatic context save-and-restore upon power state change
|
|
|
|
* for some devices in a powerdomain. Warning: this only affects a
|
|
|
|
* subset of devices in a powerdomain; check the TRM closely. Returns
|
|
|
|
* -EINVAL if the powerdomain pointer is null or if the powerdomain
|
|
|
|
* does not support automatic save-and-restore, or returns 0 upon
|
|
|
|
* success.
|
|
|
|
*/
|
|
|
|
int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n",
|
|
|
|
pwrdm->name);
|
|
|
|
|
|
|
|
prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0,
|
2010-01-27 11:12:53 +08:00
|
|
|
pwrdm->prcm_offs, pwrstctrl_reg_offs);
|
[ARM] OMAP3 pwrdm: add hardware save-and-restore (SAR) support
OMAP3430ES2+ introduces a new feature: optional powerdomain context
hardware save-and-restore (SAR). Currently, this feature only applies
to USBHOST and USBTLL module context when the USBHOST or CORE
powerdomains enter a low-power sleep state[1]. This feature avoids
re-enumeration of USB devices when the powerdomains return from idle,
which is potentially time-consuming.
This patch adds support for enabling and disabling hardware
save-and-restore to the powerdomain code. Three new functions are
added, pwrdm_enable_hdwr_sar(), pwrdm_disable_hdwr_sar(), and
pwrdm_can_hdwr_sar(). A new struct powerdomain "flags" field is
added, with a PWRDM_HAS_HDWR_SAR flag to indicate powerdomains with
SAR support.
Thanks to Jouni Högander <jouni.hogander@nokia.com> for reviewing an
earlier version of these patches, and Richard Woodruff <r-woodruff2@ti.com>
for clarifying the purpose of these bits.
1. For the USBHOST controller module, context loss occurs when the
USBHOST powerdomain enters off-idle. For USBTLL, context loss
occurs either if CORE enters off-idle, or if the CORE logic is
configured to turn off when CORE enters retention-idle (OSWR).
34xx ES2 TRM 4.8.6.1.1, 4.8.6.1.2
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-26 08:09:37 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR
|
|
|
|
* @pwrdm: struct powerdomain *
|
|
|
|
*
|
|
|
|
* Returns 1 if powerdomain 'pwrdm' supports hardware save-and-restore
|
|
|
|
* for some devices, or 0 if it does not.
|
|
|
|
*/
|
|
|
|
bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
|
|
|
|
}
|
|
|
|
|
2008-08-19 16:08:40 +08:00
|
|
|
/**
|
|
|
|
* pwrdm_wait_transition - wait for powerdomain power transition to finish
|
|
|
|
* @pwrdm: struct powerdomain * to wait for
|
|
|
|
*
|
|
|
|
* If the powerdomain pwrdm is in the process of a state transition,
|
|
|
|
* spin until it completes the power transition, or until an iteration
|
|
|
|
* bailout value is reached. Returns -EINVAL if the powerdomain
|
|
|
|
* pointer is null, -EAGAIN if the bailout value was reached, or
|
|
|
|
* returns 0 upon success.
|
|
|
|
*/
|
|
|
|
int pwrdm_wait_transition(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
u32 c = 0;
|
|
|
|
|
|
|
|
if (!pwrdm)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* REVISIT: pwrdm_wait_transition() may be better implemented
|
|
|
|
* via a callback and a periodic timer check -- how long do we expect
|
|
|
|
* powerdomain transitions to take?
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* XXX Is this udelay() value meaningful? */
|
2010-01-27 11:12:53 +08:00
|
|
|
while ((prm_read_mod_reg(pwrdm->prcm_offs, pwrstst_reg_offs) &
|
2008-08-19 16:08:40 +08:00
|
|
|
OMAP_INTRANSITION) &&
|
|
|
|
(c++ < PWRDM_TRANSITION_BAILOUT))
|
2010-01-27 11:12:53 +08:00
|
|
|
udelay(1);
|
2008-08-19 16:08:40 +08:00
|
|
|
|
2009-06-20 09:08:30 +08:00
|
|
|
if (c > PWRDM_TRANSITION_BAILOUT) {
|
2008-08-19 16:08:40 +08:00
|
|
|
printk(KERN_ERR "powerdomain: waited too long for "
|
|
|
|
"powerdomain %s to complete transition\n", pwrdm->name);
|
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
|
|
|
|
pr_debug("powerdomain: completed transition in %d loops\n", c);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-10-15 22:48:43 +08:00
|
|
|
int pwrdm_state_switch(struct powerdomain *pwrdm)
|
|
|
|
{
|
|
|
|
return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
|
|
|
|
}
|
|
|
|
|
|
|
|
int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
|
|
|
|
{
|
|
|
|
if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) {
|
|
|
|
pwrdm_wait_transition(clkdm->pwrdm.ptr);
|
|
|
|
return pwrdm_state_switch(clkdm->pwrdm.ptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
int pwrdm_clk_state_switch(struct clk *clk)
|
|
|
|
{
|
|
|
|
if (clk != NULL && clk->clkdm != NULL)
|
|
|
|
return pwrdm_clkdm_state_switch(clk->clkdm);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pwrdm_pre_transition(void)
|
|
|
|
{
|
2008-10-15 23:13:49 +08:00
|
|
|
pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
|
2008-10-15 22:48:43 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pwrdm_post_transition(void)
|
|
|
|
{
|
2008-10-15 23:13:49 +08:00
|
|
|
pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
|
2008-10-15 22:48:43 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2008-08-19 16:08:40 +08:00
|
|
|
|