2020-06-06 04:05:19 +08:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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2013-02-26 00:14:33 +08:00
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/*
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* Universal Flash Storage Host controller driver
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* Copyright (C) 2011-2013 Samsung India Software Operations
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2016-02-01 21:02:46 +08:00
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* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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2013-02-26 00:14:33 +08:00
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*
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* Authors:
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* Santosh Yaraganavi <santosh.sy@samsung.com>
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* Vinayak Holikatti <h.vinayak@samsung.com>
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*/
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#ifndef _UFSHCD_H
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#define _UFSHCD_H
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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2017-02-04 08:57:02 +08:00
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#include <linux/rwsem.h>
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2013-02-26 00:14:33 +08:00
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#include <linux/workqueue.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <linux/bitops.h>
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#include <linux/pm_runtime.h>
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#include <linux/clk.h>
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2013-06-27 01:09:29 +08:00
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#include <linux/completion.h>
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2014-09-25 20:32:22 +08:00
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#include <linux/regulator/consumer.h>
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2020-01-29 18:52:50 +08:00
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#include <linux/bitfield.h>
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2020-03-26 02:29:01 +08:00
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#include <linux/devfreq.h>
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2020-07-07 04:04:13 +08:00
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#include <linux/keyslot-manager.h>
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2016-03-10 23:37:20 +08:00
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#include "unipro.h"
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2013-02-26 00:14:33 +08:00
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#include <asm/irq.h>
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#include <asm/byteorder.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi_tcq.h>
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#include <scsi/scsi_dbg.h>
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#include <scsi/scsi_eh.h>
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#include "ufs.h"
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2020-05-08 16:01:09 +08:00
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#include "ufs_quirks.h"
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2013-02-26 00:14:33 +08:00
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#include "ufshci.h"
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#define UFSHCD "ufshcd"
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#define UFSHCD_DRIVER_VERSION "0.2"
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2014-09-25 20:32:21 +08:00
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struct ufs_hba;
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2013-07-30 03:05:57 +08:00
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enum dev_cmd_type {
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DEV_CMD_TYPE_NOP = 0x0,
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2013-07-30 03:05:58 +08:00
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DEV_CMD_TYPE_QUERY = 0x1,
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2013-07-30 03:05:57 +08:00
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};
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2020-12-05 19:58:59 +08:00
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enum ufs_event_type {
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/* uic specific errors */
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UFS_EVT_PA_ERR = 0,
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UFS_EVT_DL_ERR,
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UFS_EVT_NL_ERR,
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UFS_EVT_TL_ERR,
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UFS_EVT_DME_ERR,
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/* fatal errors */
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UFS_EVT_AUTO_HIBERN8_ERR,
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UFS_EVT_FATAL_ERR,
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UFS_EVT_LINK_STARTUP_FAIL,
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UFS_EVT_RESUME_ERR,
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UFS_EVT_SUSPEND_ERR,
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2021-04-24 08:20:16 +08:00
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UFS_EVT_WL_SUSP_ERR,
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UFS_EVT_WL_RES_ERR,
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2020-12-05 19:58:59 +08:00
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/* abnormal events */
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UFS_EVT_DEV_RESET,
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UFS_EVT_HOST_RESET,
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UFS_EVT_ABORT,
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UFS_EVT_CNT,
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};
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2013-02-26 00:14:33 +08:00
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/**
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* struct uic_command - UIC command structure
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* @command: UIC command
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* @argument1: UIC command argument 1
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* @argument2: UIC command argument 2
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* @argument3: UIC command argument 3
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2020-11-03 14:24:40 +08:00
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* @cmd_active: Indicate if UIC command is outstanding
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2013-06-27 01:09:29 +08:00
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* @done: UIC command completion
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2013-02-26 00:14:33 +08:00
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*/
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struct uic_command {
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u32 command;
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u32 argument1;
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u32 argument2;
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u32 argument3;
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2020-11-03 14:24:40 +08:00
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int cmd_active;
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2013-06-27 01:09:29 +08:00
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struct completion done;
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2013-02-26 00:14:33 +08:00
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};
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2014-09-25 20:32:30 +08:00
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/* Used to differentiate the power management options */
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enum ufs_pm_op {
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UFS_RUNTIME_PM,
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UFS_SYSTEM_PM,
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UFS_SHUTDOWN_PM,
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};
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/* Host <-> Device UniPro Link state */
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enum uic_link_state {
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UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
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UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
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UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
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scsi: ufs: Fix concurrency of error handler and other error recovery paths
Error recovery can be invoked from multiple code paths, including hibern8
enter/exit (from ufshcd_link_recovery), ufshcd_eh_host_reset_handler() and
eh_work scheduled from IRQ context. Ultimately, these paths are all trying
to invoke ufshcd_reset_and_restore() in either a synchronous or
asynchronous manner. This causes problems:
- If link recovery happens during ungate work, ufshcd_hold() would be
called recursively. Although commit 53c12d0ef6fc ("scsi: ufs: fix error
recovery after the hibern8 exit failure") fixed a deadlock due to
recursive calls of ufshcd_hold() by adding a check of eh_in_progress
into ufshcd_hold, this check allows eh_work to run in parallel while
link recovery is running.
- Similar concurrency can also happen when error recovery is invoked from
ufshcd_eh_host_reset_handler and ufshcd_link_recovery.
- Concurrency can even happen between eh_works. eh_work, currently queued
on system_wq, is allowed to have multiple instances running in parallel,
but we don't have proper protection for that.
If any of above concurrency scenarios happen, error recovery would fail and
lead ufs device and host into bad states. To fix the concurrency problem,
this change queues eh_work on a single threaded workqueue and removes link
recovery calls from the hibern8 enter/exit path. In addition, make use of
eh_work in eh_host_reset_handler instead of calling
ufshcd_reset_and_restore. This unifies the UFS error recovery mechanism.
According to the UFSHCI JEDEC spec, hibern8 enter/exit error occurs when
the link is broken. This essentially applies to any power mode change
operations (since they all use PACP_PWR cmds in UniPro layer). So, if a
power mode change operation (including AH8 enter/exit) fails, mark link
state as UIC_LINK_BROKEN_STATE and schedule the eh_work. In this case,
error handler needs to do a full reset and restore to recover the link back
to active. Before the link state is recovered to active,
ufshcd_uic_pwr_ctrl simply returns -ENOLINK to avoid more errors.
Link: https://lore.kernel.org/r/1596975355-39813-6-git-send-email-cang@codeaurora.org
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-08-09 20:15:51 +08:00
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UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */
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2014-09-25 20:32:30 +08:00
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};
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#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
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#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
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UIC_LINK_ACTIVE_STATE)
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#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
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UIC_LINK_HIBERN8_STATE)
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scsi: ufs: Fix concurrency of error handler and other error recovery paths
Error recovery can be invoked from multiple code paths, including hibern8
enter/exit (from ufshcd_link_recovery), ufshcd_eh_host_reset_handler() and
eh_work scheduled from IRQ context. Ultimately, these paths are all trying
to invoke ufshcd_reset_and_restore() in either a synchronous or
asynchronous manner. This causes problems:
- If link recovery happens during ungate work, ufshcd_hold() would be
called recursively. Although commit 53c12d0ef6fc ("scsi: ufs: fix error
recovery after the hibern8 exit failure") fixed a deadlock due to
recursive calls of ufshcd_hold() by adding a check of eh_in_progress
into ufshcd_hold, this check allows eh_work to run in parallel while
link recovery is running.
- Similar concurrency can also happen when error recovery is invoked from
ufshcd_eh_host_reset_handler and ufshcd_link_recovery.
- Concurrency can even happen between eh_works. eh_work, currently queued
on system_wq, is allowed to have multiple instances running in parallel,
but we don't have proper protection for that.
If any of above concurrency scenarios happen, error recovery would fail and
lead ufs device and host into bad states. To fix the concurrency problem,
this change queues eh_work on a single threaded workqueue and removes link
recovery calls from the hibern8 enter/exit path. In addition, make use of
eh_work in eh_host_reset_handler instead of calling
ufshcd_reset_and_restore. This unifies the UFS error recovery mechanism.
According to the UFSHCI JEDEC spec, hibern8 enter/exit error occurs when
the link is broken. This essentially applies to any power mode change
operations (since they all use PACP_PWR cmds in UniPro layer). So, if a
power mode change operation (including AH8 enter/exit) fails, mark link
state as UIC_LINK_BROKEN_STATE and schedule the eh_work. In this case,
error handler needs to do a full reset and restore to recover the link back
to active. Before the link state is recovered to active,
ufshcd_uic_pwr_ctrl simply returns -ENOLINK to avoid more errors.
Link: https://lore.kernel.org/r/1596975355-39813-6-git-send-email-cang@codeaurora.org
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-08-09 20:15:51 +08:00
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#define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
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UIC_LINK_BROKEN_STATE)
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2014-09-25 20:32:30 +08:00
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#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
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#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
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UIC_LINK_ACTIVE_STATE)
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#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
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UIC_LINK_HIBERN8_STATE)
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scsi: ufs: Fix concurrency of error handler and other error recovery paths
Error recovery can be invoked from multiple code paths, including hibern8
enter/exit (from ufshcd_link_recovery), ufshcd_eh_host_reset_handler() and
eh_work scheduled from IRQ context. Ultimately, these paths are all trying
to invoke ufshcd_reset_and_restore() in either a synchronous or
asynchronous manner. This causes problems:
- If link recovery happens during ungate work, ufshcd_hold() would be
called recursively. Although commit 53c12d0ef6fc ("scsi: ufs: fix error
recovery after the hibern8 exit failure") fixed a deadlock due to
recursive calls of ufshcd_hold() by adding a check of eh_in_progress
into ufshcd_hold, this check allows eh_work to run in parallel while
link recovery is running.
- Similar concurrency can also happen when error recovery is invoked from
ufshcd_eh_host_reset_handler and ufshcd_link_recovery.
- Concurrency can even happen between eh_works. eh_work, currently queued
on system_wq, is allowed to have multiple instances running in parallel,
but we don't have proper protection for that.
If any of above concurrency scenarios happen, error recovery would fail and
lead ufs device and host into bad states. To fix the concurrency problem,
this change queues eh_work on a single threaded workqueue and removes link
recovery calls from the hibern8 enter/exit path. In addition, make use of
eh_work in eh_host_reset_handler instead of calling
ufshcd_reset_and_restore. This unifies the UFS error recovery mechanism.
According to the UFSHCI JEDEC spec, hibern8 enter/exit error occurs when
the link is broken. This essentially applies to any power mode change
operations (since they all use PACP_PWR cmds in UniPro layer). So, if a
power mode change operation (including AH8 enter/exit) fails, mark link
state as UIC_LINK_BROKEN_STATE and schedule the eh_work. In this case,
error handler needs to do a full reset and restore to recover the link back
to active. Before the link state is recovered to active,
ufshcd_uic_pwr_ctrl simply returns -ENOLINK to avoid more errors.
Link: https://lore.kernel.org/r/1596975355-39813-6-git-send-email-cang@codeaurora.org
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-08-09 20:15:51 +08:00
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#define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
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UIC_LINK_BROKEN_STATE)
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2014-09-25 20:32:30 +08:00
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2020-03-27 17:58:35 +08:00
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#define ufshcd_set_ufs_dev_active(h) \
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((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
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#define ufshcd_set_ufs_dev_sleep(h) \
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((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
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#define ufshcd_set_ufs_dev_poweroff(h) \
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((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
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2020-11-03 22:14:02 +08:00
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#define ufshcd_set_ufs_dev_deepsleep(h) \
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((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE)
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2020-03-27 17:58:35 +08:00
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#define ufshcd_is_ufs_dev_active(h) \
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((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
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#define ufshcd_is_ufs_dev_sleep(h) \
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((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
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#define ufshcd_is_ufs_dev_poweroff(h) \
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((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
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2020-11-03 22:14:02 +08:00
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#define ufshcd_is_ufs_dev_deepsleep(h) \
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((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
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2020-03-27 17:58:35 +08:00
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2014-09-25 20:32:30 +08:00
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/*
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* UFS Power management levels.
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2020-11-03 22:14:02 +08:00
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* Each level is in increasing order of power savings, except DeepSleep
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* which is lower than PowerDown with power on but not PowerDown with
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* power off.
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2014-09-25 20:32:30 +08:00
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*/
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enum ufs_pm_level {
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2021-05-20 04:20:58 +08:00
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UFS_PM_LVL_0,
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UFS_PM_LVL_1,
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UFS_PM_LVL_2,
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UFS_PM_LVL_3,
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UFS_PM_LVL_4,
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UFS_PM_LVL_5,
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UFS_PM_LVL_6,
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2014-09-25 20:32:30 +08:00
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UFS_PM_LVL_MAX
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};
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struct ufs_pm_lvl_states {
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enum ufs_dev_pwr_mode dev_state;
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enum uic_link_state link_state;
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};
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2013-02-26 00:14:33 +08:00
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/**
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* struct ufshcd_lrb - local reference block
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* @utr_descriptor_ptr: UTRD address of the command
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2013-07-30 03:05:57 +08:00
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* @ucd_req_ptr: UCD address of the command
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2013-02-26 00:14:33 +08:00
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* @ucd_rsp_ptr: Response UPIU address for this command
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* @ucd_prdt_ptr: PRDT address of the command
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2016-12-23 10:42:18 +08:00
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* @utrd_dma_addr: UTRD dma address for debug
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* @ucd_prdt_dma_addr: PRDT dma address for debug
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* @ucd_rsp_dma_addr: UPIU response dma address for debug
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* @ucd_req_dma_addr: UPIU request dma address for debug
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2013-02-26 00:14:33 +08:00
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* @cmd: pointer to SCSI command
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* @sense_buffer: pointer to sense buffer address of the SCSI command
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* @sense_bufflen: Length of the sense buffer
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* @scsi_status: SCSI status of the command
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* @command_type: SCSI, UFS, Query.
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* @task_tag: Task tag of the command
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* @lun: LUN of the command
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2013-07-30 03:05:57 +08:00
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* @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
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2016-12-23 10:42:18 +08:00
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* @issue_time_stamp: time stamp for debug purposes
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2017-09-27 10:06:06 +08:00
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* @compl_time_stamp: time stamp for statistics
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2020-07-07 04:04:14 +08:00
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* @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
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* @data_unit_num: the data unit number for the first block for inline crypto
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2017-02-04 08:56:40 +08:00
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* @req_abort_skip: skip request abort task flag
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2013-02-26 00:14:33 +08:00
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*/
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struct ufshcd_lrb {
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struct utp_transfer_req_desc *utr_descriptor_ptr;
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2013-07-30 03:05:57 +08:00
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struct utp_upiu_req *ucd_req_ptr;
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2013-02-26 00:14:33 +08:00
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struct utp_upiu_rsp *ucd_rsp_ptr;
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struct ufshcd_sg_entry *ucd_prdt_ptr;
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2016-12-23 10:42:18 +08:00
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dma_addr_t utrd_dma_addr;
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|
dma_addr_t ucd_req_dma_addr;
|
|
|
|
dma_addr_t ucd_rsp_dma_addr;
|
|
|
|
dma_addr_t ucd_prdt_dma_addr;
|
|
|
|
|
2013-02-26 00:14:33 +08:00
|
|
|
struct scsi_cmnd *cmd;
|
|
|
|
u8 *sense_buffer;
|
|
|
|
unsigned int sense_bufflen;
|
|
|
|
int scsi_status;
|
|
|
|
|
|
|
|
int command_type;
|
|
|
|
int task_tag;
|
2014-09-25 20:32:29 +08:00
|
|
|
u8 lun; /* UPIU LUN id field is only 8-bit wide */
|
2013-07-30 03:05:57 +08:00
|
|
|
bool intr_cmd;
|
2016-12-23 10:42:18 +08:00
|
|
|
ktime_t issue_time_stamp;
|
2017-09-27 10:06:06 +08:00
|
|
|
ktime_t compl_time_stamp;
|
2020-07-07 04:04:14 +08:00
|
|
|
#ifdef CONFIG_SCSI_UFS_CRYPTO
|
|
|
|
int crypto_key_slot;
|
|
|
|
u64 data_unit_num;
|
|
|
|
#endif
|
2017-02-04 08:56:40 +08:00
|
|
|
|
|
|
|
bool req_abort_skip;
|
2013-02-26 00:14:33 +08:00
|
|
|
};
|
|
|
|
|
2013-07-30 03:05:58 +08:00
|
|
|
/**
|
2016-02-09 16:25:41 +08:00
|
|
|
* struct ufs_query - holds relevant data structures for query request
|
2013-07-30 03:05:58 +08:00
|
|
|
* @request: request upiu and function
|
|
|
|
* @descriptor: buffer for sending/receiving descriptor
|
|
|
|
* @response: response upiu and response
|
|
|
|
*/
|
|
|
|
struct ufs_query {
|
|
|
|
struct ufs_query_req request;
|
|
|
|
u8 *descriptor;
|
|
|
|
struct ufs_query_res response;
|
|
|
|
};
|
|
|
|
|
2013-07-30 03:05:57 +08:00
|
|
|
/**
|
|
|
|
* struct ufs_dev_cmd - all assosiated fields with device management commands
|
|
|
|
* @type: device management command type - Query, NOP OUT
|
|
|
|
* @lock: lock to allow one command at a time
|
|
|
|
* @complete: internal commands completion
|
|
|
|
*/
|
|
|
|
struct ufs_dev_cmd {
|
|
|
|
enum dev_cmd_type type;
|
|
|
|
struct mutex lock;
|
|
|
|
struct completion *complete;
|
2013-07-30 03:05:58 +08:00
|
|
|
struct ufs_query query;
|
2013-07-30 03:05:57 +08:00
|
|
|
};
|
2013-02-26 00:14:33 +08:00
|
|
|
|
2014-09-25 20:32:23 +08:00
|
|
|
/**
|
|
|
|
* struct ufs_clk_info - UFS clock related info
|
|
|
|
* @list: list headed by hba->clk_list_head
|
|
|
|
* @clk: clock node
|
|
|
|
* @name: clock name
|
|
|
|
* @max_freq: maximum frequency supported by the clock
|
2014-09-25 20:32:33 +08:00
|
|
|
* @min_freq: min frequency that can be used for clock scaling
|
2014-09-25 20:32:34 +08:00
|
|
|
* @curr_freq: indicates the current frequency that it is set to
|
2020-11-26 10:01:00 +08:00
|
|
|
* @keep_link_active: indicates that the clk should not be disabled if
|
|
|
|
link is active
|
2014-09-25 20:32:23 +08:00
|
|
|
* @enabled: variable to check against multiple enable/disable
|
|
|
|
*/
|
|
|
|
struct ufs_clk_info {
|
|
|
|
struct list_head list;
|
|
|
|
struct clk *clk;
|
|
|
|
const char *name;
|
|
|
|
u32 max_freq;
|
2014-09-25 20:32:33 +08:00
|
|
|
u32 min_freq;
|
2014-09-25 20:32:34 +08:00
|
|
|
u32 curr_freq;
|
2020-11-26 10:01:00 +08:00
|
|
|
bool keep_link_active;
|
2014-09-25 20:32:23 +08:00
|
|
|
bool enabled;
|
|
|
|
};
|
|
|
|
|
2015-10-28 19:15:51 +08:00
|
|
|
enum ufs_notify_change_status {
|
|
|
|
PRE_CHANGE,
|
|
|
|
POST_CHANGE,
|
|
|
|
};
|
2014-09-25 20:32:31 +08:00
|
|
|
|
|
|
|
struct ufs_pa_layer_attr {
|
|
|
|
u32 gear_rx;
|
|
|
|
u32 gear_tx;
|
|
|
|
u32 lane_rx;
|
|
|
|
u32 lane_tx;
|
|
|
|
u32 pwr_rx;
|
|
|
|
u32 pwr_tx;
|
|
|
|
u32 hs_rate;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct ufs_pwr_mode_info {
|
|
|
|
bool is_valid;
|
|
|
|
struct ufs_pa_layer_attr info;
|
|
|
|
};
|
|
|
|
|
2014-09-25 20:32:21 +08:00
|
|
|
/**
|
|
|
|
* struct ufs_hba_variant_ops - variant specific callbacks
|
|
|
|
* @name: variant name
|
|
|
|
* @init: called when the driver is initialized
|
|
|
|
* @exit: called to cleanup everything done in init
|
2015-05-17 23:55:05 +08:00
|
|
|
* @get_ufs_hci_version: called to get UFS HCI version
|
2014-09-25 20:32:34 +08:00
|
|
|
* @clk_scale_notify: notifies that clks are scaled up/down
|
2014-09-25 20:32:21 +08:00
|
|
|
* @setup_clocks: called before touching any of the controller registers
|
|
|
|
* @hce_enable_notify: called before and after HCE enable bit is set to allow
|
|
|
|
* variant specific Uni-Pro initialization.
|
|
|
|
* @link_startup_notify: called before and after Link startup is carried out
|
|
|
|
* to allow variant specific Uni-Pro initialization.
|
2014-09-25 20:32:31 +08:00
|
|
|
* @pwr_change_notify: called before and after a power mode change
|
|
|
|
* is carried out to allow vendor spesific capabilities
|
|
|
|
* to be set.
|
2016-11-10 20:14:36 +08:00
|
|
|
* @setup_xfer_req: called before any transfer request is issued
|
|
|
|
* to set some things
|
2016-11-10 20:16:15 +08:00
|
|
|
* @setup_task_mgmt: called before any task management request is issued
|
|
|
|
* to set some things
|
2016-11-10 20:17:43 +08:00
|
|
|
* @hibern8_notify: called around hibern8 enter/exit
|
2016-12-06 11:25:32 +08:00
|
|
|
* @apply_dev_quirks: called to apply device specific quirks
|
2014-09-25 20:32:30 +08:00
|
|
|
* @suspend: called during host controller PM callback
|
|
|
|
* @resume: called during host controller PM callback
|
2015-10-28 19:15:50 +08:00
|
|
|
* @dbg_register_dump: used to dump controller debug information
|
2016-05-11 19:21:30 +08:00
|
|
|
* @phy_initialization: used to initialize phys
|
2019-08-29 03:17:54 +08:00
|
|
|
* @device_reset: called to issue a reset pulse on the UFS device
|
2020-07-10 15:20:11 +08:00
|
|
|
* @program_key: program or evict an inline encryption key
|
2020-12-05 19:59:00 +08:00
|
|
|
* @event_notify: called to notify important events
|
2014-09-25 20:32:21 +08:00
|
|
|
*/
|
|
|
|
struct ufs_hba_variant_ops {
|
|
|
|
const char *name;
|
|
|
|
int (*init)(struct ufs_hba *);
|
|
|
|
void (*exit)(struct ufs_hba *);
|
2015-05-17 23:55:05 +08:00
|
|
|
u32 (*get_ufs_hci_version)(struct ufs_hba *);
|
2015-10-28 19:15:51 +08:00
|
|
|
int (*clk_scale_notify)(struct ufs_hba *, bool,
|
|
|
|
enum ufs_notify_change_status);
|
2016-10-07 12:48:22 +08:00
|
|
|
int (*setup_clocks)(struct ufs_hba *, bool,
|
|
|
|
enum ufs_notify_change_status);
|
2015-10-28 19:15:51 +08:00
|
|
|
int (*hce_enable_notify)(struct ufs_hba *,
|
|
|
|
enum ufs_notify_change_status);
|
|
|
|
int (*link_startup_notify)(struct ufs_hba *,
|
|
|
|
enum ufs_notify_change_status);
|
2014-09-25 20:32:31 +08:00
|
|
|
int (*pwr_change_notify)(struct ufs_hba *,
|
2015-10-28 19:15:51 +08:00
|
|
|
enum ufs_notify_change_status status,
|
|
|
|
struct ufs_pa_layer_attr *,
|
2014-09-25 20:32:31 +08:00
|
|
|
struct ufs_pa_layer_attr *);
|
2016-11-10 20:14:36 +08:00
|
|
|
void (*setup_xfer_req)(struct ufs_hba *, int, bool);
|
2016-11-10 20:16:15 +08:00
|
|
|
void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
|
2016-11-10 20:17:43 +08:00
|
|
|
void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
|
2016-12-06 11:25:32 +08:00
|
|
|
enum ufs_notify_change_status);
|
2020-01-20 21:08:14 +08:00
|
|
|
int (*apply_dev_quirks)(struct ufs_hba *hba);
|
2020-05-08 16:01:09 +08:00
|
|
|
void (*fixup_dev_quirks)(struct ufs_hba *hba);
|
2014-09-25 20:32:30 +08:00
|
|
|
int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
|
|
|
|
int (*resume)(struct ufs_hba *, enum ufs_pm_op);
|
2015-10-28 19:15:50 +08:00
|
|
|
void (*dbg_register_dump)(struct ufs_hba *hba);
|
2016-05-11 19:21:30 +08:00
|
|
|
int (*phy_initialization)(struct ufs_hba *);
|
2020-11-03 22:14:03 +08:00
|
|
|
int (*device_reset)(struct ufs_hba *hba);
|
2020-03-26 02:29:01 +08:00
|
|
|
void (*config_scaling_param)(struct ufs_hba *hba,
|
|
|
|
struct devfreq_dev_profile *profile,
|
|
|
|
void *data);
|
2020-07-10 15:20:11 +08:00
|
|
|
int (*program_key)(struct ufs_hba *hba,
|
|
|
|
const union ufs_crypto_cfg_entry *cfg, int slot);
|
2020-12-05 19:59:00 +08:00
|
|
|
void (*event_notify)(struct ufs_hba *hba,
|
|
|
|
enum ufs_event_type evt, void *data);
|
2014-09-25 20:32:21 +08:00
|
|
|
};
|
|
|
|
|
2014-09-25 20:32:32 +08:00
|
|
|
/* clock gating state */
|
|
|
|
enum clk_gating_state {
|
|
|
|
CLKS_OFF,
|
|
|
|
CLKS_ON,
|
|
|
|
REQ_CLKS_OFF,
|
|
|
|
REQ_CLKS_ON,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct ufs_clk_gating - UFS clock gating related info
|
|
|
|
* @gate_work: worker to turn off clocks after some delay as specified in
|
|
|
|
* delay_ms
|
|
|
|
* @ungate_work: worker to turn on clocks that will be used in case of
|
|
|
|
* interrupt context
|
|
|
|
* @state: the current clocks state
|
|
|
|
* @delay_ms: gating delay in ms
|
|
|
|
* @is_suspended: clk gating is suspended when set to 1 which can be used
|
|
|
|
* during suspend/resume
|
|
|
|
* @delay_attr: sysfs attribute to control delay_attr
|
2016-12-23 10:40:39 +08:00
|
|
|
* @enable_attr: sysfs attribute to enable/disable clock gating
|
|
|
|
* @is_enabled: Indicates the current status of clock gating
|
2021-01-20 18:04:22 +08:00
|
|
|
* @is_initialized: Indicates whether clock gating is initialized or not
|
2014-09-25 20:32:32 +08:00
|
|
|
* @active_reqs: number of requests that are pending and should be waited for
|
|
|
|
* completion before gating clocks.
|
|
|
|
*/
|
|
|
|
struct ufs_clk_gating {
|
|
|
|
struct delayed_work gate_work;
|
|
|
|
struct work_struct ungate_work;
|
|
|
|
enum clk_gating_state state;
|
|
|
|
unsigned long delay_ms;
|
|
|
|
bool is_suspended;
|
|
|
|
struct device_attribute delay_attr;
|
2016-12-23 10:40:39 +08:00
|
|
|
struct device_attribute enable_attr;
|
|
|
|
bool is_enabled;
|
2021-01-20 18:04:22 +08:00
|
|
|
bool is_initialized;
|
2014-09-25 20:32:32 +08:00
|
|
|
int active_reqs;
|
2018-05-03 19:07:22 +08:00
|
|
|
struct workqueue_struct *clk_gating_workq;
|
2014-09-25 20:32:32 +08:00
|
|
|
};
|
|
|
|
|
2017-02-04 08:57:02 +08:00
|
|
|
struct ufs_saved_pwr_info {
|
|
|
|
struct ufs_pa_layer_attr info;
|
|
|
|
bool is_valid;
|
|
|
|
};
|
|
|
|
|
2017-02-04 08:57:39 +08:00
|
|
|
/**
|
|
|
|
* struct ufs_clk_scaling - UFS clock scaling related data
|
|
|
|
* @active_reqs: number of requests that are pending. If this is zero when
|
|
|
|
* devfreq ->target() function is called then schedule "suspend_work" to
|
|
|
|
* suspend devfreq.
|
|
|
|
* @tot_busy_t: Total busy time in current polling window
|
|
|
|
* @window_start_t: Start time (in jiffies) of the current polling window
|
|
|
|
* @busy_start_t: Start time of current busy period
|
|
|
|
* @enable_attr: sysfs attribute to enable/disable clock scaling
|
|
|
|
* @saved_pwr_info: UFS power mode may also be changed during scaling and this
|
|
|
|
* one keeps track of previous power mode.
|
|
|
|
* @workq: workqueue to schedule devfreq suspend/resume work
|
|
|
|
* @suspend_work: worker to suspend devfreq
|
|
|
|
* @resume_work: worker to resume devfreq
|
2020-11-27 09:58:48 +08:00
|
|
|
* @min_gear: lowest HS gear to scale down to
|
2021-01-20 18:04:21 +08:00
|
|
|
* @is_enabled: tracks if scaling is currently enabled or not, controlled by
|
|
|
|
clkscale_enable sysfs node
|
|
|
|
* @is_allowed: tracks if scaling is currently allowed or not, used to block
|
|
|
|
clock scaling which is not invoked from devfreq governor
|
2021-01-20 18:04:22 +08:00
|
|
|
* @is_initialized: Indicates whether clock scaling is initialized or not
|
2017-02-04 08:57:39 +08:00
|
|
|
* @is_busy_started: tracks if busy period has started or not
|
|
|
|
* @is_suspended: tracks if devfreq is suspended or not
|
|
|
|
*/
|
2014-09-25 20:32:34 +08:00
|
|
|
struct ufs_clk_scaling {
|
2017-02-04 08:57:39 +08:00
|
|
|
int active_reqs;
|
|
|
|
unsigned long tot_busy_t;
|
2020-06-11 18:10:43 +08:00
|
|
|
ktime_t window_start_t;
|
2017-02-04 08:57:39 +08:00
|
|
|
ktime_t busy_start_t;
|
2016-12-23 10:40:50 +08:00
|
|
|
struct device_attribute enable_attr;
|
2017-02-04 08:57:02 +08:00
|
|
|
struct ufs_saved_pwr_info saved_pwr_info;
|
2017-02-04 08:57:39 +08:00
|
|
|
struct workqueue_struct *workq;
|
|
|
|
struct work_struct suspend_work;
|
|
|
|
struct work_struct resume_work;
|
2020-11-27 09:58:48 +08:00
|
|
|
u32 min_gear;
|
2021-01-20 18:04:21 +08:00
|
|
|
bool is_enabled;
|
2017-02-04 08:57:39 +08:00
|
|
|
bool is_allowed;
|
2021-01-20 18:04:22 +08:00
|
|
|
bool is_initialized;
|
2017-02-04 08:57:39 +08:00
|
|
|
bool is_busy_started;
|
|
|
|
bool is_suspended;
|
2014-09-25 20:32:34 +08:00
|
|
|
};
|
|
|
|
|
2020-12-05 19:58:59 +08:00
|
|
|
#define UFS_EVENT_HIST_LENGTH 8
|
2016-12-23 10:42:18 +08:00
|
|
|
/**
|
2020-12-05 19:58:59 +08:00
|
|
|
* struct ufs_event_hist - keeps history of errors
|
2016-12-23 10:42:18 +08:00
|
|
|
* @pos: index to indicate cyclic buffer position
|
|
|
|
* @reg: cyclic buffer for registers value
|
|
|
|
* @tstamp: cyclic buffer for time stamp
|
2021-01-07 15:25:38 +08:00
|
|
|
* @cnt: error counter
|
2016-12-23 10:42:18 +08:00
|
|
|
*/
|
2020-12-05 19:58:59 +08:00
|
|
|
struct ufs_event_hist {
|
2016-12-23 10:42:18 +08:00
|
|
|
int pos;
|
2020-12-05 19:58:59 +08:00
|
|
|
u32 val[UFS_EVENT_HIST_LENGTH];
|
|
|
|
ktime_t tstamp[UFS_EVENT_HIST_LENGTH];
|
2021-01-07 15:25:38 +08:00
|
|
|
unsigned long long cnt;
|
2016-12-23 10:42:18 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct ufs_stats - keeps usage/err statistics
|
2020-08-09 20:15:50 +08:00
|
|
|
* @last_intr_status: record the last interrupt status.
|
|
|
|
* @last_intr_ts: record the last interrupt timestamp.
|
2016-12-23 10:42:18 +08:00
|
|
|
* @hibern8_exit_cnt: Counter to keep track of number of exits,
|
|
|
|
* reset this after link-startup.
|
|
|
|
* @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
|
|
|
|
* Clear after the first successful command completion.
|
|
|
|
*/
|
|
|
|
struct ufs_stats {
|
2020-08-09 20:15:50 +08:00
|
|
|
u32 last_intr_status;
|
|
|
|
ktime_t last_intr_ts;
|
|
|
|
|
2016-12-23 10:42:18 +08:00
|
|
|
u32 hibern8_exit_cnt;
|
|
|
|
ktime_t last_hibern8_exit_tstamp;
|
2020-12-05 19:58:59 +08:00
|
|
|
struct ufs_event_hist event[UFS_EVT_CNT];
|
2016-12-23 10:42:18 +08:00
|
|
|
};
|
|
|
|
|
2020-02-21 22:08:12 +08:00
|
|
|
enum ufshcd_quirks {
|
|
|
|
/* Interrupt aggregation support is broken */
|
|
|
|
UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
|
|
|
|
|
|
|
|
/*
|
|
|
|
* delay before each dme command is required as the unipro
|
|
|
|
* layer has shown instabilities
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If UFS host controller is having issue in processing LCC (Line
|
|
|
|
* Control Command) coming from device then enable this quirk.
|
|
|
|
* When this quirk is enabled, host controller driver should disable
|
|
|
|
* the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
|
|
|
|
* attribute of device to 0).
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The attribute PA_RXHSUNTERMCAP specifies whether or not the
|
|
|
|
* inbound Link supports unterminated line in HS mode. Setting this
|
|
|
|
* attribute to 1 fixes moving to HS gear.
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This quirk needs to be enabled if the host controller only allows
|
|
|
|
* accessing the peer dme attributes in AUTO mode (FAST AUTO or
|
|
|
|
* SLOW AUTO).
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This quirk needs to be enabled if the host controller doesn't
|
|
|
|
* advertise the correct version in UFS_VER register. If this quirk
|
|
|
|
* is enabled, standard UFS host driver will call the vendor specific
|
|
|
|
* ops (get_ufs_hci_version) to get the correct version.
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
|
2020-05-28 09:16:49 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Clear handling for transfer/task request list is just opposite.
|
|
|
|
*/
|
|
|
|
UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6,
|
2020-05-28 09:16:50 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This quirk needs to be enabled if host controller doesn't allow
|
|
|
|
* that the interrupt aggregation timer and counter are reset by s/w.
|
|
|
|
*/
|
|
|
|
UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
|
2020-05-28 09:16:51 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This quirks needs to be enabled if host controller cannot be
|
|
|
|
* enabled via HCE register.
|
|
|
|
*/
|
|
|
|
UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
|
2020-05-28 09:16:52 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This quirk needs to be enabled if the host controller regards
|
|
|
|
* resolution of the values of PRDTO and PRDTL in UTRD as byte.
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9,
|
2020-05-28 09:16:53 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This quirk needs to be enabled if the host controller reports
|
|
|
|
* OCS FATAL ERROR with device error through sense data
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10,
|
2020-08-25 09:43:15 +08:00
|
|
|
|
2020-08-10 22:10:24 +08:00
|
|
|
/*
|
|
|
|
* This quirk needs to be enabled if the host controller has
|
|
|
|
* auto-hibernate capability but it doesn't work.
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11,
|
2020-09-15 23:24:32 +08:00
|
|
|
|
2020-08-25 09:43:15 +08:00
|
|
|
/*
|
|
|
|
* This quirk needs to disable manual flush for write booster
|
|
|
|
*/
|
2020-09-15 23:24:32 +08:00
|
|
|
UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12,
|
|
|
|
|
2020-12-21 09:24:40 +08:00
|
|
|
/*
|
|
|
|
* This quirk needs to disable unipro timeout values
|
|
|
|
* before power mode change
|
|
|
|
*/
|
|
|
|
UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
|
|
|
|
|
2021-01-19 11:33:41 +08:00
|
|
|
/*
|
|
|
|
* This quirk allows only sg entries aligned with page size.
|
|
|
|
*/
|
2021-02-11 18:46:38 +08:00
|
|
|
UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14,
|
2020-02-21 22:08:12 +08:00
|
|
|
};
|
|
|
|
|
2020-03-18 18:40:11 +08:00
|
|
|
enum ufshcd_caps {
|
|
|
|
/* Allow dynamic clk gating */
|
|
|
|
UFSHCD_CAP_CLK_GATING = 1 << 0,
|
|
|
|
|
|
|
|
/* Allow hiberb8 with clk gating */
|
|
|
|
UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
|
|
|
|
|
|
|
|
/* Allow dynamic clk scaling */
|
|
|
|
UFSHCD_CAP_CLK_SCALING = 1 << 2,
|
|
|
|
|
|
|
|
/* Allow auto bkops to enabled during runtime suspend */
|
|
|
|
UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This capability allows host controller driver to use the UFS HCI's
|
|
|
|
* interrupt aggregation capability.
|
|
|
|
* CAUTION: Enabling this might reduce overall UFS throughput.
|
|
|
|
*/
|
|
|
|
UFSHCD_CAP_INTR_AGGR = 1 << 4,
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This capability allows the device auto-bkops to be always enabled
|
|
|
|
* except during suspend (both runtime and suspend).
|
|
|
|
* Enabling this capability means that device will always be allowed
|
|
|
|
* to do background operation when it's active but it might degrade
|
|
|
|
* the performance of ongoing read/write operations.
|
|
|
|
*/
|
|
|
|
UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This capability allows host controller driver to automatically
|
|
|
|
* enable runtime power management by itself instead of waiting
|
|
|
|
* for userspace to control the power management.
|
|
|
|
*/
|
|
|
|
UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
|
2020-04-23 05:41:42 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This capability allows the host controller driver to turn-on
|
|
|
|
* WriteBooster, if the underlying device supports it and is
|
|
|
|
* provisioned to be used. This would increase the write performance.
|
|
|
|
*/
|
|
|
|
UFSHCD_CAP_WB_EN = 1 << 7,
|
2020-07-07 04:04:12 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This capability allows the host controller driver to use the
|
|
|
|
* inline crypto engine, if it is present
|
|
|
|
*/
|
|
|
|
UFSHCD_CAP_CRYPTO = 1 << 8,
|
2020-10-28 03:10:36 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This capability allows the controller regulators to be put into
|
|
|
|
* lpm mode aggressively during clock gating.
|
|
|
|
* This would increase power savings.
|
|
|
|
*/
|
|
|
|
UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9,
|
2020-11-03 22:14:02 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This capability allows the host controller driver to use DeepSleep,
|
|
|
|
* if it is supported by the UFS device. The host controller driver must
|
|
|
|
* support device hardware reset via the hba->device_reset() callback,
|
|
|
|
* in order to exit DeepSleep state.
|
|
|
|
*/
|
|
|
|
UFSHCD_CAP_DEEPSLEEP = 1 << 10,
|
2020-03-18 18:40:11 +08:00
|
|
|
};
|
|
|
|
|
2020-05-09 17:37:13 +08:00
|
|
|
struct ufs_hba_variant_params {
|
|
|
|
struct devfreq_dev_profile devfreq_profile;
|
|
|
|
struct devfreq_simple_ondemand_data ondemand_data;
|
|
|
|
u16 hba_enable_delay_us;
|
2020-05-09 17:37:15 +08:00
|
|
|
u32 wb_flush_threshold;
|
2020-05-09 17:37:13 +08:00
|
|
|
};
|
|
|
|
|
scsi: ufs: ufshpb: Introduce Host Performance Buffer feature
Implement Host Performance Buffer (HPB) initialization and add function
calls to UFS core driver.
NAND flash-based storage devices, including UFS, have mechanisms to
translate logical addresses of I/O requests to the corresponding physical
addresses of the flash storage. In UFS, logical-to-physical-address (L2P)
map data, which is required to identify the physical address for the
requested I/Os, can only be partially stored in SRAM from NAND flash. Due
to this partial loading, accessing the flash address area, where the L2P
information for that address is not loaded in the SRAM, can result in
serious performance degradation.
The basic concept of HPB is to cache L2P mapping entries in host system
memory so that both physical block address (PBA) and logical block address
(LBA) can be delivered in HPB read command. The HPB read command allows to
read data faster than a regular read command in UFS since it provides the
physical address (HPB Entry) of the desired logical block in addition to
its logical address. The UFS device can access the physical block in NAND
directly without searching and uploading L2P mapping table. This improves
read performance because the NAND read operation for uploading L2P mapping
table is removed.
In HPB initialization, the host checks if the UFS device supports HPB
feature and retrieves related device capabilities. Then, HPB parameters are
configured in the device.
Total start-up time of popular applications was measured and the difference
observed between HPB being enabled and disabled. Popular applications are
12 game apps and 24 non-game apps. Each test cycle consists of running 36
applications in sequence. We repeated the cycle for observing performance
improvement by L2P mapping cache hit in HPB.
The following is the test environment:
- kernel version: 4.4.0
- RAM: 8GB
- UFS 2.1 (64GB)
Results:
+-------+----------+----------+-------+
| cycle | baseline | with HPB | diff |
+-------+----------+----------+-------+
| 1 | 272.4 | 264.9 | -7.5 |
| 2 | 250.4 | 248.2 | -2.2 |
| 3 | 226.2 | 215.6 | -10.6 |
| 4 | 230.6 | 214.8 | -15.8 |
| 5 | 232.0 | 218.1 | -13.9 |
| 6 | 231.9 | 212.6 | -19.3 |
+-------+----------+----------+-------+
We also measured HPB performance using iozone:
$ iozone -r 4k -+n -i2 -ecI -t 16 -l 16 -u 16 -s $IO_RANGE/16 -F \
mnt/tmp_1 mnt/tmp_2 mnt/tmp_3 mnt/tmp_4 mnt/tmp_5 mnt/tmp_6 mnt/tmp_7 \
mnt/tmp_8 mnt/tmp_9 mnt/tmp_10 mnt/tmp_11 mnt/tmp_12 mnt/tmp_13 \
mnt/tmp_14 mnt/tmp_15 mnt/tmp_16
Results:
+----------+--------+---------+
| IO range | HPB on | HPB off |
+----------+--------+---------+
| 1 GB | 294.8 | 300.87 |
| 4 GB | 293.51 | 179.35 |
| 8 GB | 294.85 | 162.52 |
| 16 GB | 293.45 | 156.26 |
| 32 GB | 277.4 | 153.25 |
+----------+--------+---------+
Link: https://lore.kernel.org/r/20210712085830epcms2p8c1288b7f7a81b044158a18232617b572@epcms2p8
Reported-by: kernel test robot <lkp@intel.com>
Tested-by: Bean Huo <beanhuo@micron.com>
Tested-by: Can Guo <cang@codeaurora.org>
Tested-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Can Guo <cang@codeaurora.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Acked-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Daejun Park <daejun7.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2021-07-12 16:58:30 +08:00
|
|
|
#ifdef CONFIG_SCSI_UFS_HPB
|
|
|
|
/**
|
|
|
|
* struct ufshpb_dev_info - UFSHPB device related info
|
|
|
|
* @num_lu: the number of user logical unit to check whether all lu finished
|
|
|
|
* initialization
|
|
|
|
* @rgn_size: device reported HPB region size
|
|
|
|
* @srgn_size: device reported HPB sub-region size
|
|
|
|
* @slave_conf_cnt: counter to check all lu finished initialization
|
|
|
|
* @hpb_disabled: flag to check if HPB is disabled
|
2021-07-12 17:00:25 +08:00
|
|
|
* @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value
|
|
|
|
* @is_legacy: flag to check HPB 1.0
|
2021-07-12 17:50:28 +08:00
|
|
|
* @control_mode: either host or device
|
scsi: ufs: ufshpb: Introduce Host Performance Buffer feature
Implement Host Performance Buffer (HPB) initialization and add function
calls to UFS core driver.
NAND flash-based storage devices, including UFS, have mechanisms to
translate logical addresses of I/O requests to the corresponding physical
addresses of the flash storage. In UFS, logical-to-physical-address (L2P)
map data, which is required to identify the physical address for the
requested I/Os, can only be partially stored in SRAM from NAND flash. Due
to this partial loading, accessing the flash address area, where the L2P
information for that address is not loaded in the SRAM, can result in
serious performance degradation.
The basic concept of HPB is to cache L2P mapping entries in host system
memory so that both physical block address (PBA) and logical block address
(LBA) can be delivered in HPB read command. The HPB read command allows to
read data faster than a regular read command in UFS since it provides the
physical address (HPB Entry) of the desired logical block in addition to
its logical address. The UFS device can access the physical block in NAND
directly without searching and uploading L2P mapping table. This improves
read performance because the NAND read operation for uploading L2P mapping
table is removed.
In HPB initialization, the host checks if the UFS device supports HPB
feature and retrieves related device capabilities. Then, HPB parameters are
configured in the device.
Total start-up time of popular applications was measured and the difference
observed between HPB being enabled and disabled. Popular applications are
12 game apps and 24 non-game apps. Each test cycle consists of running 36
applications in sequence. We repeated the cycle for observing performance
improvement by L2P mapping cache hit in HPB.
The following is the test environment:
- kernel version: 4.4.0
- RAM: 8GB
- UFS 2.1 (64GB)
Results:
+-------+----------+----------+-------+
| cycle | baseline | with HPB | diff |
+-------+----------+----------+-------+
| 1 | 272.4 | 264.9 | -7.5 |
| 2 | 250.4 | 248.2 | -2.2 |
| 3 | 226.2 | 215.6 | -10.6 |
| 4 | 230.6 | 214.8 | -15.8 |
| 5 | 232.0 | 218.1 | -13.9 |
| 6 | 231.9 | 212.6 | -19.3 |
+-------+----------+----------+-------+
We also measured HPB performance using iozone:
$ iozone -r 4k -+n -i2 -ecI -t 16 -l 16 -u 16 -s $IO_RANGE/16 -F \
mnt/tmp_1 mnt/tmp_2 mnt/tmp_3 mnt/tmp_4 mnt/tmp_5 mnt/tmp_6 mnt/tmp_7 \
mnt/tmp_8 mnt/tmp_9 mnt/tmp_10 mnt/tmp_11 mnt/tmp_12 mnt/tmp_13 \
mnt/tmp_14 mnt/tmp_15 mnt/tmp_16
Results:
+----------+--------+---------+
| IO range | HPB on | HPB off |
+----------+--------+---------+
| 1 GB | 294.8 | 300.87 |
| 4 GB | 293.51 | 179.35 |
| 8 GB | 294.85 | 162.52 |
| 16 GB | 293.45 | 156.26 |
| 32 GB | 277.4 | 153.25 |
+----------+--------+---------+
Link: https://lore.kernel.org/r/20210712085830epcms2p8c1288b7f7a81b044158a18232617b572@epcms2p8
Reported-by: kernel test robot <lkp@intel.com>
Tested-by: Bean Huo <beanhuo@micron.com>
Tested-by: Can Guo <cang@codeaurora.org>
Tested-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Can Guo <cang@codeaurora.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Acked-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Daejun Park <daejun7.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2021-07-12 16:58:30 +08:00
|
|
|
*/
|
|
|
|
struct ufshpb_dev_info {
|
|
|
|
int num_lu;
|
|
|
|
int rgn_size;
|
|
|
|
int srgn_size;
|
|
|
|
atomic_t slave_conf_cnt;
|
|
|
|
bool hpb_disabled;
|
2021-07-12 17:00:25 +08:00
|
|
|
u8 max_hpb_single_cmd;
|
|
|
|
bool is_legacy;
|
2021-07-12 17:50:28 +08:00
|
|
|
u8 control_mode;
|
scsi: ufs: ufshpb: Introduce Host Performance Buffer feature
Implement Host Performance Buffer (HPB) initialization and add function
calls to UFS core driver.
NAND flash-based storage devices, including UFS, have mechanisms to
translate logical addresses of I/O requests to the corresponding physical
addresses of the flash storage. In UFS, logical-to-physical-address (L2P)
map data, which is required to identify the physical address for the
requested I/Os, can only be partially stored in SRAM from NAND flash. Due
to this partial loading, accessing the flash address area, where the L2P
information for that address is not loaded in the SRAM, can result in
serious performance degradation.
The basic concept of HPB is to cache L2P mapping entries in host system
memory so that both physical block address (PBA) and logical block address
(LBA) can be delivered in HPB read command. The HPB read command allows to
read data faster than a regular read command in UFS since it provides the
physical address (HPB Entry) of the desired logical block in addition to
its logical address. The UFS device can access the physical block in NAND
directly without searching and uploading L2P mapping table. This improves
read performance because the NAND read operation for uploading L2P mapping
table is removed.
In HPB initialization, the host checks if the UFS device supports HPB
feature and retrieves related device capabilities. Then, HPB parameters are
configured in the device.
Total start-up time of popular applications was measured and the difference
observed between HPB being enabled and disabled. Popular applications are
12 game apps and 24 non-game apps. Each test cycle consists of running 36
applications in sequence. We repeated the cycle for observing performance
improvement by L2P mapping cache hit in HPB.
The following is the test environment:
- kernel version: 4.4.0
- RAM: 8GB
- UFS 2.1 (64GB)
Results:
+-------+----------+----------+-------+
| cycle | baseline | with HPB | diff |
+-------+----------+----------+-------+
| 1 | 272.4 | 264.9 | -7.5 |
| 2 | 250.4 | 248.2 | -2.2 |
| 3 | 226.2 | 215.6 | -10.6 |
| 4 | 230.6 | 214.8 | -15.8 |
| 5 | 232.0 | 218.1 | -13.9 |
| 6 | 231.9 | 212.6 | -19.3 |
+-------+----------+----------+-------+
We also measured HPB performance using iozone:
$ iozone -r 4k -+n -i2 -ecI -t 16 -l 16 -u 16 -s $IO_RANGE/16 -F \
mnt/tmp_1 mnt/tmp_2 mnt/tmp_3 mnt/tmp_4 mnt/tmp_5 mnt/tmp_6 mnt/tmp_7 \
mnt/tmp_8 mnt/tmp_9 mnt/tmp_10 mnt/tmp_11 mnt/tmp_12 mnt/tmp_13 \
mnt/tmp_14 mnt/tmp_15 mnt/tmp_16
Results:
+----------+--------+---------+
| IO range | HPB on | HPB off |
+----------+--------+---------+
| 1 GB | 294.8 | 300.87 |
| 4 GB | 293.51 | 179.35 |
| 8 GB | 294.85 | 162.52 |
| 16 GB | 293.45 | 156.26 |
| 32 GB | 277.4 | 153.25 |
+----------+--------+---------+
Link: https://lore.kernel.org/r/20210712085830epcms2p8c1288b7f7a81b044158a18232617b572@epcms2p8
Reported-by: kernel test robot <lkp@intel.com>
Tested-by: Bean Huo <beanhuo@micron.com>
Tested-by: Can Guo <cang@codeaurora.org>
Tested-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Can Guo <cang@codeaurora.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Acked-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Daejun Park <daejun7.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2021-07-12 16:58:30 +08:00
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2021-04-22 10:28:39 +08:00
|
|
|
struct ufs_hba_monitor {
|
|
|
|
unsigned long chunk_size;
|
|
|
|
|
|
|
|
unsigned long nr_sec_rw[2];
|
|
|
|
ktime_t total_busy[2];
|
|
|
|
|
|
|
|
unsigned long nr_req[2];
|
|
|
|
/* latencies*/
|
|
|
|
ktime_t lat_sum[2];
|
|
|
|
ktime_t lat_max[2];
|
|
|
|
ktime_t lat_min[2];
|
|
|
|
|
|
|
|
u32 nr_queued[2];
|
|
|
|
ktime_t busy_start_ts[2];
|
|
|
|
|
|
|
|
ktime_t enabled_ts;
|
|
|
|
bool enabled;
|
|
|
|
};
|
|
|
|
|
2013-02-26 00:14:33 +08:00
|
|
|
/**
|
|
|
|
* struct ufs_hba - per adapter private structure
|
|
|
|
* @mmio_base: UFSHCI base register address
|
|
|
|
* @ucdl_base_addr: UFS Command Descriptor base address
|
|
|
|
* @utrdl_base_addr: UTP Transfer Request Descriptor base address
|
|
|
|
* @utmrdl_base_addr: UTP Task Management Descriptor base address
|
|
|
|
* @ucdl_dma_addr: UFS Command Descriptor DMA address
|
|
|
|
* @utrdl_dma_addr: UTRDL DMA address
|
|
|
|
* @utmrdl_dma_addr: UTMRDL DMA address
|
|
|
|
* @host: Scsi_Host instance of the driver
|
|
|
|
* @dev: device handle
|
|
|
|
* @lrb: local reference block
|
2019-12-10 02:13:08 +08:00
|
|
|
* @cmd_queue: Used to allocate command tags from hba->host->tag_set.
|
2013-02-26 00:14:33 +08:00
|
|
|
* @outstanding_tasks: Bits representing outstanding task requests
|
|
|
|
* @outstanding_reqs: Bits representing outstanding transfer requests
|
|
|
|
* @capabilities: UFS Controller Capabilities
|
|
|
|
* @nutrs: Transfer Request Queue depth supported by controller
|
|
|
|
* @nutmrs: Task Management Queue depth supported by controller
|
|
|
|
* @ufs_version: UFS Version to which controller complies
|
2014-09-25 20:32:21 +08:00
|
|
|
* @vops: pointer to variant specific operations
|
|
|
|
* @priv: pointer to variant specific private data
|
2013-02-26 00:14:33 +08:00
|
|
|
* @irq: Irq number of the controller
|
|
|
|
* @active_uic_cmd: handle of active UIC command
|
2021-07-22 11:34:28 +08:00
|
|
|
* @uic_cmd_mutex: mutex for UIC command
|
2019-12-10 02:13:09 +08:00
|
|
|
* @tmf_tag_set: TMF tag set.
|
|
|
|
* @tmf_queue: Used to allocate TMF tags.
|
2013-09-01 00:10:22 +08:00
|
|
|
* @pwr_done: completion for power mode change
|
2013-02-26 00:14:33 +08:00
|
|
|
* @ufshcd_state: UFSHCD states
|
2014-05-26 13:29:14 +08:00
|
|
|
* @eh_flags: Error handling flags
|
2013-06-27 01:09:27 +08:00
|
|
|
* @intr_mask: Interrupt Mask Bits
|
2013-07-30 03:05:59 +08:00
|
|
|
* @ee_ctrl_mask: Exception event control mask
|
2014-09-25 20:32:26 +08:00
|
|
|
* @is_powered: flag to check if HBA is powered
|
2021-01-14 11:13:28 +08:00
|
|
|
* @shutting_down: flag to check if shutdown has been invoked
|
|
|
|
* @host_sem: semaphore used to serialize concurrent contexts
|
scsi: ufs: Fix concurrency of error handler and other error recovery paths
Error recovery can be invoked from multiple code paths, including hibern8
enter/exit (from ufshcd_link_recovery), ufshcd_eh_host_reset_handler() and
eh_work scheduled from IRQ context. Ultimately, these paths are all trying
to invoke ufshcd_reset_and_restore() in either a synchronous or
asynchronous manner. This causes problems:
- If link recovery happens during ungate work, ufshcd_hold() would be
called recursively. Although commit 53c12d0ef6fc ("scsi: ufs: fix error
recovery after the hibern8 exit failure") fixed a deadlock due to
recursive calls of ufshcd_hold() by adding a check of eh_in_progress
into ufshcd_hold, this check allows eh_work to run in parallel while
link recovery is running.
- Similar concurrency can also happen when error recovery is invoked from
ufshcd_eh_host_reset_handler and ufshcd_link_recovery.
- Concurrency can even happen between eh_works. eh_work, currently queued
on system_wq, is allowed to have multiple instances running in parallel,
but we don't have proper protection for that.
If any of above concurrency scenarios happen, error recovery would fail and
lead ufs device and host into bad states. To fix the concurrency problem,
this change queues eh_work on a single threaded workqueue and removes link
recovery calls from the hibern8 enter/exit path. In addition, make use of
eh_work in eh_host_reset_handler instead of calling
ufshcd_reset_and_restore. This unifies the UFS error recovery mechanism.
According to the UFSHCI JEDEC spec, hibern8 enter/exit error occurs when
the link is broken. This essentially applies to any power mode change
operations (since they all use PACP_PWR cmds in UniPro layer). So, if a
power mode change operation (including AH8 enter/exit) fails, mark link
state as UIC_LINK_BROKEN_STATE and schedule the eh_work. In this case,
error handler needs to do a full reset and restore to recover the link back
to active. Before the link state is recovered to active,
ufshcd_uic_pwr_ctrl simply returns -ENOLINK to avoid more errors.
Link: https://lore.kernel.org/r/1596975355-39813-6-git-send-email-cang@codeaurora.org
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-08-09 20:15:51 +08:00
|
|
|
* @eh_wq: Workqueue that eh_work works on
|
2014-05-26 13:29:15 +08:00
|
|
|
* @eh_work: Worker to handle UFS errors that require s/w attention
|
2013-07-30 03:05:59 +08:00
|
|
|
* @eeh_work: Worker to handle exception events
|
2013-02-26 00:14:33 +08:00
|
|
|
* @errors: HBA errors
|
2014-05-26 13:29:15 +08:00
|
|
|
* @uic_error: UFS interconnect layer error status
|
|
|
|
* @saved_err: sticky error mask
|
|
|
|
* @saved_uic_err: sticky UIC error mask
|
scsi: ufs: Fix concurrency of error handler and other error recovery paths
Error recovery can be invoked from multiple code paths, including hibern8
enter/exit (from ufshcd_link_recovery), ufshcd_eh_host_reset_handler() and
eh_work scheduled from IRQ context. Ultimately, these paths are all trying
to invoke ufshcd_reset_and_restore() in either a synchronous or
asynchronous manner. This causes problems:
- If link recovery happens during ungate work, ufshcd_hold() would be
called recursively. Although commit 53c12d0ef6fc ("scsi: ufs: fix error
recovery after the hibern8 exit failure") fixed a deadlock due to
recursive calls of ufshcd_hold() by adding a check of eh_in_progress
into ufshcd_hold, this check allows eh_work to run in parallel while
link recovery is running.
- Similar concurrency can also happen when error recovery is invoked from
ufshcd_eh_host_reset_handler and ufshcd_link_recovery.
- Concurrency can even happen between eh_works. eh_work, currently queued
on system_wq, is allowed to have multiple instances running in parallel,
but we don't have proper protection for that.
If any of above concurrency scenarios happen, error recovery would fail and
lead ufs device and host into bad states. To fix the concurrency problem,
this change queues eh_work on a single threaded workqueue and removes link
recovery calls from the hibern8 enter/exit path. In addition, make use of
eh_work in eh_host_reset_handler instead of calling
ufshcd_reset_and_restore. This unifies the UFS error recovery mechanism.
According to the UFSHCI JEDEC spec, hibern8 enter/exit error occurs when
the link is broken. This essentially applies to any power mode change
operations (since they all use PACP_PWR cmds in UniPro layer). So, if a
power mode change operation (including AH8 enter/exit) fails, mark link
state as UIC_LINK_BROKEN_STATE and schedule the eh_work. In this case,
error handler needs to do a full reset and restore to recover the link back
to active. Before the link state is recovered to active,
ufshcd_uic_pwr_ctrl simply returns -ENOLINK to avoid more errors.
Link: https://lore.kernel.org/r/1596975355-39813-6-git-send-email-cang@codeaurora.org
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-08-09 20:15:51 +08:00
|
|
|
* @force_reset: flag to force eh_work perform a full reset
|
2020-08-25 10:07:06 +08:00
|
|
|
* @force_pmc: flag to force a power mode change
|
scsi: ufs: Complete pending requests in host reset and restore path
In UFS host reset and restore path, before probe, we stop and start the
host controller once. After host controller is stopped, the pending
requests, if any, are cleared from the doorbell, but no completion IRQ
would be raised due to the hba is stopped. These pending requests shall be
completed along with the first NOP_OUT command (as it is the first command
which can raise a transfer completion IRQ) sent during probe. Since the
OCSs of these pending requests are not SUCCESS (because they are not yet
literally finished), their UPIUs shall be dumped. When there are multiple
pending requests, the UPIU dump can be overwhelming and may lead to
stability issues because it is in atomic context. Therefore, before probe,
complete these pending requests right after host controller is stopped and
silence the UPIU dump from them.
Link: https://lore.kernel.org/r/1574751214-8321-5-git-send-email-cang@qti.qualcomm.com
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Tested-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-11-26 14:53:33 +08:00
|
|
|
* @silence_err_logs: flag to silence error logs
|
2013-07-30 03:05:57 +08:00
|
|
|
* @dev_cmd: ufs device management command information
|
2015-03-31 22:37:14 +08:00
|
|
|
* @last_dme_cmd_tstamp: time stamp of the last completed DME command
|
2013-07-30 03:05:59 +08:00
|
|
|
* @auto_bkops_enabled: to track whether bkops is enabled in device
|
2014-09-25 20:32:22 +08:00
|
|
|
* @vreg_info: UFS device voltage regulator information
|
2014-09-25 20:32:23 +08:00
|
|
|
* @clk_list_head: UFS host controller clocks list node head
|
2014-09-25 20:32:31 +08:00
|
|
|
* @pwr_info: holds current power mode
|
|
|
|
* @max_pwr_info: keeps the device max valid pwm
|
2017-02-23 17:05:30 +08:00
|
|
|
* @desc_size: descriptor sizes reported by device
|
2016-03-10 23:37:15 +08:00
|
|
|
* @urgent_bkops_lvl: keeps track of urgent bkops level for device
|
|
|
|
* @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
|
|
|
|
* device is known or not.
|
2018-05-03 19:07:18 +08:00
|
|
|
* @scsi_block_reqs_cnt: reference counting for scsi block requests
|
2020-07-07 04:04:13 +08:00
|
|
|
* @crypto_capabilities: Content of crypto capabilities register (0x100)
|
|
|
|
* @crypto_cap_array: Array of crypto capabilities
|
|
|
|
* @crypto_cfg_register: Start of the crypto cfg array
|
|
|
|
* @ksm: the keyslot manager tied to this hba
|
2013-02-26 00:14:33 +08:00
|
|
|
*/
|
|
|
|
struct ufs_hba {
|
|
|
|
void __iomem *mmio_base;
|
|
|
|
|
|
|
|
/* Virtual memory reference */
|
|
|
|
struct utp_transfer_cmd_desc *ucdl_base_addr;
|
|
|
|
struct utp_transfer_req_desc *utrdl_base_addr;
|
|
|
|
struct utp_task_req_desc *utmrdl_base_addr;
|
|
|
|
|
|
|
|
/* DMA memory reference */
|
|
|
|
dma_addr_t ucdl_dma_addr;
|
|
|
|
dma_addr_t utrdl_dma_addr;
|
|
|
|
dma_addr_t utmrdl_dma_addr;
|
|
|
|
|
|
|
|
struct Scsi_Host *host;
|
|
|
|
struct device *dev;
|
2019-12-10 02:13:08 +08:00
|
|
|
struct request_queue *cmd_queue;
|
2014-09-25 20:32:28 +08:00
|
|
|
/*
|
|
|
|
* This field is to keep a reference to "scsi_device" corresponding to
|
|
|
|
* "UFS device" W-LU.
|
|
|
|
*/
|
|
|
|
struct scsi_device *sdev_ufs_device;
|
2020-11-18 00:58:35 +08:00
|
|
|
struct scsi_device *sdev_rpmb;
|
2013-02-26 00:14:33 +08:00
|
|
|
|
2014-09-25 20:32:30 +08:00
|
|
|
enum ufs_dev_pwr_mode curr_dev_pwr_mode;
|
|
|
|
enum uic_link_state uic_link_state;
|
|
|
|
/* Desired UFS power management level during runtime PM */
|
|
|
|
enum ufs_pm_level rpm_lvl;
|
|
|
|
/* Desired UFS power management level during system PM */
|
|
|
|
enum ufs_pm_level spm_lvl;
|
2016-12-23 10:41:00 +08:00
|
|
|
struct device_attribute rpm_lvl_attr;
|
|
|
|
struct device_attribute spm_lvl_attr;
|
2014-09-25 20:32:30 +08:00
|
|
|
int pm_op_in_progress;
|
|
|
|
|
2018-03-20 21:07:38 +08:00
|
|
|
/* Auto-Hibernate Idle Timer register value */
|
|
|
|
u32 ahit;
|
|
|
|
|
2013-02-26 00:14:33 +08:00
|
|
|
struct ufshcd_lrb *lrb;
|
|
|
|
|
|
|
|
unsigned long outstanding_tasks;
|
|
|
|
unsigned long outstanding_reqs;
|
|
|
|
|
|
|
|
u32 capabilities;
|
|
|
|
int nutrs;
|
|
|
|
int nutmrs;
|
|
|
|
u32 ufs_version;
|
2019-03-05 03:39:11 +08:00
|
|
|
const struct ufs_hba_variant_ops *vops;
|
2020-05-09 17:37:13 +08:00
|
|
|
struct ufs_hba_variant_params *vps;
|
2014-09-25 20:32:21 +08:00
|
|
|
void *priv;
|
2013-02-26 00:14:33 +08:00
|
|
|
unsigned int irq;
|
2014-09-25 20:32:30 +08:00
|
|
|
bool is_irq_enabled;
|
2018-10-16 16:59:41 +08:00
|
|
|
enum ufs_ref_clk_freq dev_ref_clk_freq;
|
2013-02-26 00:14:33 +08:00
|
|
|
|
2015-03-31 22:37:14 +08:00
|
|
|
unsigned int quirks; /* Deviations from standard UFSHCI spec. */
|
2013-06-27 01:09:29 +08:00
|
|
|
|
2016-03-10 23:37:10 +08:00
|
|
|
/* Device deviations from standard UFS device spec. */
|
|
|
|
unsigned int dev_quirks;
|
|
|
|
|
2019-12-10 02:13:09 +08:00
|
|
|
struct blk_mq_tag_set tmf_tag_set;
|
|
|
|
struct request_queue *tmf_queue;
|
2013-02-26 00:14:33 +08:00
|
|
|
|
2014-09-25 20:32:30 +08:00
|
|
|
struct uic_command *active_uic_cmd;
|
|
|
|
struct mutex uic_cmd_mutex;
|
|
|
|
struct completion *uic_async_done;
|
2013-09-01 00:10:22 +08:00
|
|
|
|
2013-02-26 00:14:33 +08:00
|
|
|
u32 ufshcd_state;
|
2014-05-26 13:29:14 +08:00
|
|
|
u32 eh_flags;
|
2013-06-27 01:09:27 +08:00
|
|
|
u32 intr_mask;
|
2021-02-09 14:24:36 +08:00
|
|
|
u16 ee_ctrl_mask; /* Exception event mask */
|
|
|
|
u16 ee_drv_mask; /* Exception event mask for driver */
|
|
|
|
u16 ee_usr_mask; /* Exception event mask for user (via debugfs) */
|
|
|
|
struct mutex ee_ctrl_mutex;
|
2014-09-25 20:32:26 +08:00
|
|
|
bool is_powered;
|
2021-01-14 11:13:28 +08:00
|
|
|
bool shutting_down;
|
|
|
|
struct semaphore host_sem;
|
2013-02-26 00:14:33 +08:00
|
|
|
|
|
|
|
/* Work Queues */
|
scsi: ufs: Fix concurrency of error handler and other error recovery paths
Error recovery can be invoked from multiple code paths, including hibern8
enter/exit (from ufshcd_link_recovery), ufshcd_eh_host_reset_handler() and
eh_work scheduled from IRQ context. Ultimately, these paths are all trying
to invoke ufshcd_reset_and_restore() in either a synchronous or
asynchronous manner. This causes problems:
- If link recovery happens during ungate work, ufshcd_hold() would be
called recursively. Although commit 53c12d0ef6fc ("scsi: ufs: fix error
recovery after the hibern8 exit failure") fixed a deadlock due to
recursive calls of ufshcd_hold() by adding a check of eh_in_progress
into ufshcd_hold, this check allows eh_work to run in parallel while
link recovery is running.
- Similar concurrency can also happen when error recovery is invoked from
ufshcd_eh_host_reset_handler and ufshcd_link_recovery.
- Concurrency can even happen between eh_works. eh_work, currently queued
on system_wq, is allowed to have multiple instances running in parallel,
but we don't have proper protection for that.
If any of above concurrency scenarios happen, error recovery would fail and
lead ufs device and host into bad states. To fix the concurrency problem,
this change queues eh_work on a single threaded workqueue and removes link
recovery calls from the hibern8 enter/exit path. In addition, make use of
eh_work in eh_host_reset_handler instead of calling
ufshcd_reset_and_restore. This unifies the UFS error recovery mechanism.
According to the UFSHCI JEDEC spec, hibern8 enter/exit error occurs when
the link is broken. This essentially applies to any power mode change
operations (since they all use PACP_PWR cmds in UniPro layer). So, if a
power mode change operation (including AH8 enter/exit) fails, mark link
state as UIC_LINK_BROKEN_STATE and schedule the eh_work. In this case,
error handler needs to do a full reset and restore to recover the link back
to active. Before the link state is recovered to active,
ufshcd_uic_pwr_ctrl simply returns -ENOLINK to avoid more errors.
Link: https://lore.kernel.org/r/1596975355-39813-6-git-send-email-cang@codeaurora.org
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-08-09 20:15:51 +08:00
|
|
|
struct workqueue_struct *eh_wq;
|
2014-05-26 13:29:15 +08:00
|
|
|
struct work_struct eh_work;
|
2013-07-30 03:05:59 +08:00
|
|
|
struct work_struct eeh_work;
|
2013-02-26 00:14:33 +08:00
|
|
|
|
|
|
|
/* HBA Errors */
|
|
|
|
u32 errors;
|
2014-05-26 13:29:15 +08:00
|
|
|
u32 uic_error;
|
|
|
|
u32 saved_err;
|
|
|
|
u32 saved_uic_err;
|
2016-12-23 10:42:18 +08:00
|
|
|
struct ufs_stats ufs_stats;
|
scsi: ufs: Fix concurrency of error handler and other error recovery paths
Error recovery can be invoked from multiple code paths, including hibern8
enter/exit (from ufshcd_link_recovery), ufshcd_eh_host_reset_handler() and
eh_work scheduled from IRQ context. Ultimately, these paths are all trying
to invoke ufshcd_reset_and_restore() in either a synchronous or
asynchronous manner. This causes problems:
- If link recovery happens during ungate work, ufshcd_hold() would be
called recursively. Although commit 53c12d0ef6fc ("scsi: ufs: fix error
recovery after the hibern8 exit failure") fixed a deadlock due to
recursive calls of ufshcd_hold() by adding a check of eh_in_progress
into ufshcd_hold, this check allows eh_work to run in parallel while
link recovery is running.
- Similar concurrency can also happen when error recovery is invoked from
ufshcd_eh_host_reset_handler and ufshcd_link_recovery.
- Concurrency can even happen between eh_works. eh_work, currently queued
on system_wq, is allowed to have multiple instances running in parallel,
but we don't have proper protection for that.
If any of above concurrency scenarios happen, error recovery would fail and
lead ufs device and host into bad states. To fix the concurrency problem,
this change queues eh_work on a single threaded workqueue and removes link
recovery calls from the hibern8 enter/exit path. In addition, make use of
eh_work in eh_host_reset_handler instead of calling
ufshcd_reset_and_restore. This unifies the UFS error recovery mechanism.
According to the UFSHCI JEDEC spec, hibern8 enter/exit error occurs when
the link is broken. This essentially applies to any power mode change
operations (since they all use PACP_PWR cmds in UniPro layer). So, if a
power mode change operation (including AH8 enter/exit) fails, mark link
state as UIC_LINK_BROKEN_STATE and schedule the eh_work. In this case,
error handler needs to do a full reset and restore to recover the link back
to active. Before the link state is recovered to active,
ufshcd_uic_pwr_ctrl simply returns -ENOLINK to avoid more errors.
Link: https://lore.kernel.org/r/1596975355-39813-6-git-send-email-cang@codeaurora.org
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-08-09 20:15:51 +08:00
|
|
|
bool force_reset;
|
2020-08-25 10:07:06 +08:00
|
|
|
bool force_pmc;
|
scsi: ufs: Complete pending requests in host reset and restore path
In UFS host reset and restore path, before probe, we stop and start the
host controller once. After host controller is stopped, the pending
requests, if any, are cleared from the doorbell, but no completion IRQ
would be raised due to the hba is stopped. These pending requests shall be
completed along with the first NOP_OUT command (as it is the first command
which can raise a transfer completion IRQ) sent during probe. Since the
OCSs of these pending requests are not SUCCESS (because they are not yet
literally finished), their UPIUs shall be dumped. When there are multiple
pending requests, the UPIU dump can be overwhelming and may lead to
stability issues because it is in atomic context. Therefore, before probe,
complete these pending requests right after host controller is stopped and
silence the UPIU dump from them.
Link: https://lore.kernel.org/r/1574751214-8321-5-git-send-email-cang@qti.qualcomm.com
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Tested-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-11-26 14:53:33 +08:00
|
|
|
bool silence_err_logs;
|
2013-07-30 03:05:57 +08:00
|
|
|
|
|
|
|
/* Device management request data */
|
|
|
|
struct ufs_dev_cmd dev_cmd;
|
2015-03-31 22:37:14 +08:00
|
|
|
ktime_t last_dme_cmd_tstamp;
|
2013-07-30 03:05:59 +08:00
|
|
|
|
2014-09-25 20:32:30 +08:00
|
|
|
/* Keeps information of the UFS device connected to this host */
|
|
|
|
struct ufs_dev_info dev_info;
|
2013-07-30 03:05:59 +08:00
|
|
|
bool auto_bkops_enabled;
|
2014-09-25 20:32:22 +08:00
|
|
|
struct ufs_vreg_info vreg_info;
|
2014-09-25 20:32:23 +08:00
|
|
|
struct list_head clk_list_head;
|
2014-09-25 20:32:30 +08:00
|
|
|
|
|
|
|
bool wlun_dev_clr_ua;
|
2021-04-24 08:20:16 +08:00
|
|
|
bool wlun_rpmb_clr_ua;
|
2014-09-25 20:32:31 +08:00
|
|
|
|
2017-02-04 08:56:50 +08:00
|
|
|
/* Number of requests aborts */
|
|
|
|
int req_abort_count;
|
|
|
|
|
2016-03-10 23:37:05 +08:00
|
|
|
/* Number of lanes available (1 or 2) for Rx/Tx */
|
|
|
|
u32 lanes_per_direction;
|
2014-09-25 20:32:31 +08:00
|
|
|
struct ufs_pa_layer_attr pwr_info;
|
|
|
|
struct ufs_pwr_mode_info max_pwr_info;
|
2014-09-25 20:32:32 +08:00
|
|
|
|
|
|
|
struct ufs_clk_gating clk_gating;
|
|
|
|
/* Control to enable/disable host capabilities */
|
|
|
|
u32 caps;
|
2014-09-25 20:32:34 +08:00
|
|
|
|
|
|
|
struct devfreq *devfreq;
|
|
|
|
struct ufs_clk_scaling clk_scaling;
|
2014-09-25 20:32:36 +08:00
|
|
|
bool is_sys_suspended;
|
2016-03-10 23:37:15 +08:00
|
|
|
|
|
|
|
enum bkops_status urgent_bkops_lvl;
|
|
|
|
bool is_urgent_bkops_lvl_checked;
|
2017-02-04 08:57:02 +08:00
|
|
|
|
|
|
|
struct rw_semaphore clk_scaling_lock;
|
2020-06-03 17:19:58 +08:00
|
|
|
unsigned char desc_size[QUERY_DESC_IDN_MAX];
|
2018-05-03 19:07:18 +08:00
|
|
|
atomic_t scsi_block_reqs_cnt;
|
scsi: ufs: Add a bsg endpoint that supports UPIUs
For now, just provide an API to allocate and remove ufs-bsg node. We
will use this framework to manage ufs devices by sending UPIU
transactions.
For the time being, implements an empty bsg_request() - will add some
more functionality in coming patches.
Nonetheless, we reveal here the protocol we are planning to use: UFS
Transport Protocol Transactions. UFS transactions consist of packets
called UFS Protocol Information Units (UPIU).
There are UPIU’s defined for UFS SCSI commands, responses, data in and
data out, task management, utility functions, vendor functions,
transaction synchronization and control, and more.
By using UPIUs, we get access to the most fine-grained internals of this
protocol, and able to communicate with the device in ways, that are
sometimes beyond the capacity of the ufs driver.
Moreover and as a result, our core structure - ufs_bsg_node has a pretty
lean structure: using upiu transactions that contains the outmost
detailed info, so we don't really need complex constructs to support it.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-07 22:30:35 +08:00
|
|
|
|
|
|
|
struct device bsg_dev;
|
|
|
|
struct request_queue *bsg_queue;
|
2020-05-22 16:32:12 +08:00
|
|
|
struct delayed_work rpm_dev_flush_recheck_work;
|
2020-07-07 04:04:13 +08:00
|
|
|
|
scsi: ufs: ufshpb: Introduce Host Performance Buffer feature
Implement Host Performance Buffer (HPB) initialization and add function
calls to UFS core driver.
NAND flash-based storage devices, including UFS, have mechanisms to
translate logical addresses of I/O requests to the corresponding physical
addresses of the flash storage. In UFS, logical-to-physical-address (L2P)
map data, which is required to identify the physical address for the
requested I/Os, can only be partially stored in SRAM from NAND flash. Due
to this partial loading, accessing the flash address area, where the L2P
information for that address is not loaded in the SRAM, can result in
serious performance degradation.
The basic concept of HPB is to cache L2P mapping entries in host system
memory so that both physical block address (PBA) and logical block address
(LBA) can be delivered in HPB read command. The HPB read command allows to
read data faster than a regular read command in UFS since it provides the
physical address (HPB Entry) of the desired logical block in addition to
its logical address. The UFS device can access the physical block in NAND
directly without searching and uploading L2P mapping table. This improves
read performance because the NAND read operation for uploading L2P mapping
table is removed.
In HPB initialization, the host checks if the UFS device supports HPB
feature and retrieves related device capabilities. Then, HPB parameters are
configured in the device.
Total start-up time of popular applications was measured and the difference
observed between HPB being enabled and disabled. Popular applications are
12 game apps and 24 non-game apps. Each test cycle consists of running 36
applications in sequence. We repeated the cycle for observing performance
improvement by L2P mapping cache hit in HPB.
The following is the test environment:
- kernel version: 4.4.0
- RAM: 8GB
- UFS 2.1 (64GB)
Results:
+-------+----------+----------+-------+
| cycle | baseline | with HPB | diff |
+-------+----------+----------+-------+
| 1 | 272.4 | 264.9 | -7.5 |
| 2 | 250.4 | 248.2 | -2.2 |
| 3 | 226.2 | 215.6 | -10.6 |
| 4 | 230.6 | 214.8 | -15.8 |
| 5 | 232.0 | 218.1 | -13.9 |
| 6 | 231.9 | 212.6 | -19.3 |
+-------+----------+----------+-------+
We also measured HPB performance using iozone:
$ iozone -r 4k -+n -i2 -ecI -t 16 -l 16 -u 16 -s $IO_RANGE/16 -F \
mnt/tmp_1 mnt/tmp_2 mnt/tmp_3 mnt/tmp_4 mnt/tmp_5 mnt/tmp_6 mnt/tmp_7 \
mnt/tmp_8 mnt/tmp_9 mnt/tmp_10 mnt/tmp_11 mnt/tmp_12 mnt/tmp_13 \
mnt/tmp_14 mnt/tmp_15 mnt/tmp_16
Results:
+----------+--------+---------+
| IO range | HPB on | HPB off |
+----------+--------+---------+
| 1 GB | 294.8 | 300.87 |
| 4 GB | 293.51 | 179.35 |
| 8 GB | 294.85 | 162.52 |
| 16 GB | 293.45 | 156.26 |
| 32 GB | 277.4 | 153.25 |
+----------+--------+---------+
Link: https://lore.kernel.org/r/20210712085830epcms2p8c1288b7f7a81b044158a18232617b572@epcms2p8
Reported-by: kernel test robot <lkp@intel.com>
Tested-by: Bean Huo <beanhuo@micron.com>
Tested-by: Can Guo <cang@codeaurora.org>
Tested-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Can Guo <cang@codeaurora.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Acked-by: Avri Altman <Avri.Altman@wdc.com>
Signed-off-by: Daejun Park <daejun7.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2021-07-12 16:58:30 +08:00
|
|
|
#ifdef CONFIG_SCSI_UFS_HPB
|
|
|
|
struct ufshpb_dev_info ufshpb_dev;
|
|
|
|
#endif
|
|
|
|
|
2021-04-22 10:28:39 +08:00
|
|
|
struct ufs_hba_monitor monitor;
|
|
|
|
|
2020-07-07 04:04:13 +08:00
|
|
|
#ifdef CONFIG_SCSI_UFS_CRYPTO
|
|
|
|
union ufs_crypto_capabilities crypto_capabilities;
|
|
|
|
union ufs_crypto_cap_entry *crypto_cap_array;
|
|
|
|
u32 crypto_cfg_register;
|
|
|
|
struct blk_keyslot_manager ksm;
|
|
|
|
#endif
|
2021-01-07 15:25:38 +08:00
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
struct dentry *debugfs_root;
|
2021-02-09 14:24:37 +08:00
|
|
|
struct delayed_work debugfs_ee_work;
|
|
|
|
u32 debugfs_ee_rate_limit_ms;
|
2021-01-07 15:25:38 +08:00
|
|
|
#endif
|
2021-04-24 08:20:16 +08:00
|
|
|
u32 luns_avail;
|
|
|
|
bool complete_put;
|
|
|
|
bool rpmb_complete_put;
|
2013-02-26 00:14:33 +08:00
|
|
|
};
|
|
|
|
|
2014-09-25 20:32:32 +08:00
|
|
|
/* Returns true if clocks can be gated. Otherwise false */
|
|
|
|
static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return hba->caps & UFSHCD_CAP_CLK_GATING;
|
|
|
|
}
|
|
|
|
static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
|
|
|
|
}
|
2016-12-23 10:40:50 +08:00
|
|
|
static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
|
2014-09-25 20:32:34 +08:00
|
|
|
{
|
|
|
|
return hba->caps & UFSHCD_CAP_CLK_SCALING;
|
|
|
|
}
|
2014-09-25 20:32:35 +08:00
|
|
|
static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
|
|
|
|
}
|
2019-09-16 23:56:50 +08:00
|
|
|
static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
|
|
|
|
}
|
2014-09-25 20:32:35 +08:00
|
|
|
|
2015-05-17 23:54:57 +08:00
|
|
|
static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
|
|
|
|
{
|
2021-06-28 13:58:01 +08:00
|
|
|
return (hba->caps & UFSHCD_CAP_INTR_AGGR) &&
|
|
|
|
!(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR);
|
2015-05-17 23:54:57 +08:00
|
|
|
}
|
|
|
|
|
2020-10-28 03:10:36 +08:00
|
|
|
static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return !!(ufshcd_is_link_hibern8(hba) &&
|
|
|
|
(hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE));
|
|
|
|
}
|
|
|
|
|
2019-05-21 14:44:52 +08:00
|
|
|
static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
|
|
|
|
{
|
2020-08-10 22:10:24 +08:00
|
|
|
return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
|
|
|
|
!(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
|
2019-05-21 14:44:52 +08:00
|
|
|
}
|
|
|
|
|
2020-01-29 18:52:50 +08:00
|
|
|
static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
|
|
|
|
}
|
|
|
|
|
2020-04-23 05:41:42 +08:00
|
|
|
static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return hba->caps & UFSHCD_CAP_WB_EN;
|
|
|
|
}
|
|
|
|
|
2021-01-14 11:13:28 +08:00
|
|
|
static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return !hba->shutting_down;
|
|
|
|
}
|
|
|
|
|
2013-06-27 01:09:26 +08:00
|
|
|
#define ufshcd_writel(hba, val, reg) \
|
|
|
|
writel((val), (hba)->mmio_base + (reg))
|
|
|
|
#define ufshcd_readl(hba, reg) \
|
|
|
|
readl((hba)->mmio_base + (reg))
|
|
|
|
|
2014-09-25 20:32:36 +08:00
|
|
|
/**
|
|
|
|
* ufshcd_rmwl - read modify write into a register
|
|
|
|
* @hba - per adapter instance
|
|
|
|
* @mask - mask to apply on read value
|
|
|
|
* @val - actual value to write
|
|
|
|
* @reg - register address
|
|
|
|
*/
|
|
|
|
static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
|
|
|
|
{
|
|
|
|
u32 tmp;
|
|
|
|
|
|
|
|
tmp = ufshcd_readl(hba, reg);
|
|
|
|
tmp &= ~mask;
|
|
|
|
tmp |= (val & mask);
|
|
|
|
ufshcd_writel(hba, tmp, reg);
|
|
|
|
}
|
|
|
|
|
2014-09-25 20:32:21 +08:00
|
|
|
int ufshcd_alloc_host(struct device *, struct ufs_hba **);
|
2015-10-28 19:15:49 +08:00
|
|
|
void ufshcd_dealloc_host(struct ufs_hba *);
|
2020-01-17 11:51:07 +08:00
|
|
|
int ufshcd_hba_enable(struct ufs_hba *hba);
|
2021-05-18 20:12:17 +08:00
|
|
|
int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int);
|
2020-03-27 17:53:28 +08:00
|
|
|
int ufshcd_link_recovery(struct ufs_hba *hba);
|
2020-01-17 11:51:07 +08:00
|
|
|
int ufshcd_make_hba_operational(struct ufs_hba *hba);
|
2013-02-26 00:14:33 +08:00
|
|
|
void ufshcd_remove(struct ufs_hba *);
|
2020-01-17 11:51:07 +08:00
|
|
|
int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
|
2020-03-18 18:40:12 +08:00
|
|
|
void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
|
2016-03-10 23:37:08 +08:00
|
|
|
int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
|
|
|
|
u32 val, unsigned long interval_us,
|
2020-05-08 06:27:50 +08:00
|
|
|
unsigned long timeout_ms);
|
2018-10-16 16:59:41 +08:00
|
|
|
void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
|
2020-12-05 19:58:59 +08:00
|
|
|
void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
|
2021-05-28 11:36:21 +08:00
|
|
|
void ufshcd_hba_stop(struct ufs_hba *hba);
|
2013-02-26 00:14:33 +08:00
|
|
|
|
2013-07-30 03:05:58 +08:00
|
|
|
static inline void check_upiu_size(void)
|
|
|
|
{
|
|
|
|
BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
|
|
|
|
GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
|
|
|
|
}
|
|
|
|
|
2015-10-28 19:15:47 +08:00
|
|
|
/**
|
|
|
|
* ufshcd_set_variant - set variant specific data to the hba
|
|
|
|
* @hba - per adapter instance
|
|
|
|
* @variant - pointer to variant specific data
|
|
|
|
*/
|
|
|
|
static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
|
|
|
|
{
|
|
|
|
BUG_ON(!hba);
|
|
|
|
hba->priv = variant;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ufshcd_get_variant - get variant specific data from the hba
|
|
|
|
* @hba - per adapter instance
|
|
|
|
*/
|
|
|
|
static inline void *ufshcd_get_variant(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
BUG_ON(!hba);
|
|
|
|
return hba->priv;
|
|
|
|
}
|
2016-12-23 10:41:22 +08:00
|
|
|
static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
|
|
|
|
struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
|
|
|
|
}
|
2015-10-28 19:15:47 +08:00
|
|
|
|
2020-05-22 16:32:11 +08:00
|
|
|
static inline u8 ufshcd_wb_get_query_index(struct ufs_hba *hba)
|
2020-05-08 16:01:13 +08:00
|
|
|
{
|
2021-01-20 00:38:46 +08:00
|
|
|
if (hba->dev_info.wb_buffer_type == WB_BUF_MODE_LU_DEDICATED)
|
2020-05-08 16:01:13 +08:00
|
|
|
return hba->dev_info.wb_dedicated_lu;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2021-07-22 11:34:24 +08:00
|
|
|
#ifdef CONFIG_PM
|
2021-07-22 11:34:23 +08:00
|
|
|
extern int ufshcd_runtime_suspend(struct device *dev);
|
|
|
|
extern int ufshcd_runtime_resume(struct device *dev);
|
2021-07-22 11:34:24 +08:00
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2021-07-22 11:34:23 +08:00
|
|
|
extern int ufshcd_system_suspend(struct device *dev);
|
|
|
|
extern int ufshcd_system_resume(struct device *dev);
|
2021-07-22 11:34:24 +08:00
|
|
|
#endif
|
2014-09-25 20:32:30 +08:00
|
|
|
extern int ufshcd_shutdown(struct ufs_hba *hba);
|
2020-11-16 14:50:52 +08:00
|
|
|
extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
|
|
|
|
int agreed_gear,
|
|
|
|
int adapt_val);
|
2013-09-01 00:10:21 +08:00
|
|
|
extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
|
|
|
|
u8 attr_set, u32 mib_val, u8 peer);
|
|
|
|
extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
|
|
|
|
u32 *mib_val, u8 peer);
|
2018-05-06 18:14:18 +08:00
|
|
|
extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
|
|
|
|
struct ufs_pa_layer_attr *desired_pwr_mode);
|
2013-09-01 00:10:21 +08:00
|
|
|
|
|
|
|
/* UIC command interfaces for DME primitives */
|
|
|
|
#define DME_LOCAL 0
|
|
|
|
#define DME_PEER 1
|
|
|
|
#define ATTR_SET_NOR 0 /* NORMAL */
|
|
|
|
#define ATTR_SET_ST 1 /* STATIC */
|
|
|
|
|
|
|
|
static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
|
|
|
|
u32 mib_val)
|
|
|
|
{
|
|
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
|
|
|
|
mib_val, DME_LOCAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
|
|
|
|
u32 mib_val)
|
|
|
|
{
|
|
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
|
|
|
|
mib_val, DME_LOCAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
|
|
|
|
u32 mib_val)
|
|
|
|
{
|
|
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
|
|
|
|
mib_val, DME_PEER);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
|
|
|
|
u32 mib_val)
|
|
|
|
{
|
|
|
|
return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
|
|
|
|
mib_val, DME_PEER);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_dme_get(struct ufs_hba *hba,
|
|
|
|
u32 attr_sel, u32 *mib_val)
|
|
|
|
{
|
|
|
|
return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
|
|
|
|
u32 attr_sel, u32 *mib_val)
|
|
|
|
{
|
|
|
|
return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
|
|
|
|
}
|
|
|
|
|
2016-03-10 23:37:20 +08:00
|
|
|
static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
|
|
|
|
{
|
|
|
|
return (pwr_info->pwr_rx == FAST_MODE ||
|
|
|
|
pwr_info->pwr_rx == FASTAUTO_MODE) &&
|
|
|
|
(pwr_info->pwr_tx == FAST_MODE ||
|
|
|
|
pwr_info->pwr_tx == FASTAUTO_MODE);
|
|
|
|
}
|
|
|
|
|
2020-02-07 15:03:57 +08:00
|
|
|
static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
|
|
|
|
}
|
|
|
|
|
2016-02-01 21:02:46 +08:00
|
|
|
/* Expose Query-Request API */
|
2018-02-15 20:14:07 +08:00
|
|
|
int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
|
|
|
|
enum query_opcode opcode,
|
|
|
|
enum desc_idn idn, u8 index,
|
|
|
|
u8 selector,
|
|
|
|
u8 *desc_buf, int *buf_len);
|
2018-02-15 20:14:02 +08:00
|
|
|
int ufshcd_read_desc_param(struct ufs_hba *hba,
|
|
|
|
enum desc_idn desc_id,
|
|
|
|
int desc_index,
|
|
|
|
u8 param_offset,
|
|
|
|
u8 *param_read_buf,
|
|
|
|
u8 param_size);
|
2021-07-12 17:00:25 +08:00
|
|
|
int ufshcd_query_attr_retry(struct ufs_hba *hba, enum query_opcode opcode,
|
|
|
|
enum attr_idn idn, u8 index, u8 selector,
|
|
|
|
u32 *attr_val);
|
2018-02-15 20:14:11 +08:00
|
|
|
int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
|
|
|
|
enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
|
2016-02-01 21:02:46 +08:00
|
|
|
int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
|
2020-05-08 16:01:12 +08:00
|
|
|
enum flag_idn idn, u8 index, bool *flag_res);
|
2019-07-30 13:55:17 +08:00
|
|
|
|
2019-11-15 14:09:26 +08:00
|
|
|
void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
|
2019-12-30 13:32:28 +08:00
|
|
|
void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
|
2020-05-08 16:01:10 +08:00
|
|
|
void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups);
|
2019-07-30 13:55:17 +08:00
|
|
|
#define SD_ASCII_STD true
|
|
|
|
#define SD_RAW false
|
|
|
|
int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
|
|
|
|
u8 **buf, bool ascii);
|
2018-02-15 20:14:07 +08:00
|
|
|
|
2014-09-25 20:32:32 +08:00
|
|
|
int ufshcd_hold(struct ufs_hba *hba, bool async);
|
|
|
|
void ufshcd_release(struct ufs_hba *hba);
|
2017-02-23 17:05:30 +08:00
|
|
|
|
2020-06-03 17:19:58 +08:00
|
|
|
void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
|
|
|
|
int *desc_length);
|
2017-02-23 17:05:30 +08:00
|
|
|
|
2016-03-10 23:37:16 +08:00
|
|
|
u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
|
2015-10-28 19:15:48 +08:00
|
|
|
|
2018-10-07 22:30:39 +08:00
|
|
|
int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
|
|
|
|
|
2018-10-07 22:30:37 +08:00
|
|
|
int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
|
|
|
|
struct utp_upiu_req *req_upiu,
|
|
|
|
struct utp_upiu_req *rsp_upiu,
|
|
|
|
int msgcode,
|
|
|
|
u8 *desc_buff, int *buff_len,
|
|
|
|
enum query_opcode desc_op);
|
|
|
|
|
2021-03-18 17:55:36 +08:00
|
|
|
int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
|
2021-04-24 08:20:16 +08:00
|
|
|
int ufshcd_suspend_prepare(struct device *dev);
|
|
|
|
void ufshcd_resume_complete(struct device *dev);
|
2021-01-20 00:38:42 +08:00
|
|
|
|
2015-10-28 19:15:48 +08:00
|
|
|
/* Wrapper functions for safely calling variant operations */
|
|
|
|
static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
if (hba->vops)
|
|
|
|
return hba->vops->name;
|
|
|
|
return "";
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_vops_init(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->init)
|
|
|
|
return hba->vops->init(hba);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void ufshcd_vops_exit(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->exit)
|
|
|
|
return hba->vops->exit(hba);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->get_ufs_hci_version)
|
|
|
|
return hba->vops->get_ufs_hci_version(hba);
|
|
|
|
|
|
|
|
return ufshcd_readl(hba, REG_UFS_VERSION);
|
|
|
|
}
|
|
|
|
|
2021-05-24 16:36:58 +08:00
|
|
|
static inline bool ufshcd_has_utrlcnr(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return (hba->ufs_version >= ufshci_version(3, 0));
|
|
|
|
}
|
|
|
|
|
2015-10-28 19:15:51 +08:00
|
|
|
static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
|
|
|
|
bool up, enum ufs_notify_change_status status)
|
2015-10-28 19:15:48 +08:00
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->clk_scale_notify)
|
2015-10-28 19:15:51 +08:00
|
|
|
return hba->vops->clk_scale_notify(hba, up, status);
|
|
|
|
return 0;
|
2015-10-28 19:15:48 +08:00
|
|
|
}
|
|
|
|
|
2020-12-05 19:59:00 +08:00
|
|
|
static inline void ufshcd_vops_event_notify(struct ufs_hba *hba,
|
|
|
|
enum ufs_event_type evt,
|
|
|
|
void *data)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->event_notify)
|
|
|
|
hba->vops->event_notify(hba, evt, data);
|
|
|
|
}
|
|
|
|
|
2016-10-07 12:48:22 +08:00
|
|
|
static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
|
|
|
|
enum ufs_notify_change_status status)
|
2015-10-28 19:15:48 +08:00
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->setup_clocks)
|
2016-10-07 12:48:22 +08:00
|
|
|
return hba->vops->setup_clocks(hba, on, status);
|
2015-10-28 19:15:48 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
|
|
|
|
bool status)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->hce_enable_notify)
|
|
|
|
return hba->vops->hce_enable_notify(hba, status);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
|
|
|
|
bool status)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->link_startup_notify)
|
|
|
|
return hba->vops->link_startup_notify(hba, status);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-12-05 20:00:39 +08:00
|
|
|
static inline int ufshcd_vops_phy_initialization(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->phy_initialization)
|
|
|
|
return hba->vops->phy_initialization(hba);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-10-28 19:15:48 +08:00
|
|
|
static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
|
2021-03-11 12:02:10 +08:00
|
|
|
enum ufs_notify_change_status status,
|
2015-10-28 19:15:48 +08:00
|
|
|
struct ufs_pa_layer_attr *dev_max_params,
|
|
|
|
struct ufs_pa_layer_attr *dev_req_params)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->pwr_change_notify)
|
|
|
|
return hba->vops->pwr_change_notify(hba, status,
|
|
|
|
dev_max_params, dev_req_params);
|
|
|
|
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
2016-11-10 20:14:36 +08:00
|
|
|
static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
|
|
|
|
bool is_scsi_cmd)
|
|
|
|
{
|
2021-07-01 08:51:17 +08:00
|
|
|
if (hba->vops && hba->vops->setup_xfer_req) {
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(hba->host->host_lock, flags);
|
|
|
|
hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
|
|
|
|
spin_unlock_irqrestore(hba->host->host_lock, flags);
|
|
|
|
}
|
2016-11-10 20:14:36 +08:00
|
|
|
}
|
|
|
|
|
2016-11-10 20:16:15 +08:00
|
|
|
static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
|
|
|
|
int tag, u8 tm_function)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->setup_task_mgmt)
|
|
|
|
return hba->vops->setup_task_mgmt(hba, tag, tm_function);
|
|
|
|
}
|
|
|
|
|
2016-11-10 20:17:43 +08:00
|
|
|
static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
|
|
|
|
enum uic_cmd_dme cmd,
|
|
|
|
enum ufs_notify_change_status status)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->hibern8_notify)
|
|
|
|
return hba->vops->hibern8_notify(hba, cmd, status);
|
|
|
|
}
|
|
|
|
|
2020-01-20 21:08:14 +08:00
|
|
|
static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
|
2016-12-06 11:25:32 +08:00
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->apply_dev_quirks)
|
2020-01-20 21:08:14 +08:00
|
|
|
return hba->vops->apply_dev_quirks(hba);
|
2016-12-06 11:25:32 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-05-08 16:01:09 +08:00
|
|
|
static inline void ufshcd_vops_fixup_dev_quirks(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->fixup_dev_quirks)
|
|
|
|
hba->vops->fixup_dev_quirks(hba);
|
|
|
|
}
|
|
|
|
|
2015-10-28 19:15:48 +08:00
|
|
|
static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->suspend)
|
|
|
|
return hba->vops->suspend(hba, op);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->resume)
|
|
|
|
return hba->vops->resume(hba, op);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-10-28 19:15:50 +08:00
|
|
|
static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->dbg_register_dump)
|
|
|
|
hba->vops->dbg_register_dump(hba);
|
|
|
|
}
|
|
|
|
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2020-12-08 21:56:35 +08:00
|
|
|
static inline int ufshcd_vops_device_reset(struct ufs_hba *hba)
|
2019-08-29 03:17:54 +08:00
|
|
|
{
|
2020-12-08 21:56:35 +08:00
|
|
|
if (hba->vops && hba->vops->device_reset)
|
|
|
|
return hba->vops->device_reset(hba);
|
|
|
|
|
|
|
|
return -EOPNOTSUPP;
|
2019-08-29 03:17:54 +08:00
|
|
|
}
|
|
|
|
|
2020-03-26 02:29:01 +08:00
|
|
|
static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
|
|
|
|
struct devfreq_dev_profile
|
|
|
|
*profile, void *data)
|
|
|
|
{
|
|
|
|
if (hba->vops && hba->vops->config_scaling_param)
|
|
|
|
hba->vops->config_scaling_param(hba, profile, data);
|
|
|
|
}
|
|
|
|
|
2018-02-15 20:14:01 +08:00
|
|
|
extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
|
|
|
|
|
2018-02-15 20:14:09 +08:00
|
|
|
/*
|
|
|
|
* ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
|
|
|
|
* @scsi_lun: scsi LUN id
|
|
|
|
*
|
|
|
|
* Returns UPIU LUN id
|
|
|
|
*/
|
|
|
|
static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
|
|
|
|
{
|
|
|
|
if (scsi_is_wlun(scsi_lun))
|
|
|
|
return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
|
|
|
|
| UFS_UPIU_WLUN_ID;
|
|
|
|
else
|
|
|
|
return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
|
|
|
|
}
|
|
|
|
|
2018-06-14 16:14:09 +08:00
|
|
|
int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
|
|
|
|
const char *prefix);
|
|
|
|
|
2021-02-09 14:24:37 +08:00
|
|
|
int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask);
|
|
|
|
int ufshcd_write_ee_control(struct ufs_hba *hba);
|
2021-02-09 14:24:36 +08:00
|
|
|
int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
|
|
|
|
u16 set, u16 clr);
|
|
|
|
|
|
|
|
static inline int ufshcd_update_ee_drv_mask(struct ufs_hba *hba,
|
|
|
|
u16 set, u16 clr)
|
|
|
|
{
|
|
|
|
return ufshcd_update_ee_control(hba, &hba->ee_drv_mask,
|
|
|
|
&hba->ee_usr_mask, set, clr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_update_ee_usr_mask(struct ufs_hba *hba,
|
|
|
|
u16 set, u16 clr)
|
|
|
|
{
|
|
|
|
return ufshcd_update_ee_control(hba, &hba->ee_usr_mask,
|
|
|
|
&hba->ee_drv_mask, set, clr);
|
|
|
|
}
|
|
|
|
|
2021-04-24 08:20:16 +08:00
|
|
|
static inline int ufshcd_rpm_get_sync(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return pm_runtime_get_sync(&hba->sdev_ufs_device->sdev_gendev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_rpm_put_sync(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return pm_runtime_put_sync(&hba->sdev_ufs_device->sdev_gendev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_rpm_put(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return pm_runtime_put(&hba->sdev_ufs_device->sdev_gendev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_rpmb_rpm_get_sync(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return pm_runtime_get_sync(&hba->sdev_rpmb->sdev_gendev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int ufshcd_rpmb_rpm_put(struct ufs_hba *hba)
|
|
|
|
{
|
|
|
|
return pm_runtime_put(&hba->sdev_rpmb->sdev_gendev);
|
|
|
|
}
|
|
|
|
|
2013-02-26 00:14:33 +08:00
|
|
|
#endif /* End of Header */
|