2013-03-29 16:49:37 +08:00
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/*
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* Device Tree Source for the Lager board
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*
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2014-02-20 07:22:31 +08:00
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* Copyright (C) 2013-2014 Renesas Solutions Corp.
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* Copyright (C) 2014 Cogent Embedded, Inc.
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2013-03-29 16:49:37 +08:00
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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2014-11-04 09:47:56 +08:00
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/*
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* SSI-AK4643
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*
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* SW1: 1: AK4643
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* 2: CN22
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* 3: ADV7511
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*
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* This command is required when Playback/Capture
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*
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* amixer set "LINEOUT Mixer DACL" on
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2014-11-04 09:48:38 +08:00
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* amixer set "DVC Out" 100%
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* amixer set "DVC In" 100%
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*
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* You can use Mute
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*
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* amixer set "DVC Out Mute" on
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* amixer set "DVC In Mute" on
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2014-11-11 12:36:47 +08:00
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*
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* You can use Volume Ramp
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*
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* amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
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* amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
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* amixer set "DVC Out Ramp" on
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* aplay xxx.wav &
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* amixer set "DVC Out" 80% // Volume Down
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* amixer set "DVC Out" 100% // Volume Up
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2014-11-04 09:47:56 +08:00
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*/
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2013-03-29 16:49:37 +08:00
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/dts-v1/;
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2013-11-09 20:23:53 +08:00
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#include "r8a7790.dtsi"
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2013-12-11 22:13:47 +08:00
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#include <dt-bindings/gpio/gpio.h>
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2014-03-18 20:57:48 +08:00
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#include <dt-bindings/input/input.h>
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2013-03-29 16:49:37 +08:00
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/ {
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model = "Lager";
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compatible = "renesas,lager", "renesas,r8a7790";
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2014-04-30 08:31:45 +08:00
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aliases {
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2015-11-14 00:22:23 +08:00
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serial0 = &scif0;
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2013-10-18 22:00:00 +08:00
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serial1 = &scifa1;
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2014-04-30 08:31:45 +08:00
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};
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2013-03-29 16:49:37 +08:00
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chosen {
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2014-12-03 01:39:48 +08:00
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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2015-12-09 01:54:15 +08:00
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stdout-path = "serial0:115200n8";
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2013-03-29 16:49:37 +08:00
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};
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memory@40000000 {
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device_type = "memory";
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2014-06-06 14:40:26 +08:00
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reg = <0 0x40000000 0 0x40000000>;
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2013-03-29 16:49:37 +08:00
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};
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2014-09-03 08:49:01 +08:00
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memory@140000000 {
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2013-10-31 11:21:41 +08:00
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device_type = "memory";
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2014-06-06 14:40:26 +08:00
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reg = <1 0x40000000 0 0xc0000000>;
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2013-10-31 11:21:41 +08:00
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};
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2013-03-29 16:49:37 +08:00
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lbsc {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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2013-12-11 22:13:47 +08:00
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2014-11-12 16:59:35 +08:00
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keyboard {
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2014-03-18 20:57:48 +08:00
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compatible = "gpio-keys";
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button@1 {
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linux,code = <KEY_1>;
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label = "SW2-1";
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2015-10-21 18:10:11 +08:00
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wakeup-source;
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2014-03-18 20:57:48 +08:00
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debounce-interval = <20>;
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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};
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button@2 {
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linux,code = <KEY_2>;
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label = "SW2-2";
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2015-10-21 18:10:11 +08:00
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wakeup-source;
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2014-03-18 20:57:48 +08:00
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debounce-interval = <20>;
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gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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};
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button@3 {
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linux,code = <KEY_3>;
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label = "SW2-3";
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2015-10-21 18:10:11 +08:00
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wakeup-source;
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2014-03-18 20:57:48 +08:00
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debounce-interval = <20>;
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gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
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};
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button@4 {
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linux,code = <KEY_4>;
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label = "SW2-4";
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2015-10-21 18:10:11 +08:00
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wakeup-source;
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2014-03-18 20:57:48 +08:00
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debounce-interval = <20>;
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gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
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};
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};
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2013-12-11 22:13:47 +08:00
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leds {
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compatible = "gpio-leds";
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led6 {
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gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
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};
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led7 {
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gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
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};
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led8 {
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gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
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};
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};
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fixedregulator3v3: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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2014-02-13 13:43:19 +08:00
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vcc_sdhi0: regulator@1 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi0: regulator@2 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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vcc_sdhi2: regulator@3 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI2 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi2: regulator@4 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI2 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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2014-01-21 23:02:54 +08:00
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2015-08-20 11:09:52 +08:00
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audio_clock: clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <11289600>;
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clock-output-names = "audio_clock";
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};
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2015-07-14 12:56:10 +08:00
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rsnd_ak4643: sound {
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2014-11-04 09:47:56 +08:00
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compatible = "simple-audio-card";
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simple-audio-card,format = "left_j";
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simple-audio-card,bitclock-master = <&sndcodec>;
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simple-audio-card,frame-master = <&sndcodec>;
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sndcpu: simple-audio-card,cpu {
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sound-dai = <&rcar_sound>;
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};
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sndcodec: simple-audio-card,codec {
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sound-dai = <&ak4643>;
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2015-08-20 11:09:52 +08:00
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clocks = <&audio_clock>;
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2014-11-04 09:47:56 +08:00
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};
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};
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2014-01-21 23:02:54 +08:00
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vga-encoder {
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compatible = "adi,adv7123";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7123_in: endpoint {
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remote-endpoint = <&du_out_rgb>;
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};
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};
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port@1 {
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reg = <1>;
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adv7123_out: endpoint {
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remote-endpoint = <&vga_in>;
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};
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};
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};
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};
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vga {
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compatible = "vga-connector";
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port {
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vga_in: endpoint {
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remote-endpoint = <&adv7123_out>;
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};
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};
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};
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2014-12-11 07:42:11 +08:00
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con: endpoint {
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remote-endpoint = <&adv7511_out>;
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};
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};
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};
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2015-02-26 17:21:22 +08:00
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x2_clk: x2-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <148500000>;
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};
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x13_clk: x13-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <148500000>;
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};
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2014-01-21 23:02:54 +08:00
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};
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&du {
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pinctrl-0 = <&du_pins>;
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pinctrl-names = "default";
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status = "okay";
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2015-02-26 17:21:22 +08:00
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clocks = <&mstp7_clks R8A7790_CLK_DU0>,
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<&mstp7_clks R8A7790_CLK_DU1>,
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<&mstp7_clks R8A7790_CLK_DU2>,
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<&mstp7_clks R8A7790_CLK_LVDS0>,
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<&mstp7_clks R8A7790_CLK_LVDS1>,
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<&x13_clk>, <&x2_clk>;
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clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1",
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"dclkin.0", "dclkin.1";
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2014-01-21 23:02:54 +08:00
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ports {
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port@0 {
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endpoint {
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remote-endpoint = <&adv7123_in>;
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};
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};
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2014-12-11 07:42:11 +08:00
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port@1 {
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endpoint {
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remote-endpoint = <&adv7511_in>;
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};
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};
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2014-01-21 23:02:54 +08:00
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port@2 {
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lvds_connector: endpoint {
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};
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};
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};
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2013-12-11 22:13:47 +08:00
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};
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2013-12-11 22:13:49 +08:00
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&extal_clk {
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clock-frequency = <20000000>;
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};
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2013-12-11 22:13:47 +08:00
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&pfc {
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2014-02-17 05:31:59 +08:00
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du_pins: du {
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renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
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renesas,function = "du";
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};
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2015-11-14 00:22:23 +08:00
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scif0_pins: serial0 {
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renesas,groups = "scif0_data";
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renesas,function = "scif0";
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2013-12-11 22:13:47 +08:00
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};
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2014-02-20 07:22:31 +08:00
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ether_pins: ether {
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renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
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renesas,function = "eth";
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};
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phy1_pins: phy1 {
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renesas,groups = "intc_irq0";
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renesas,function = "intc";
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};
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2014-09-17 00:10:37 +08:00
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scifa1_pins: serial1 {
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renesas,groups = "scifa1_data";
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renesas,function = "scifa1";
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2013-12-11 22:13:47 +08:00
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};
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2014-02-13 13:43:19 +08:00
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sdhi0_pins: sd0 {
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2014-04-08 03:16:52 +08:00
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renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
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2014-02-13 13:43:19 +08:00
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renesas,function = "sdhi0";
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};
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sdhi2_pins: sd2 {
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2014-04-08 03:16:52 +08:00
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renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
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2014-02-13 13:43:19 +08:00
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renesas,function = "sdhi2";
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};
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2013-12-11 22:13:47 +08:00
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mmc1_pins: mmc1 {
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renesas,groups = "mmc1_data8", "mmc1_ctrl";
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renesas,function = "mmc1";
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};
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2014-02-10 18:47:30 +08:00
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2014-02-25 18:30:13 +08:00
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qspi_pins: spi0 {
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2014-02-10 18:47:30 +08:00
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renesas,groups = "qspi_ctrl", "qspi_data4";
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renesas,function = "qspi";
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};
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2014-02-25 18:30:17 +08:00
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msiof1_pins: spi2 {
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renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
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"msiof1_tx";
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renesas,function = "msiof1";
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};
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2014-06-03 20:02:12 +08:00
|
|
|
|
2015-09-10 01:48:19 +08:00
|
|
|
iic0_pins: iic0 {
|
|
|
|
renesas,groups = "iic0";
|
|
|
|
renesas,function = "iic0";
|
|
|
|
};
|
|
|
|
|
2014-07-10 18:50:56 +08:00
|
|
|
iic1_pins: iic1 {
|
|
|
|
renesas,groups = "iic1";
|
|
|
|
renesas,function = "iic1";
|
2014-06-06 15:11:00 +08:00
|
|
|
};
|
|
|
|
|
2014-07-10 18:50:56 +08:00
|
|
|
iic2_pins: iic2 {
|
|
|
|
renesas,groups = "iic2";
|
|
|
|
renesas,function = "iic2";
|
2014-06-06 15:11:00 +08:00
|
|
|
};
|
|
|
|
|
2014-07-04 08:19:51 +08:00
|
|
|
iic3_pins: iic3 {
|
|
|
|
renesas,groups = "iic3";
|
|
|
|
renesas,function = "iic3";
|
2014-06-03 20:02:12 +08:00
|
|
|
};
|
2014-06-25 02:02:21 +08:00
|
|
|
|
2014-10-24 18:44:34 +08:00
|
|
|
hsusb_pins: hsusb {
|
|
|
|
renesas,groups = "usb0_ovc_vbus";
|
|
|
|
renesas,function = "usb0";
|
|
|
|
};
|
|
|
|
|
2014-06-25 02:02:21 +08:00
|
|
|
usb0_pins: usb0 {
|
|
|
|
renesas,groups = "usb0";
|
|
|
|
renesas,function = "usb0";
|
|
|
|
};
|
|
|
|
|
|
|
|
usb1_pins: usb1 {
|
|
|
|
renesas,groups = "usb1";
|
|
|
|
renesas,function = "usb1";
|
|
|
|
};
|
|
|
|
|
|
|
|
usb2_pins: usb2 {
|
|
|
|
renesas,groups = "usb2";
|
|
|
|
renesas,function = "usb2";
|
|
|
|
};
|
2014-08-13 04:18:26 +08:00
|
|
|
|
|
|
|
vin1_pins: vin {
|
|
|
|
renesas,groups = "vin1_data8", "vin1_clk";
|
|
|
|
renesas,function = "vin1";
|
|
|
|
};
|
2014-11-04 09:47:56 +08:00
|
|
|
|
|
|
|
sound_pins: sound {
|
|
|
|
renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
|
|
|
|
renesas,function = "ssi";
|
|
|
|
};
|
|
|
|
|
|
|
|
sound_clk_pins: sound_clk {
|
|
|
|
renesas,groups = "audio_clk_a";
|
|
|
|
renesas,function = "audio_clk";
|
|
|
|
};
|
2013-12-11 22:13:47 +08:00
|
|
|
};
|
|
|
|
|
2014-02-20 07:22:31 +08:00
|
|
|
ðer {
|
|
|
|
pinctrl-0 = <ðer_pins &phy1_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
phy-handle = <&phy1>;
|
|
|
|
renesas,ether-link-active-low;
|
2014-12-09 19:25:01 +08:00
|
|
|
status = "okay";
|
2014-02-20 07:22:31 +08:00
|
|
|
|
|
|
|
phy1: ethernet-phy@1 {
|
|
|
|
reg = <1>;
|
|
|
|
interrupt-parent = <&irqc0>;
|
|
|
|
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
2014-04-08 08:21:35 +08:00
|
|
|
micrel,led-mode = <1>;
|
2014-02-20 07:22:31 +08:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2014-07-09 21:12:41 +08:00
|
|
|
&cmt0 {
|
2014-12-09 19:25:01 +08:00
|
|
|
status = "okay";
|
2014-07-09 21:12:41 +08:00
|
|
|
};
|
|
|
|
|
2013-12-11 22:13:47 +08:00
|
|
|
&mmcif1 {
|
|
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
vmmc-supply = <&fixedregulator3v3>;
|
|
|
|
bus-width = <8>;
|
|
|
|
non-removable;
|
|
|
|
status = "okay";
|
2013-03-29 16:49:37 +08:00
|
|
|
};
|
2014-01-15 01:05:31 +08:00
|
|
|
|
|
|
|
&sata1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
2014-02-10 18:47:30 +08:00
|
|
|
|
2014-02-25 18:30:13 +08:00
|
|
|
&qspi {
|
2014-02-10 18:47:30 +08:00
|
|
|
pinctrl-0 = <&qspi_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
flash: flash@0 {
|
2015-05-21 02:16:52 +08:00
|
|
|
compatible = "spansion,s25fl512s", "jedec,spi-nor";
|
2014-02-10 18:47:30 +08:00
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <30000000>;
|
2014-04-15 01:36:00 +08:00
|
|
|
spi-tx-bus-width = <4>;
|
|
|
|
spi-rx-bus-width = <4>;
|
2014-12-10 10:30:27 +08:00
|
|
|
spi-cpha;
|
|
|
|
spi-cpol;
|
2014-02-10 18:47:30 +08:00
|
|
|
m25p,fast-read;
|
|
|
|
|
2015-11-21 03:38:53 +08:00
|
|
|
partitions {
|
2015-12-21 18:33:48 +08:00
|
|
|
compatible = "fixed-partitions";
|
2015-11-21 03:38:53 +08:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
partition@0 {
|
|
|
|
label = "loader";
|
|
|
|
reg = <0x00000000 0x00040000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition@40000 {
|
|
|
|
label = "user";
|
|
|
|
reg = <0x00040000 0x00400000>;
|
|
|
|
read-only;
|
|
|
|
};
|
|
|
|
partition@440000 {
|
|
|
|
label = "flash";
|
|
|
|
reg = <0x00440000 0x03bc0000>;
|
|
|
|
};
|
2014-02-10 18:47:30 +08:00
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
2014-02-13 13:43:19 +08:00
|
|
|
|
2015-11-14 00:22:23 +08:00
|
|
|
&scif0 {
|
|
|
|
pinctrl-0 = <&scif0_pins>;
|
2014-04-30 08:31:45 +08:00
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2014-09-17 00:10:37 +08:00
|
|
|
&scifa1 {
|
|
|
|
pinctrl-0 = <&scifa1_pins>;
|
2014-04-30 08:31:45 +08:00
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2014-02-25 18:30:17 +08:00
|
|
|
&msiof1 {
|
|
|
|
pinctrl-0 = <&msiof1_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
pmic: pmic@0 {
|
|
|
|
compatible = "renesas,r2a11302ft";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <6000000>;
|
|
|
|
spi-cpol;
|
|
|
|
spi-cpha;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2014-02-13 13:43:19 +08:00
|
|
|
&sdhi0 {
|
|
|
|
pinctrl-0 = <&sdhi0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
vmmc-supply = <&vcc_sdhi0>;
|
|
|
|
vqmmc-supply = <&vccq_sdhi0>;
|
|
|
|
cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&sdhi2 {
|
|
|
|
pinctrl-0 = <&sdhi2_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
vmmc-supply = <&vcc_sdhi2>;
|
|
|
|
vqmmc-supply = <&vccq_sdhi2>;
|
|
|
|
cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
2014-06-03 20:02:12 +08:00
|
|
|
|
2014-06-03 20:02:24 +08:00
|
|
|
&cpu0 {
|
|
|
|
cpu0-supply = <&vdd_dvfs>;
|
|
|
|
};
|
2014-02-13 01:04:33 +08:00
|
|
|
|
2014-07-10 18:50:56 +08:00
|
|
|
&iic0 {
|
2014-12-09 19:25:01 +08:00
|
|
|
status = "okay";
|
2015-09-10 01:48:19 +08:00
|
|
|
pinctrl-0 = <&iic0_pins>;
|
|
|
|
pinctrl-names = "default";
|
2014-02-13 01:04:33 +08:00
|
|
|
};
|
|
|
|
|
2014-07-10 18:50:56 +08:00
|
|
|
&iic1 {
|
2014-12-09 19:25:01 +08:00
|
|
|
status = "okay";
|
2014-07-10 18:50:56 +08:00
|
|
|
pinctrl-0 = <&iic1_pins>;
|
2014-02-13 01:04:34 +08:00
|
|
|
pinctrl-names = "default";
|
2014-02-13 01:04:33 +08:00
|
|
|
};
|
|
|
|
|
2014-07-10 18:50:56 +08:00
|
|
|
&iic2 {
|
2014-12-09 19:25:01 +08:00
|
|
|
status = "okay";
|
2014-07-10 18:50:56 +08:00
|
|
|
pinctrl-0 = <&iic2_pins>;
|
2014-02-13 01:04:34 +08:00
|
|
|
pinctrl-names = "default";
|
2014-08-13 04:18:26 +08:00
|
|
|
|
2014-11-04 09:47:46 +08:00
|
|
|
clock-frequency = <100000>;
|
|
|
|
|
2015-04-28 18:29:22 +08:00
|
|
|
ak4643: codec@12 {
|
2014-11-04 09:47:56 +08:00
|
|
|
compatible = "asahi-kasei,ak4643";
|
|
|
|
#sound-dai-cells = <0>;
|
|
|
|
reg = <0x12>;
|
|
|
|
};
|
|
|
|
|
2014-08-13 04:18:26 +08:00
|
|
|
composite-in@20 {
|
|
|
|
compatible = "adi,adv7180";
|
|
|
|
reg = <0x20>;
|
|
|
|
remote = <&vin1>;
|
|
|
|
|
|
|
|
port {
|
|
|
|
adv7180: endpoint {
|
|
|
|
bus-width = <8>;
|
|
|
|
remote-endpoint = <&vin1ep0>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
2014-12-11 07:42:11 +08:00
|
|
|
|
|
|
|
hdmi@39 {
|
|
|
|
compatible = "adi,adv7511w";
|
|
|
|
reg = <0x39>;
|
|
|
|
interrupt-parent = <&gpio1>;
|
2015-05-06 12:05:31 +08:00
|
|
|
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
|
2014-12-11 07:42:11 +08:00
|
|
|
|
|
|
|
adi,input-depth = <8>;
|
|
|
|
adi,input-colorspace = "rgb";
|
|
|
|
adi,input-clock = "1x";
|
|
|
|
adi,input-style = <1>;
|
|
|
|
adi,input-justification = "evenly";
|
|
|
|
|
|
|
|
ports {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
port@0 {
|
|
|
|
reg = <0>;
|
|
|
|
adv7511_in: endpoint {
|
|
|
|
remote-endpoint = <&du_out_lvds0>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
port@1 {
|
|
|
|
reg = <1>;
|
|
|
|
adv7511_out: endpoint {
|
|
|
|
remote-endpoint = <&hdmi_con>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
2014-02-13 01:04:33 +08:00
|
|
|
};
|
|
|
|
|
2014-07-04 08:19:51 +08:00
|
|
|
&iic3 {
|
2014-06-09 10:09:44 +08:00
|
|
|
pinctrl-names = "default";
|
2014-07-04 08:19:51 +08:00
|
|
|
pinctrl-0 = <&iic3_pins>;
|
2014-06-09 10:09:44 +08:00
|
|
|
status = "okay";
|
|
|
|
|
2015-03-10 04:06:57 +08:00
|
|
|
pmic@58 {
|
|
|
|
compatible = "dlg,da9063";
|
|
|
|
reg = <0x58>;
|
|
|
|
interrupt-parent = <&irqc0>;
|
|
|
|
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
interrupt-controller;
|
|
|
|
|
|
|
|
rtc {
|
|
|
|
compatible = "dlg,da9063-rtc";
|
|
|
|
};
|
|
|
|
|
|
|
|
wdt {
|
|
|
|
compatible = "dlg,da9063-watchdog";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2014-06-09 10:09:44 +08:00
|
|
|
vdd_dvfs: regulator@68 {
|
2014-08-22 22:26:55 +08:00
|
|
|
compatible = "dlg,da9210";
|
2014-06-09 10:09:44 +08:00
|
|
|
reg = <0x68>;
|
2015-03-10 04:06:56 +08:00
|
|
|
interrupt-parent = <&irqc0>;
|
|
|
|
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
2014-06-09 10:09:44 +08:00
|
|
|
|
|
|
|
regulator-min-microvolt = <1000000>;
|
|
|
|
regulator-max-microvolt = <1000000>;
|
|
|
|
regulator-boot-on;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
2014-02-13 01:04:33 +08:00
|
|
|
};
|
2014-06-25 02:02:21 +08:00
|
|
|
|
|
|
|
&pci0 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&usb0_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pci1 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&usb1_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
};
|
|
|
|
|
2014-10-24 18:41:47 +08:00
|
|
|
&xhci {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&usb2_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
};
|
|
|
|
|
2014-06-25 02:02:21 +08:00
|
|
|
&pci2 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&usb2_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
};
|
2014-08-13 04:18:26 +08:00
|
|
|
|
2014-10-24 18:44:34 +08:00
|
|
|
&hsusb {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&hsusb_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
|
|
|
|
};
|
|
|
|
|
2014-09-27 05:01:35 +08:00
|
|
|
&usbphy {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2014-08-13 04:18:26 +08:00
|
|
|
/* composite video input */
|
|
|
|
&vin1 {
|
|
|
|
pinctrl-0 = <&vin1_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
2014-12-09 19:25:01 +08:00
|
|
|
status = "okay";
|
2014-08-13 04:18:26 +08:00
|
|
|
|
|
|
|
port {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
vin1ep0: endpoint {
|
|
|
|
remote-endpoint = <&adv7180>;
|
|
|
|
bus-width = <8>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
2014-11-04 09:47:56 +08:00
|
|
|
|
|
|
|
&rcar_sound {
|
|
|
|
pinctrl-0 = <&sound_pins &sound_clk_pins>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
2014-12-17 14:11:52 +08:00
|
|
|
/* Single DAI */
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2014-11-04 09:47:56 +08:00
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#sound-dai-cells = <0>;
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status = "okay";
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rcar_sound,dai {
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dai0 {
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2014-11-04 09:48:38 +08:00
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playback = <&ssi0 &src2 &dvc0>;
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capture = <&ssi1 &src3 &dvc1>;
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2014-11-04 09:47:56 +08:00
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};
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};
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};
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&ssi1 {
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shared-pin;
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};
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