2013-03-26 09:34:24 +08:00
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/*
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* Device Tree Source for the r8a73a4 SoC
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/ {
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compatible = "renesas,r8a73a4";
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interrupt-parent = <&gic>;
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2013-03-29 15:45:56 +08:00
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#address-cells = <2>;
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#size-cells = <2>;
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2013-03-26 09:34:24 +08:00
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0>;
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clock-frequency = <1500000000>;
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};
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};
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gic: interrupt-controller@f1001000 {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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2013-03-29 15:45:56 +08:00
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reg = <0 0xf1001000 0 0x1000>,
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<0 0xf1002000 0 0x1000>,
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<0 0xf1004000 0 0x2000>,
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<0 0xf1006000 0 0x2000>;
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2013-03-26 09:34:24 +08:00
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interrupts = <1 9 0xf04>;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <1 13 0xf08>,
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<1 14 0xf08>,
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<1 11 0xf08>,
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<1 10 0xf08>;
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};
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2013-03-26 09:34:42 +08:00
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irqc0: interrupt-controller@e61c0000 {
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compatible = "renesas,irqc";
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#interrupt-cells = <2>;
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interrupt-controller;
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2013-03-29 15:45:56 +08:00
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reg = <0 0xe61c0000 0 0x200>;
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2013-03-26 09:34:42 +08:00
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interrupt-parent = <&gic>;
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interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>,
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<0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
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<0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
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<0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
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<0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
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<0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
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<0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
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<0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
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};
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irqc1: interrupt-controller@e61c0200 {
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compatible = "renesas,irqc";
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#interrupt-cells = <2>;
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interrupt-controller;
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2013-03-29 15:45:56 +08:00
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reg = <0 0xe61c0200 0 0x200>;
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2013-03-26 09:34:42 +08:00
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interrupt-parent = <&gic>;
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interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
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<0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
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<0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
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<0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
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<0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
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<0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
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<0 56 4>, <0 57 4>;
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};
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2013-09-27 01:30:03 +08:00
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dmac: dma-multiplexer@0 {
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compatible = "renesas,shdma-mux";
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#dma-cells = <1>;
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dma-channels = <20>;
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dma-requests = <256>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dma0: dma-controller@e6700020 {
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compatible = "renesas,shdma-r8a73a4";
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reg = <0 0xe6700020 0 0x89e0>;
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interrupt-parent = <&gic>;
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interrupts = <0 220 4
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0 200 4
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0 201 4
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0 202 4
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0 203 4
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0 204 4
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0 205 4
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0 206 4
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0 207 4
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0 208 4
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0 209 4
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0 210 4
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0 211 4
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0 212 4
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0 213 4
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0 214 4
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0 215 4
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0 216 4
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0 217 4
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0 218 4
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0 219 4>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15",
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"ch16", "ch17", "ch18", "ch19";
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};
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};
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2013-03-26 14:18:15 +08:00
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thermal@e61f0000 {
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compatible = "renesas,rcar-thermal";
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2013-03-29 15:45:56 +08:00
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reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
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<0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
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2013-03-26 14:18:15 +08:00
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interrupt-parent = <&gic>;
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interrupts = <0 69 4>;
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};
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2013-06-27 17:47:57 +08:00
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i2c0: i2c@e6500000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe6500000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 174 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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i2c1: i2c@e6510000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe6510000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 175 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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i2c2: i2c@e6520000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe6520000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 176 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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i2c3: i2c@e6530000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe6530000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 177 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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i2c4: i2c@e6540000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe6540000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 178 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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i2c5: i2c@e60b0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe60b0000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 179 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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i2c6: i2c@e6550000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe6550000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 184 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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i2c7: i2c@e6560000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe6560000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 185 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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i2c8: i2c@e6570000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0 0xe6570000 0 0x428>;
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interrupt-parent = <&gic>;
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interrupts = <0 173 0x4>;
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2013-09-26 19:06:01 +08:00
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status = "disabled";
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2013-06-27 17:47:57 +08:00
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};
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2013-07-08 23:54:45 +08:00
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2013-10-22 10:35:31 +08:00
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mmcif0: mmc@ee200000 {
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2013-07-08 23:54:45 +08:00
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compatible = "renesas,sh-mmcif";
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reg = <0 0xee200000 0 0x80>;
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interrupt-parent = <&gic>;
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interrupts = <0 169 0x4>;
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reg-io-width = <4>;
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status = "disabled";
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};
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2013-10-22 10:35:31 +08:00
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mmcif1: mmc@ee220000 {
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2013-07-08 23:54:45 +08:00
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compatible = "renesas,sh-mmcif";
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reg = <0 0xee220000 0 0x80>;
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interrupt-parent = <&gic>;
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interrupts = <0 170 0x4>;
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reg-io-width = <4>;
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status = "disabled";
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};
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2013-05-09 21:05:57 +08:00
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pfc: pfc@e6050000 {
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compatible = "renesas,pfc-r8a73a4";
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reg = <0 0xe6050000 0 0x9000>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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2013-08-14 15:24:05 +08:00
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2013-10-22 10:35:31 +08:00
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sdhi0: sd@ee100000 {
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2013-08-29 23:14:49 +08:00
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compatible = "renesas,sdhi-r8a73a4";
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2013-07-08 23:54:45 +08:00
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reg = <0 0xee100000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 165 4>;
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cap-sd-highspeed;
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status = "disabled";
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};
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2013-10-22 10:35:31 +08:00
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sdhi1: sd@ee120000 {
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2013-08-29 23:14:49 +08:00
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compatible = "renesas,sdhi-r8a73a4";
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2013-07-08 23:54:45 +08:00
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reg = <0 0xee120000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 166 4>;
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cap-sd-highspeed;
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status = "disabled";
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};
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2013-10-22 10:35:31 +08:00
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sdhi2: sd@ee140000 {
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2013-08-29 23:14:49 +08:00
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compatible = "renesas,sdhi-r8a73a4";
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2013-07-08 23:54:45 +08:00
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reg = <0 0xee140000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 167 4>;
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cap-sd-highspeed;
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status = "disabled";
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};
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2013-03-26 09:34:24 +08:00
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};
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