2019-05-14 16:26:58 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) STMicroelectronics 2018 - All Rights Reserved
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* Authors: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
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* Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
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*/
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#include <linux/arm-smccc.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mailbox_client.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_reserved_mem.h>
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2019-08-26 23:38:43 +08:00
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#include <linux/pm_wakeirq.h>
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2019-05-14 16:26:58 +08:00
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#include <linux/regmap.h>
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#include <linux/remoteproc.h>
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#include <linux/reset.h>
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2020-04-10 05:09:35 +08:00
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#include <linux/slab.h>
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2019-10-25 16:56:39 +08:00
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#include <linux/workqueue.h>
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2019-05-14 16:26:58 +08:00
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#include "remoteproc_internal.h"
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#define HOLD_BOOT 0
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#define RELEASE_BOOT 1
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#define MBOX_NB_VQ 2
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#define MBOX_NB_MBX 3
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#define STM32_SMC_RCC 0x82001000
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#define STM32_SMC_REG_WRITE 0x1
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#define STM32_MBX_VQ0 "vq0"
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2019-10-25 16:56:39 +08:00
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#define STM32_MBX_VQ0_ID 0
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2019-05-14 16:26:58 +08:00
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#define STM32_MBX_VQ1 "vq1"
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2019-10-25 16:56:39 +08:00
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#define STM32_MBX_VQ1_ID 1
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2019-05-14 16:26:58 +08:00
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#define STM32_MBX_SHUTDOWN "shutdown"
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2020-07-15 04:04:43 +08:00
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#define RSC_TBL_SIZE 1024
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2020-07-15 04:04:40 +08:00
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#define M4_STATE_OFF 0
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#define M4_STATE_INI 1
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#define M4_STATE_CRUN 2
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#define M4_STATE_CSTOP 3
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#define M4_STATE_STANDBY 4
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#define M4_STATE_CRASH 5
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2019-05-14 16:26:58 +08:00
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struct stm32_syscon {
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struct regmap *map;
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u32 reg;
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u32 mask;
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};
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struct stm32_rproc_mem {
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char name[20];
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void __iomem *cpu_addr;
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phys_addr_t bus_addr;
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u32 dev_addr;
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size_t size;
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};
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struct stm32_rproc_mem_ranges {
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u32 dev_addr;
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u32 bus_addr;
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u32 size;
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};
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struct stm32_mbox {
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const unsigned char name[10];
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struct mbox_chan *chan;
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struct mbox_client client;
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2019-10-25 16:56:39 +08:00
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struct work_struct vq_work;
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2019-05-14 16:26:58 +08:00
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int vq_id;
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};
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struct stm32_rproc {
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struct reset_control *rst;
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struct stm32_syscon hold_boot;
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struct stm32_syscon pdds;
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2020-07-15 04:04:39 +08:00
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struct stm32_syscon m4_state;
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struct stm32_syscon rsctbl;
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2019-08-26 23:38:43 +08:00
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int wdg_irq;
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2019-05-14 16:26:58 +08:00
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u32 nb_rmems;
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struct stm32_rproc_mem *rmems;
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struct stm32_mbox mb[MBOX_NB_MBX];
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2019-10-25 16:56:39 +08:00
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struct workqueue_struct *workqueue;
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2019-05-14 16:26:58 +08:00
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bool secured_soc;
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2020-07-15 04:04:43 +08:00
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void __iomem *rsc_va;
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2019-05-14 16:26:58 +08:00
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};
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static int stm32_rproc_pa_to_da(struct rproc *rproc, phys_addr_t pa, u64 *da)
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{
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unsigned int i;
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struct stm32_rproc *ddata = rproc->priv;
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struct stm32_rproc_mem *p_mem;
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for (i = 0; i < ddata->nb_rmems; i++) {
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p_mem = &ddata->rmems[i];
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if (pa < p_mem->bus_addr ||
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pa >= p_mem->bus_addr + p_mem->size)
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continue;
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*da = pa - p_mem->bus_addr + p_mem->dev_addr;
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dev_dbg(rproc->dev.parent, "pa %pa to da %llx\n", &pa, *da);
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return 0;
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}
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return -EINVAL;
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}
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static int stm32_rproc_mem_alloc(struct rproc *rproc,
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struct rproc_mem_entry *mem)
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{
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struct device *dev = rproc->dev.parent;
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void *va;
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dev_dbg(dev, "map memory: %pa+%x\n", &mem->dma, mem->len);
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va = ioremap_wc(mem->dma, mem->len);
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if (IS_ERR_OR_NULL(va)) {
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dev_err(dev, "Unable to map memory region: %pa+%x\n",
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&mem->dma, mem->len);
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return -ENOMEM;
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}
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/* Update memory entry va */
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mem->va = va;
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return 0;
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}
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static int stm32_rproc_mem_release(struct rproc *rproc,
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struct rproc_mem_entry *mem)
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{
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dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma);
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iounmap(mem->va);
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return 0;
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}
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2020-07-15 04:04:35 +08:00
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static int stm32_rproc_of_memory_translations(struct platform_device *pdev,
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struct stm32_rproc *ddata)
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2019-05-14 16:26:58 +08:00
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{
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2020-07-15 04:04:35 +08:00
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struct device *parent, *dev = &pdev->dev;
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2019-05-14 16:26:58 +08:00
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struct device_node *np;
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struct stm32_rproc_mem *p_mems;
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struct stm32_rproc_mem_ranges *mem_range;
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int cnt, array_size, i, ret = 0;
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parent = dev->parent;
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np = parent->of_node;
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cnt = of_property_count_elems_of_size(np, "dma-ranges",
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sizeof(*mem_range));
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if (cnt <= 0) {
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dev_err(dev, "%s: dma-ranges property not defined\n", __func__);
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return -EINVAL;
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}
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p_mems = devm_kcalloc(dev, cnt, sizeof(*p_mems), GFP_KERNEL);
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if (!p_mems)
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return -ENOMEM;
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mem_range = kcalloc(cnt, sizeof(*mem_range), GFP_KERNEL);
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if (!mem_range)
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return -ENOMEM;
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array_size = cnt * sizeof(struct stm32_rproc_mem_ranges) / sizeof(u32);
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ret = of_property_read_u32_array(np, "dma-ranges",
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(u32 *)mem_range, array_size);
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if (ret) {
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dev_err(dev, "error while get dma-ranges property: %x\n", ret);
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goto free_mem;
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}
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for (i = 0; i < cnt; i++) {
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p_mems[i].bus_addr = mem_range[i].bus_addr;
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p_mems[i].dev_addr = mem_range[i].dev_addr;
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p_mems[i].size = mem_range[i].size;
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dev_dbg(dev, "memory range[%i]: da %#x, pa %pa, size %#zx:\n",
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i, p_mems[i].dev_addr, &p_mems[i].bus_addr,
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p_mems[i].size);
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}
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ddata->rmems = p_mems;
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ddata->nb_rmems = cnt;
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free_mem:
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kfree(mem_range);
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return ret;
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}
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static int stm32_rproc_mbox_idx(struct rproc *rproc, const unsigned char *name)
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{
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struct stm32_rproc *ddata = rproc->priv;
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int i;
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for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
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if (!strncmp(ddata->mb[i].name, name, strlen(name)))
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return i;
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}
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dev_err(&rproc->dev, "mailbox %s not found\n", name);
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return -EINVAL;
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}
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static int stm32_rproc_elf_load_rsc_table(struct rproc *rproc,
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const struct firmware *fw)
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{
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if (rproc_elf_load_rsc_table(rproc, fw))
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dev_warn(&rproc->dev, "no resource table found for this firmware\n");
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return 0;
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}
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2020-07-15 04:04:42 +08:00
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static int stm32_rproc_parse_memory_regions(struct rproc *rproc)
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2019-05-14 16:26:58 +08:00
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{
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struct device *dev = rproc->dev.parent;
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struct device_node *np = dev->of_node;
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struct of_phandle_iterator it;
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struct rproc_mem_entry *mem;
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struct reserved_mem *rmem;
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u64 da;
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int index = 0;
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/* Register associated reserved memory regions */
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of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
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while (of_phandle_iterator_next(&it) == 0) {
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rmem = of_reserved_mem_lookup(it.node);
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if (!rmem) {
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dev_err(dev, "unable to acquire memory-region\n");
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return -EINVAL;
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}
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if (stm32_rproc_pa_to_da(rproc, rmem->base, &da) < 0) {
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dev_err(dev, "memory region not valid %pa\n",
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&rmem->base);
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return -EINVAL;
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}
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/* No need to map vdev buffer */
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if (strcmp(it.node->name, "vdev0buffer")) {
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/* Register memory region */
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mem = rproc_mem_entry_init(dev, NULL,
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(dma_addr_t)rmem->base,
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rmem->size, da,
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stm32_rproc_mem_alloc,
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stm32_rproc_mem_release,
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it.node->name);
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if (mem)
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rproc_coredump_add_segment(rproc, da,
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rmem->size);
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} else {
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/* Register reserved memory for vdev buffer alloc */
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mem = rproc_of_resm_mem_entry_init(dev, index,
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rmem->size,
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rmem->base,
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it.node->name);
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}
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if (!mem)
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return -ENOMEM;
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rproc_add_carveout(rproc, mem);
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index++;
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}
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2020-07-15 04:04:42 +08:00
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return 0;
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}
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static int stm32_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
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{
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int ret = stm32_rproc_parse_memory_regions(rproc);
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if (ret)
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return ret;
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2019-05-14 16:26:58 +08:00
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return stm32_rproc_elf_load_rsc_table(rproc, fw);
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}
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static irqreturn_t stm32_rproc_wdg(int irq, void *data)
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{
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2020-07-15 04:04:36 +08:00
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struct platform_device *pdev = data;
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struct rproc *rproc = platform_get_drvdata(pdev);
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2019-05-14 16:26:58 +08:00
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rproc_report_crash(rproc, RPROC_WATCHDOG);
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return IRQ_HANDLED;
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}
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2019-10-25 16:56:39 +08:00
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static void stm32_rproc_mb_vq_work(struct work_struct *work)
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{
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struct stm32_mbox *mb = container_of(work, struct stm32_mbox, vq_work);
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struct rproc *rproc = dev_get_drvdata(mb->client.dev);
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if (rproc_vq_interrupt(rproc, mb->vq_id) == IRQ_NONE)
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dev_dbg(&rproc->dev, "no message found in vq%d\n", mb->vq_id);
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}
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2019-05-14 16:26:58 +08:00
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static void stm32_rproc_mb_callback(struct mbox_client *cl, void *data)
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{
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struct rproc *rproc = dev_get_drvdata(cl->dev);
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struct stm32_mbox *mb = container_of(cl, struct stm32_mbox, client);
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2019-10-25 16:56:39 +08:00
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struct stm32_rproc *ddata = rproc->priv;
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2019-05-14 16:26:58 +08:00
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2019-10-25 16:56:39 +08:00
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queue_work(ddata->workqueue, &mb->vq_work);
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2019-05-14 16:26:58 +08:00
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}
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static void stm32_rproc_free_mbox(struct rproc *rproc)
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{
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struct stm32_rproc *ddata = rproc->priv;
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
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if (ddata->mb[i].chan)
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mbox_free_channel(ddata->mb[i].chan);
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ddata->mb[i].chan = NULL;
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}
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}
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static const struct stm32_mbox stm32_rproc_mbox[MBOX_NB_MBX] = {
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{
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.name = STM32_MBX_VQ0,
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2019-10-25 16:56:39 +08:00
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.vq_id = STM32_MBX_VQ0_ID,
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2019-05-14 16:26:58 +08:00
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.client = {
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.rx_callback = stm32_rproc_mb_callback,
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.tx_block = false,
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},
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},
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{
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.name = STM32_MBX_VQ1,
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2019-10-25 16:56:39 +08:00
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.vq_id = STM32_MBX_VQ1_ID,
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2019-05-14 16:26:58 +08:00
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.client = {
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|
|
|
.rx_callback = stm32_rproc_mb_callback,
|
|
|
|
.tx_block = false,
|
|
|
|
},
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = STM32_MBX_SHUTDOWN,
|
|
|
|
.vq_id = -1,
|
|
|
|
.client = {
|
|
|
|
.tx_block = true,
|
|
|
|
.tx_done = NULL,
|
|
|
|
.tx_tout = 500, /* 500 ms time out */
|
|
|
|
},
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2019-11-15 18:03:08 +08:00
|
|
|
static int stm32_rproc_request_mbox(struct rproc *rproc)
|
2019-05-14 16:26:58 +08:00
|
|
|
{
|
|
|
|
struct stm32_rproc *ddata = rproc->priv;
|
|
|
|
struct device *dev = &rproc->dev;
|
|
|
|
unsigned int i;
|
2019-11-15 18:03:08 +08:00
|
|
|
int j;
|
2019-05-14 16:26:58 +08:00
|
|
|
const unsigned char *name;
|
|
|
|
struct mbox_client *cl;
|
|
|
|
|
|
|
|
/* Initialise mailbox structure table */
|
|
|
|
memcpy(ddata->mb, stm32_rproc_mbox, sizeof(stm32_rproc_mbox));
|
|
|
|
|
|
|
|
for (i = 0; i < MBOX_NB_MBX; i++) {
|
|
|
|
name = ddata->mb[i].name;
|
|
|
|
|
|
|
|
cl = &ddata->mb[i].client;
|
|
|
|
cl->dev = dev->parent;
|
|
|
|
|
|
|
|
ddata->mb[i].chan = mbox_request_channel_byname(cl, name);
|
|
|
|
if (IS_ERR(ddata->mb[i].chan)) {
|
2020-12-17 22:41:25 +08:00
|
|
|
if (PTR_ERR(ddata->mb[i].chan) == -EPROBE_DEFER) {
|
|
|
|
dev_err_probe(dev->parent,
|
|
|
|
PTR_ERR(ddata->mb[i].chan),
|
|
|
|
"failed to request mailbox %s\n",
|
|
|
|
name);
|
2019-11-15 18:03:08 +08:00
|
|
|
goto err_probe;
|
2020-12-17 22:41:25 +08:00
|
|
|
}
|
2019-05-14 16:26:58 +08:00
|
|
|
dev_warn(dev, "cannot get %s mbox\n", name);
|
|
|
|
ddata->mb[i].chan = NULL;
|
|
|
|
}
|
2019-10-25 16:56:39 +08:00
|
|
|
if (ddata->mb[i].vq_id >= 0) {
|
|
|
|
INIT_WORK(&ddata->mb[i].vq_work,
|
|
|
|
stm32_rproc_mb_vq_work);
|
|
|
|
}
|
2019-05-14 16:26:58 +08:00
|
|
|
}
|
2019-11-15 18:03:08 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_probe:
|
|
|
|
for (j = i - 1; j >= 0; j--)
|
|
|
|
if (ddata->mb[j].chan)
|
|
|
|
mbox_free_channel(ddata->mb[j].chan);
|
|
|
|
return -EPROBE_DEFER;
|
2019-05-14 16:26:58 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold)
|
|
|
|
{
|
|
|
|
struct stm32_rproc *ddata = rproc->priv;
|
|
|
|
struct stm32_syscon hold_boot = ddata->hold_boot;
|
|
|
|
struct arm_smccc_res smc_res;
|
|
|
|
int val, err;
|
|
|
|
|
|
|
|
val = hold ? HOLD_BOOT : RELEASE_BOOT;
|
|
|
|
|
2019-07-08 20:42:51 +08:00
|
|
|
if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) {
|
2019-05-14 16:26:58 +08:00
|
|
|
arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE,
|
|
|
|
hold_boot.reg, val, 0, 0, 0, 0, &smc_res);
|
|
|
|
err = smc_res.a0;
|
|
|
|
} else {
|
|
|
|
err = regmap_update_bits(hold_boot.map, hold_boot.reg,
|
|
|
|
hold_boot.mask, val);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (err)
|
|
|
|
dev_err(&rproc->dev, "failed to set hold boot\n");
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stm32_rproc_add_coredump_trace(struct rproc *rproc)
|
|
|
|
{
|
|
|
|
struct rproc_debug_trace *trace;
|
|
|
|
struct rproc_dump_segment *segment;
|
|
|
|
bool already_added;
|
|
|
|
|
|
|
|
list_for_each_entry(trace, &rproc->traces, node) {
|
|
|
|
already_added = false;
|
|
|
|
|
|
|
|
list_for_each_entry(segment, &rproc->dump_segments, node) {
|
|
|
|
if (segment->da == trace->trace_mem.da) {
|
|
|
|
already_added = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!already_added)
|
|
|
|
rproc_coredump_add_segment(rproc, trace->trace_mem.da,
|
|
|
|
trace->trace_mem.len);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32_rproc_start(struct rproc *rproc)
|
|
|
|
{
|
2019-08-26 23:38:06 +08:00
|
|
|
struct stm32_rproc *ddata = rproc->priv;
|
2019-05-14 16:26:58 +08:00
|
|
|
int err;
|
|
|
|
|
|
|
|
stm32_rproc_add_coredump_trace(rproc);
|
|
|
|
|
2019-08-26 23:38:06 +08:00
|
|
|
/* clear remote proc Deep Sleep */
|
|
|
|
if (ddata->pdds.map) {
|
|
|
|
err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
|
|
|
|
ddata->pdds.mask, 0);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&rproc->dev, "failed to clear pdds\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-05-14 16:26:58 +08:00
|
|
|
err = stm32_rproc_set_hold_boot(rproc, false);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
return stm32_rproc_set_hold_boot(rproc, true);
|
|
|
|
}
|
|
|
|
|
2020-07-15 04:04:44 +08:00
|
|
|
static int stm32_rproc_attach(struct rproc *rproc)
|
|
|
|
{
|
|
|
|
stm32_rproc_add_coredump_trace(rproc);
|
|
|
|
|
|
|
|
return stm32_rproc_set_hold_boot(rproc, true);
|
|
|
|
}
|
|
|
|
|
2019-05-14 16:26:58 +08:00
|
|
|
static int stm32_rproc_stop(struct rproc *rproc)
|
|
|
|
{
|
|
|
|
struct stm32_rproc *ddata = rproc->priv;
|
|
|
|
int err, dummy_data, idx;
|
|
|
|
|
|
|
|
/* request shutdown of the remote processor */
|
|
|
|
if (rproc->state != RPROC_OFFLINE) {
|
|
|
|
idx = stm32_rproc_mbox_idx(rproc, STM32_MBX_SHUTDOWN);
|
|
|
|
if (idx >= 0 && ddata->mb[idx].chan) {
|
|
|
|
/* a dummy data is sent to allow to block on transmit */
|
|
|
|
err = mbox_send_message(ddata->mb[idx].chan,
|
|
|
|
&dummy_data);
|
|
|
|
if (err < 0)
|
|
|
|
dev_warn(&rproc->dev, "warning: remote FW shutdown without ack\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
err = stm32_rproc_set_hold_boot(rproc, true);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = reset_control_assert(ddata->rst);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&rproc->dev, "failed to assert the reset\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* to allow platform Standby power mode, set remote proc Deep Sleep */
|
|
|
|
if (ddata->pdds.map) {
|
|
|
|
err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
|
|
|
|
ddata->pdds.mask, 1);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&rproc->dev, "failed to set pdds\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-07-15 04:04:45 +08:00
|
|
|
/* update coprocessor state to OFF if available */
|
|
|
|
if (ddata->m4_state.map) {
|
|
|
|
err = regmap_update_bits(ddata->m4_state.map,
|
|
|
|
ddata->m4_state.reg,
|
|
|
|
ddata->m4_state.mask,
|
|
|
|
M4_STATE_OFF);
|
|
|
|
if (err) {
|
|
|
|
dev_err(&rproc->dev, "failed to set copro state\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-05-14 16:26:58 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stm32_rproc_kick(struct rproc *rproc, int vqid)
|
|
|
|
{
|
|
|
|
struct stm32_rproc *ddata = rproc->priv;
|
|
|
|
unsigned int i;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (WARN_ON(vqid >= MBOX_NB_VQ))
|
|
|
|
return;
|
|
|
|
|
|
|
|
for (i = 0; i < MBOX_NB_MBX; i++) {
|
|
|
|
if (vqid != ddata->mb[i].vq_id)
|
|
|
|
continue;
|
|
|
|
if (!ddata->mb[i].chan)
|
|
|
|
return;
|
|
|
|
err = mbox_send_message(ddata->mb[i].chan, (void *)(long)vqid);
|
|
|
|
if (err < 0)
|
|
|
|
dev_err(&rproc->dev, "%s: failed (%s, err:%d)\n",
|
|
|
|
__func__, ddata->mb[i].name, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-11-08 07:36:30 +08:00
|
|
|
static const struct rproc_ops st_rproc_ops = {
|
2019-05-14 16:26:58 +08:00
|
|
|
.start = stm32_rproc_start,
|
|
|
|
.stop = stm32_rproc_stop,
|
2020-07-15 04:04:44 +08:00
|
|
|
.attach = stm32_rproc_attach,
|
2019-05-14 16:26:58 +08:00
|
|
|
.kick = stm32_rproc_kick,
|
|
|
|
.load = rproc_elf_load_segments,
|
|
|
|
.parse_fw = stm32_rproc_parse_fw,
|
|
|
|
.find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
|
2020-04-22 17:30:17 +08:00
|
|
|
.sanity_check = rproc_elf_sanity_check,
|
2019-05-14 16:26:58 +08:00
|
|
|
.get_boot_addr = rproc_elf_get_boot_addr,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct of_device_id stm32_rproc_match[] = {
|
|
|
|
{ .compatible = "st,stm32mp1-m4" },
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, stm32_rproc_match);
|
|
|
|
|
|
|
|
static int stm32_rproc_get_syscon(struct device_node *np, const char *prop,
|
|
|
|
struct stm32_syscon *syscon)
|
|
|
|
{
|
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
syscon->map = syscon_regmap_lookup_by_phandle(np, prop);
|
|
|
|
if (IS_ERR(syscon->map)) {
|
|
|
|
err = PTR_ERR(syscon->map);
|
|
|
|
syscon->map = NULL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = of_property_read_u32_index(np, prop, 1, &syscon->reg);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
err = of_property_read_u32_index(np, prop, 2, &syscon->mask);
|
|
|
|
|
|
|
|
out:
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2020-07-15 04:04:37 +08:00
|
|
|
static int stm32_rproc_parse_dt(struct platform_device *pdev,
|
|
|
|
struct stm32_rproc *ddata, bool *auto_boot)
|
2019-05-14 16:26:58 +08:00
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct device_node *np = dev->of_node;
|
|
|
|
struct stm32_syscon tz;
|
|
|
|
unsigned int tzen;
|
|
|
|
int err, irq;
|
|
|
|
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
2019-08-26 23:38:29 +08:00
|
|
|
if (irq == -EPROBE_DEFER)
|
2020-12-17 22:41:25 +08:00
|
|
|
return dev_err_probe(dev, irq, "failed to get interrupt\n");
|
2019-08-26 23:38:29 +08:00
|
|
|
|
2019-05-14 16:26:58 +08:00
|
|
|
if (irq > 0) {
|
|
|
|
err = devm_request_irq(dev, irq, stm32_rproc_wdg, 0,
|
2020-07-15 04:04:36 +08:00
|
|
|
dev_name(dev), pdev);
|
2020-12-17 22:41:25 +08:00
|
|
|
if (err)
|
|
|
|
return dev_err_probe(dev, err,
|
|
|
|
"failed to request wdg irq\n");
|
2019-05-14 16:26:58 +08:00
|
|
|
|
2019-08-26 23:38:43 +08:00
|
|
|
ddata->wdg_irq = irq;
|
|
|
|
|
|
|
|
if (of_property_read_bool(np, "wakeup-source")) {
|
|
|
|
device_init_wakeup(dev, true);
|
|
|
|
dev_pm_set_wake_irq(dev, irq);
|
|
|
|
}
|
|
|
|
|
2019-05-14 16:26:58 +08:00
|
|
|
dev_info(dev, "wdg irq registered\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
ddata->rst = devm_reset_control_get_by_index(dev, 0);
|
2020-12-17 22:41:25 +08:00
|
|
|
if (IS_ERR(ddata->rst))
|
|
|
|
return dev_err_probe(dev, PTR_ERR(ddata->rst),
|
|
|
|
"failed to get mcu_reset\n");
|
2019-05-14 16:26:58 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* if platform is secured the hold boot bit must be written by
|
|
|
|
* smc call and read normally.
|
|
|
|
* if not secure the hold boot bit could be read/write normally
|
|
|
|
*/
|
|
|
|
err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz);
|
|
|
|
if (err) {
|
|
|
|
dev_err(dev, "failed to get tz syscfg\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = regmap_read(tz.map, tz.reg, &tzen);
|
|
|
|
if (err) {
|
2020-07-15 04:04:37 +08:00
|
|
|
dev_err(dev, "failed to read tzen\n");
|
2019-05-14 16:26:58 +08:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
ddata->secured_soc = tzen & tz.mask;
|
|
|
|
|
|
|
|
err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot",
|
|
|
|
&ddata->hold_boot);
|
|
|
|
if (err) {
|
|
|
|
dev_err(dev, "failed to get hold boot\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds);
|
|
|
|
if (err)
|
2020-02-25 01:25:19 +08:00
|
|
|
dev_info(dev, "failed to get pdds\n");
|
2019-05-14 16:26:58 +08:00
|
|
|
|
2020-07-15 04:04:37 +08:00
|
|
|
*auto_boot = of_property_read_bool(np, "st,auto-boot");
|
2019-05-14 16:26:58 +08:00
|
|
|
|
2020-07-15 04:04:39 +08:00
|
|
|
/*
|
|
|
|
* See if we can check the M4 status, i.e if it was started
|
|
|
|
* from the boot loader or not.
|
|
|
|
*/
|
|
|
|
err = stm32_rproc_get_syscon(np, "st,syscfg-m4-state",
|
|
|
|
&ddata->m4_state);
|
|
|
|
if (err) {
|
|
|
|
/* remember this */
|
|
|
|
ddata->m4_state.map = NULL;
|
|
|
|
/* no coprocessor state syscon (optional) */
|
|
|
|
dev_warn(dev, "m4 state not supported\n");
|
|
|
|
|
|
|
|
/* no need to go further */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* See if we can get the resource table */
|
|
|
|
err = stm32_rproc_get_syscon(np, "st,syscfg-rsc-tbl",
|
|
|
|
&ddata->rsctbl);
|
|
|
|
if (err) {
|
|
|
|
/* no rsc table syscon (optional) */
|
|
|
|
dev_warn(dev, "rsc tbl syscon not supported\n");
|
|
|
|
}
|
|
|
|
|
2020-07-15 04:04:38 +08:00
|
|
|
return 0;
|
2019-05-14 16:26:58 +08:00
|
|
|
}
|
|
|
|
|
2020-07-15 04:04:40 +08:00
|
|
|
static int stm32_rproc_get_m4_status(struct stm32_rproc *ddata,
|
|
|
|
unsigned int *state)
|
|
|
|
{
|
|
|
|
/* See stm32_rproc_parse_dt() */
|
|
|
|
if (!ddata->m4_state.map) {
|
|
|
|
/*
|
|
|
|
* We couldn't get the coprocessor's state, assume
|
|
|
|
* it is not running.
|
|
|
|
*/
|
2020-09-01 05:37:58 +08:00
|
|
|
*state = M4_STATE_OFF;
|
2020-07-15 04:04:40 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return regmap_read(ddata->m4_state.map, ddata->m4_state.reg, state);
|
|
|
|
}
|
|
|
|
|
2020-07-15 04:04:43 +08:00
|
|
|
static int stm32_rproc_da_to_pa(struct platform_device *pdev,
|
|
|
|
struct stm32_rproc *ddata,
|
|
|
|
u64 da, phys_addr_t *pa)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct stm32_rproc_mem *p_mem;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ddata->nb_rmems; i++) {
|
|
|
|
p_mem = &ddata->rmems[i];
|
|
|
|
|
|
|
|
if (da < p_mem->dev_addr ||
|
|
|
|
da >= p_mem->dev_addr + p_mem->size)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
*pa = da - p_mem->dev_addr + p_mem->bus_addr;
|
|
|
|
dev_dbg(dev, "da %llx to pa %#x\n", da, *pa);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_err(dev, "can't translate da %llx\n", da);
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32_rproc_get_loaded_rsc_table(struct platform_device *pdev,
|
|
|
|
struct rproc *rproc,
|
|
|
|
struct stm32_rproc *ddata)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
phys_addr_t rsc_pa;
|
|
|
|
u32 rsc_da;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = regmap_read(ddata->rsctbl.map, ddata->rsctbl.reg, &rsc_da);
|
|
|
|
if (err) {
|
|
|
|
dev_err(dev, "failed to read rsc tbl addr\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!rsc_da)
|
|
|
|
/* no rsc table */
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err = stm32_rproc_da_to_pa(pdev, ddata, rsc_da, &rsc_pa);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
ddata->rsc_va = devm_ioremap_wc(dev, rsc_pa, RSC_TBL_SIZE);
|
|
|
|
if (IS_ERR_OR_NULL(ddata->rsc_va)) {
|
|
|
|
dev_err(dev, "Unable to map memory region: %pa+%zx\n",
|
|
|
|
&rsc_pa, RSC_TBL_SIZE);
|
|
|
|
ddata->rsc_va = NULL;
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The resource table is already loaded in device memory, no need
|
|
|
|
* to work with a cached table.
|
|
|
|
*/
|
|
|
|
rproc->cached_table = NULL;
|
|
|
|
/* Assuming the resource table fits in 1kB is fair */
|
|
|
|
rproc->table_sz = RSC_TBL_SIZE;
|
|
|
|
rproc->table_ptr = (struct resource_table *)ddata->rsc_va;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-05-14 16:26:58 +08:00
|
|
|
static int stm32_rproc_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct stm32_rproc *ddata;
|
|
|
|
struct device_node *np = dev->of_node;
|
|
|
|
struct rproc *rproc;
|
2020-07-15 04:04:40 +08:00
|
|
|
unsigned int state;
|
2019-05-14 16:26:58 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
|
|
|
|
if (!rproc)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2020-07-15 04:04:37 +08:00
|
|
|
ddata = rproc->priv;
|
|
|
|
|
2020-04-10 18:24:33 +08:00
|
|
|
rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
|
2020-07-15 04:04:37 +08:00
|
|
|
|
|
|
|
ret = stm32_rproc_parse_dt(pdev, ddata, &rproc->auto_boot);
|
|
|
|
if (ret)
|
|
|
|
goto free_rproc;
|
|
|
|
|
2020-07-15 04:04:38 +08:00
|
|
|
ret = stm32_rproc_of_memory_translations(pdev, ddata);
|
|
|
|
if (ret)
|
|
|
|
goto free_rproc;
|
|
|
|
|
2020-07-15 04:04:40 +08:00
|
|
|
ret = stm32_rproc_get_m4_status(ddata, &state);
|
|
|
|
if (ret)
|
|
|
|
goto free_rproc;
|
|
|
|
|
2020-07-15 04:04:42 +08:00
|
|
|
if (state == M4_STATE_CRUN) {
|
2020-07-15 04:04:40 +08:00
|
|
|
rproc->state = RPROC_DETACHED;
|
|
|
|
|
2020-07-15 04:04:42 +08:00
|
|
|
ret = stm32_rproc_parse_memory_regions(rproc);
|
|
|
|
if (ret)
|
|
|
|
goto free_resources;
|
2020-07-15 04:04:43 +08:00
|
|
|
|
|
|
|
ret = stm32_rproc_get_loaded_rsc_table(pdev, rproc, ddata);
|
|
|
|
if (ret)
|
|
|
|
goto free_resources;
|
2020-07-15 04:04:42 +08:00
|
|
|
}
|
|
|
|
|
2019-05-14 16:26:58 +08:00
|
|
|
rproc->has_iommu = false;
|
2019-10-25 16:56:39 +08:00
|
|
|
ddata->workqueue = create_workqueue(dev_name(dev));
|
|
|
|
if (!ddata->workqueue) {
|
|
|
|
dev_err(dev, "cannot create workqueue\n");
|
|
|
|
ret = -ENOMEM;
|
2020-07-15 04:04:42 +08:00
|
|
|
goto free_resources;
|
2019-10-25 16:56:39 +08:00
|
|
|
}
|
2019-05-14 16:26:58 +08:00
|
|
|
|
|
|
|
platform_set_drvdata(pdev, rproc);
|
|
|
|
|
2019-11-15 18:03:08 +08:00
|
|
|
ret = stm32_rproc_request_mbox(rproc);
|
|
|
|
if (ret)
|
2020-07-15 04:04:37 +08:00
|
|
|
goto free_wkq;
|
2019-05-14 16:26:58 +08:00
|
|
|
|
|
|
|
ret = rproc_add(rproc);
|
|
|
|
if (ret)
|
|
|
|
goto free_mb;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
free_mb:
|
|
|
|
stm32_rproc_free_mbox(rproc);
|
2019-10-25 16:56:39 +08:00
|
|
|
free_wkq:
|
|
|
|
destroy_workqueue(ddata->workqueue);
|
2020-07-15 04:04:42 +08:00
|
|
|
free_resources:
|
|
|
|
rproc_resource_cleanup(rproc);
|
2019-05-14 16:26:58 +08:00
|
|
|
free_rproc:
|
2019-08-26 23:38:43 +08:00
|
|
|
if (device_may_wakeup(dev)) {
|
|
|
|
dev_pm_clear_wake_irq(dev);
|
|
|
|
device_init_wakeup(dev, false);
|
|
|
|
}
|
2019-05-14 16:26:58 +08:00
|
|
|
rproc_free(rproc);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32_rproc_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct rproc *rproc = platform_get_drvdata(pdev);
|
2019-10-25 16:56:39 +08:00
|
|
|
struct stm32_rproc *ddata = rproc->priv;
|
2019-08-26 23:38:43 +08:00
|
|
|
struct device *dev = &pdev->dev;
|
2019-05-14 16:26:58 +08:00
|
|
|
|
|
|
|
if (atomic_read(&rproc->power) > 0)
|
|
|
|
rproc_shutdown(rproc);
|
|
|
|
|
|
|
|
rproc_del(rproc);
|
|
|
|
stm32_rproc_free_mbox(rproc);
|
2019-10-25 16:56:39 +08:00
|
|
|
destroy_workqueue(ddata->workqueue);
|
2019-08-26 23:38:43 +08:00
|
|
|
|
|
|
|
if (device_may_wakeup(dev)) {
|
|
|
|
dev_pm_clear_wake_irq(dev);
|
|
|
|
device_init_wakeup(dev, false);
|
|
|
|
}
|
2019-05-14 16:26:58 +08:00
|
|
|
rproc_free(rproc);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-08-26 23:38:43 +08:00
|
|
|
static int __maybe_unused stm32_rproc_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct rproc *rproc = dev_get_drvdata(dev);
|
|
|
|
struct stm32_rproc *ddata = rproc->priv;
|
|
|
|
|
|
|
|
if (device_may_wakeup(dev))
|
|
|
|
return enable_irq_wake(ddata->wdg_irq);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __maybe_unused stm32_rproc_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct rproc *rproc = dev_get_drvdata(dev);
|
|
|
|
struct stm32_rproc *ddata = rproc->priv;
|
|
|
|
|
|
|
|
if (device_may_wakeup(dev))
|
|
|
|
return disable_irq_wake(ddata->wdg_irq);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static SIMPLE_DEV_PM_OPS(stm32_rproc_pm_ops,
|
|
|
|
stm32_rproc_suspend, stm32_rproc_resume);
|
|
|
|
|
2019-05-14 16:26:58 +08:00
|
|
|
static struct platform_driver stm32_rproc_driver = {
|
|
|
|
.probe = stm32_rproc_probe,
|
|
|
|
.remove = stm32_rproc_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "stm32-rproc",
|
2019-08-26 23:38:43 +08:00
|
|
|
.pm = &stm32_rproc_pm_ops,
|
2019-05-14 16:26:58 +08:00
|
|
|
.of_match_table = of_match_ptr(stm32_rproc_match),
|
|
|
|
},
|
|
|
|
};
|
|
|
|
module_platform_driver(stm32_rproc_driver);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("STM32 Remote Processor Control Driver");
|
|
|
|
MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");
|
|
|
|
MODULE_AUTHOR("Fabien Dessenne <fabien.dessenne@st.com>");
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
|