2020-03-24 17:41:52 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Kernel-based Virtual Machine driver for Linux
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*
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* AMD SVM support
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*
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* Copyright (C) 2006 Qumranet, Inc.
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* Copyright 2010 Red Hat, Inc. and/or its affiliates.
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*
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* Authors:
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* Yaniv Kamay <yaniv@qumranet.com>
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* Avi Kivity <avi@qumranet.com>
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*/
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#ifndef __SVM_SVM_H
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#define __SVM_SVM_H
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#include <linux/kvm_types.h>
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#include <linux/kvm_host.h>
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2020-12-11 01:09:47 +08:00
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#include <linux/bits.h>
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2020-03-24 17:41:52 +08:00
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#include <asm/svm.h>
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static const u32 host_save_user_msrs[] = {
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#ifdef CONFIG_X86_64
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MSR_STAR, MSR_LSTAR, MSR_CSTAR, MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE,
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MSR_FS_BASE,
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#endif
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MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
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MSR_TSC_AUX,
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};
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#define NR_HOST_SAVE_USER_MSRS ARRAY_SIZE(host_save_user_msrs)
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2020-09-25 22:34:19 +08:00
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#define MAX_DIRECT_ACCESS_MSRS 15
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2020-03-24 17:41:52 +08:00
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#define MSRPM_OFFSETS 16
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extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly;
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extern bool npt_enabled;
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enum {
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VMCB_INTERCEPTS, /* Intercept vectors, TSC offset,
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pause filter count */
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VMCB_PERM_MAP, /* IOPM Base and MSRPM Base */
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VMCB_ASID, /* ASID */
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VMCB_INTR, /* int_ctl, int_vector */
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VMCB_NPT, /* npt_en, nCR3, gPAT */
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VMCB_CR, /* CR0, CR3, CR4, EFER */
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VMCB_DR, /* DR6, DR7 */
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VMCB_DT, /* GDT, IDT */
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VMCB_SEG, /* CS, DS, SS, ES, CPL */
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VMCB_CR2, /* CR2 only */
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VMCB_LBR, /* DBGCTL, BR_FROM, BR_TO, LAST_EX_FROM, LAST_EX_TO */
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VMCB_AVIC, /* AVIC APIC_BAR, AVIC APIC_BACKING_PAGE,
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* AVIC PHYSICAL_TABLE pointer,
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* AVIC LOGICAL_TABLE pointer
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*/
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VMCB_DIRTY_MAX,
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};
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/* TPR and CR2 are always written before VMRUN */
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#define VMCB_ALWAYS_DIRTY_MASK ((1U << VMCB_INTR) | (1U << VMCB_CR2))
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struct kvm_sev_info {
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bool active; /* SEV enabled guest */
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2020-12-11 01:09:38 +08:00
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bool es_active; /* SEV-ES enabled guest */
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2020-03-24 17:41:52 +08:00
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unsigned int asid; /* ASID used for this guest */
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unsigned int handle; /* SEV firmware handle */
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int fd; /* SEV device fd */
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unsigned long pages_locked; /* Number of pages locked */
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struct list_head regions_list; /* List of registered regions */
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};
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struct kvm_svm {
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struct kvm kvm;
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/* Struct members for AVIC */
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u32 avic_vm_id;
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struct page *avic_logical_id_table_page;
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struct page *avic_physical_id_table_page;
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struct hlist_node hnode;
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struct kvm_sev_info sev_info;
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};
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struct kvm_vcpu;
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2020-06-25 16:03:22 +08:00
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struct svm_nested_state {
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2020-03-24 17:41:52 +08:00
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struct vmcb *hsave;
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u64 hsave_msr;
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u64 vm_cr_msr;
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2020-08-28 01:11:39 +08:00
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u64 vmcb12_gpa;
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2020-03-24 17:41:52 +08:00
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/* These are the merged vectors */
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u32 *msrpm;
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2020-04-24 01:22:27 +08:00
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/* A VMRUN has started but has not yet been performed, so
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* we cannot inject a nested vmexit yet. */
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bool nested_run_pending;
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2020-05-14 01:16:12 +08:00
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/* cache for control fields of the guest */
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struct vmcb_control_area ctl;
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2020-10-01 19:29:54 +08:00
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bool initialized;
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2020-03-24 17:41:52 +08:00
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};
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struct vcpu_svm {
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struct kvm_vcpu vcpu;
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struct vmcb *vmcb;
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unsigned long vmcb_pa;
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struct svm_cpu_data *svm_data;
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2020-10-12 02:48:17 +08:00
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u32 asid;
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2020-03-24 17:41:52 +08:00
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uint64_t asid_generation;
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uint64_t sysenter_esp;
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uint64_t sysenter_eip;
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uint64_t tsc_aux;
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u64 msr_decfg;
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u64 next_rip;
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u64 host_user_msrs[NR_HOST_SAVE_USER_MSRS];
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struct {
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u16 fs;
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u16 gs;
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u16 ldt;
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u64 gs_base;
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} host;
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u64 spec_ctrl;
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/*
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* Contains guest-controlled bits of VIRT_SPEC_CTRL, which will be
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* translated into the appropriate L2_CFG bits on the host to
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* perform speculative control.
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*/
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u64 virt_spec_ctrl;
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u32 *msrpm;
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ulong nmi_iret_rip;
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2020-06-25 16:03:22 +08:00
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struct svm_nested_state nested;
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2020-03-24 17:41:52 +08:00
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bool nmi_singlestep;
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u64 nmi_singlestep_guest_rflags;
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unsigned int3_injected;
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unsigned long int3_rip;
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/* cached guest cpuid flags for faster access */
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bool nrips_enabled : 1;
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u32 ldr_reg;
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u32 dfr_reg;
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struct page *avic_backing_page;
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u64 *avic_physical_id_cache;
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bool avic_is_running;
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/*
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* Per-vcpu list of struct amd_svm_iommu_ir:
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* This is used mainly to store interrupt remapping information used
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* when update the vcpu affinity. This avoids the need to scan for
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* IRTE and try to match ga_tag in the IOMMU driver.
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*/
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struct list_head ir_list;
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spinlock_t ir_list_lock;
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2020-09-25 22:34:19 +08:00
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/* Save desired MSR intercept (read: pass-through) state */
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struct {
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DECLARE_BITMAP(read, MAX_DIRECT_ACCESS_MSRS);
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DECLARE_BITMAP(write, MAX_DIRECT_ACCESS_MSRS);
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} shadow_msr_intercept;
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2020-12-11 01:09:40 +08:00
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/* SEV-ES support */
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struct vmcb_save_area *vmsa;
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struct ghcb *ghcb;
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2020-12-11 01:09:47 +08:00
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struct kvm_host_map ghcb_map;
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2020-03-24 17:41:52 +08:00
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};
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2020-03-24 17:41:54 +08:00
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struct svm_cpu_data {
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int cpu;
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u64 asid_generation;
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u32 max_asid;
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u32 next_asid;
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u32 min_asid;
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struct kvm_ldttss_desc *tss_desc;
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struct page *save_area;
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struct vmcb *current_vmcb;
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/* index = sev_asid, value = vmcb pointer */
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struct vmcb **sev_vmcbs;
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};
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DECLARE_PER_CPU(struct svm_cpu_data *, svm_data);
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2020-03-24 17:41:52 +08:00
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void recalc_intercepts(struct vcpu_svm *svm);
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2020-04-01 00:17:38 +08:00
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static inline struct kvm_svm *to_kvm_svm(struct kvm *kvm)
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{
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return container_of(kvm, struct kvm_svm, kvm);
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}
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2020-12-11 01:09:38 +08:00
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static inline bool sev_guest(struct kvm *kvm)
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{
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#ifdef CONFIG_KVM_AMD_SEV
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struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
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return sev->active;
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#else
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return false;
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#endif
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}
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static inline bool sev_es_guest(struct kvm *kvm)
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{
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#ifdef CONFIG_KVM_AMD_SEV
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struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info;
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return sev_guest(kvm) && sev->es_active;
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#else
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return false;
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#endif
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}
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2020-06-25 16:03:23 +08:00
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static inline void vmcb_mark_all_dirty(struct vmcb *vmcb)
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2020-03-24 17:41:52 +08:00
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{
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vmcb->control.clean = 0;
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}
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2020-06-25 16:03:23 +08:00
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static inline void vmcb_mark_all_clean(struct vmcb *vmcb)
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2020-03-24 17:41:52 +08:00
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{
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vmcb->control.clean = ((1 << VMCB_DIRTY_MAX) - 1)
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& ~VMCB_ALWAYS_DIRTY_MASK;
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}
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2020-06-25 16:03:23 +08:00
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static inline void vmcb_mark_dirty(struct vmcb *vmcb, int bit)
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2020-03-24 17:41:52 +08:00
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{
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vmcb->control.clean &= ~(1 << bit);
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}
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static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
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{
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return container_of(vcpu, struct vcpu_svm, vcpu);
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}
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static inline struct vmcb *get_host_vmcb(struct vcpu_svm *svm)
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{
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if (is_guest_mode(&svm->vcpu))
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return svm->nested.hsave;
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else
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return svm->vmcb;
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}
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2020-09-12 03:27:58 +08:00
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static inline void vmcb_set_intercept(struct vmcb_control_area *control, u32 bit)
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{
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WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
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__set_bit(bit, (unsigned long *)&control->intercepts);
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}
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static inline void vmcb_clr_intercept(struct vmcb_control_area *control, u32 bit)
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{
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WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
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__clear_bit(bit, (unsigned long *)&control->intercepts);
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}
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static inline bool vmcb_is_intercept(struct vmcb_control_area *control, u32 bit)
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{
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WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
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return test_bit(bit, (unsigned long *)&control->intercepts);
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}
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2020-03-24 17:41:52 +08:00
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static inline void set_dr_intercepts(struct vcpu_svm *svm)
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{
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struct vmcb *vmcb = get_host_vmcb(svm);
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2020-12-11 01:09:43 +08:00
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if (!sev_es_guest(svm->vcpu.kvm)) {
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_WRITE);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_WRITE);
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}
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2020-09-12 03:28:12 +08:00
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);
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2020-03-24 17:41:52 +08:00
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recalc_intercepts(svm);
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}
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static inline void clr_dr_intercepts(struct vcpu_svm *svm)
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{
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struct vmcb *vmcb = get_host_vmcb(svm);
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2020-09-12 03:28:12 +08:00
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vmcb->control.intercepts[INTERCEPT_DR] = 0;
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2020-03-24 17:41:52 +08:00
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2020-12-11 01:09:43 +08:00
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/* DR7 access must remain intercepted for an SEV-ES guest */
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if (sev_es_guest(svm->vcpu.kvm)) {
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE);
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}
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2020-03-24 17:41:52 +08:00
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recalc_intercepts(svm);
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}
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2020-09-12 03:28:20 +08:00
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static inline void set_exception_intercept(struct vcpu_svm *svm, u32 bit)
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2020-03-24 17:41:52 +08:00
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{
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struct vmcb *vmcb = get_host_vmcb(svm);
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2020-09-12 03:28:20 +08:00
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WARN_ON_ONCE(bit >= 32);
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vmcb_set_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit);
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2020-03-24 17:41:52 +08:00
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recalc_intercepts(svm);
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}
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2020-09-12 03:28:20 +08:00
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static inline void clr_exception_intercept(struct vcpu_svm *svm, u32 bit)
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2020-03-24 17:41:52 +08:00
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{
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struct vmcb *vmcb = get_host_vmcb(svm);
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2020-09-12 03:28:20 +08:00
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WARN_ON_ONCE(bit >= 32);
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vmcb_clr_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit);
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2020-03-24 17:41:52 +08:00
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|
|
recalc_intercepts(svm);
|
|
|
|
}
|
|
|
|
|
2020-06-25 16:03:24 +08:00
|
|
|
static inline void svm_set_intercept(struct vcpu_svm *svm, int bit)
|
2020-03-24 17:41:52 +08:00
|
|
|
{
|
|
|
|
struct vmcb *vmcb = get_host_vmcb(svm);
|
|
|
|
|
2020-09-12 03:28:28 +08:00
|
|
|
vmcb_set_intercept(&vmcb->control, bit);
|
2020-03-24 17:41:52 +08:00
|
|
|
|
|
|
|
recalc_intercepts(svm);
|
|
|
|
}
|
|
|
|
|
2020-06-25 16:03:24 +08:00
|
|
|
static inline void svm_clr_intercept(struct vcpu_svm *svm, int bit)
|
2020-03-24 17:41:52 +08:00
|
|
|
{
|
|
|
|
struct vmcb *vmcb = get_host_vmcb(svm);
|
|
|
|
|
2020-09-12 03:28:28 +08:00
|
|
|
vmcb_clr_intercept(&vmcb->control, bit);
|
2020-03-24 17:41:52 +08:00
|
|
|
|
|
|
|
recalc_intercepts(svm);
|
|
|
|
}
|
|
|
|
|
2020-06-25 16:03:24 +08:00
|
|
|
static inline bool svm_is_intercept(struct vcpu_svm *svm, int bit)
|
2020-03-24 17:41:52 +08:00
|
|
|
{
|
2020-09-12 03:28:28 +08:00
|
|
|
return vmcb_is_intercept(&svm->vmcb->control, bit);
|
2020-03-24 17:41:52 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool vgif_enabled(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
return !!(svm->vmcb->control.int_ctl & V_GIF_ENABLE_MASK);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void enable_gif(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
if (vgif_enabled(svm))
|
|
|
|
svm->vmcb->control.int_ctl |= V_GIF_MASK;
|
|
|
|
else
|
|
|
|
svm->vcpu.arch.hflags |= HF_GIF_MASK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void disable_gif(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
if (vgif_enabled(svm))
|
|
|
|
svm->vmcb->control.int_ctl &= ~V_GIF_MASK;
|
|
|
|
else
|
|
|
|
svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool gif_set(struct vcpu_svm *svm)
|
|
|
|
{
|
|
|
|
if (vgif_enabled(svm))
|
|
|
|
return !!(svm->vmcb->control.int_ctl & V_GIF_MASK);
|
|
|
|
else
|
|
|
|
return !!(svm->vcpu.arch.hflags & HF_GIF_MASK);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* svm.c */
|
2020-07-08 08:39:56 +08:00
|
|
|
#define MSR_CR3_LEGACY_RESERVED_MASK 0xfe7U
|
|
|
|
#define MSR_CR3_LEGACY_PAE_RESERVED_MASK 0x7U
|
2020-08-29 08:48:22 +08:00
|
|
|
#define MSR_CR3_LONG_MBZ_MASK 0xfff0000000000000U
|
2020-07-08 08:39:56 +08:00
|
|
|
#define MSR_INVALID 0xffffffffU
|
2020-03-24 17:41:52 +08:00
|
|
|
|
2020-12-11 01:09:38 +08:00
|
|
|
extern int sev;
|
|
|
|
extern int sev_es;
|
2020-12-11 01:09:47 +08:00
|
|
|
extern bool dump_invalid_vmcb;
|
2020-12-11 01:09:38 +08:00
|
|
|
|
2020-03-24 17:41:52 +08:00
|
|
|
u32 svm_msrpm_offset(u32 msr);
|
2020-10-01 19:29:54 +08:00
|
|
|
u32 *svm_vcpu_alloc_msrpm(void);
|
|
|
|
void svm_vcpu_init_msrpm(struct kvm_vcpu *vcpu, u32 *msrpm);
|
|
|
|
void svm_vcpu_free_msrpm(u32 *msrpm);
|
|
|
|
|
2020-10-01 19:29:53 +08:00
|
|
|
int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer);
|
2020-03-24 17:41:52 +08:00
|
|
|
void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
|
2020-10-07 09:44:15 +08:00
|
|
|
void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
|
2020-03-21 05:28:12 +08:00
|
|
|
void svm_flush_tlb(struct kvm_vcpu *vcpu);
|
2020-03-24 17:41:52 +08:00
|
|
|
void disable_nmi_singlestep(struct vcpu_svm *svm);
|
2020-04-24 02:19:26 +08:00
|
|
|
bool svm_smi_blocked(struct kvm_vcpu *vcpu);
|
|
|
|
bool svm_nmi_blocked(struct kvm_vcpu *vcpu);
|
|
|
|
bool svm_interrupt_blocked(struct kvm_vcpu *vcpu);
|
2020-05-23 00:18:27 +08:00
|
|
|
void svm_set_gif(struct vcpu_svm *svm, bool value);
|
2020-12-11 01:09:47 +08:00
|
|
|
int svm_invoke_exit_handler(struct vcpu_svm *svm, u64 exit_code);
|
2020-03-24 17:41:52 +08:00
|
|
|
|
|
|
|
/* nested.c */
|
|
|
|
|
|
|
|
#define NESTED_EXIT_HOST 0 /* Exit handled on host level */
|
|
|
|
#define NESTED_EXIT_DONE 1 /* Exit caused nested vmexit */
|
|
|
|
#define NESTED_EXIT_CONTINUE 2 /* Further checks needed */
|
|
|
|
|
2020-06-25 16:03:25 +08:00
|
|
|
static inline bool nested_svm_virtualize_tpr(struct kvm_vcpu *vcpu)
|
2020-03-24 17:41:52 +08:00
|
|
|
{
|
2020-05-14 01:28:23 +08:00
|
|
|
struct vcpu_svm *svm = to_svm(vcpu);
|
|
|
|
|
|
|
|
return is_guest_mode(vcpu) && (svm->nested.ctl.int_ctl & V_INTR_MASKING_MASK);
|
2020-03-24 17:41:52 +08:00
|
|
|
}
|
|
|
|
|
2020-04-23 20:17:28 +08:00
|
|
|
static inline bool nested_exit_on_smi(struct vcpu_svm *svm)
|
|
|
|
{
|
2020-09-12 03:28:28 +08:00
|
|
|
return vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_SMI);
|
2020-04-23 20:17:28 +08:00
|
|
|
}
|
|
|
|
|
2020-04-24 06:02:45 +08:00
|
|
|
static inline bool nested_exit_on_intr(struct vcpu_svm *svm)
|
|
|
|
{
|
2020-09-12 03:28:28 +08:00
|
|
|
return vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_INTR);
|
2020-04-24 06:02:45 +08:00
|
|
|
}
|
|
|
|
|
2020-04-23 20:06:43 +08:00
|
|
|
static inline bool nested_exit_on_nmi(struct vcpu_svm *svm)
|
|
|
|
{
|
2020-09-12 03:28:28 +08:00
|
|
|
return vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_NMI);
|
2020-04-23 20:06:43 +08:00
|
|
|
}
|
|
|
|
|
2020-07-10 22:11:52 +08:00
|
|
|
int enter_svm_guest_mode(struct vcpu_svm *svm, u64 vmcb_gpa,
|
|
|
|
struct vmcb *nested_vmcb);
|
2020-05-19 01:08:37 +08:00
|
|
|
void svm_leave_nested(struct vcpu_svm *svm);
|
2020-10-01 19:29:54 +08:00
|
|
|
void svm_free_nested(struct vcpu_svm *svm);
|
|
|
|
int svm_allocate_nested(struct vcpu_svm *svm);
|
2020-03-24 17:41:52 +08:00
|
|
|
int nested_svm_vmrun(struct vcpu_svm *svm);
|
|
|
|
void nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb);
|
|
|
|
int nested_svm_vmexit(struct vcpu_svm *svm);
|
|
|
|
int nested_svm_exit_handled(struct vcpu_svm *svm);
|
|
|
|
int nested_svm_check_permissions(struct vcpu_svm *svm);
|
|
|
|
int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
|
|
|
|
bool has_error_code, u32 error_code);
|
|
|
|
int nested_svm_exit_special(struct vcpu_svm *svm);
|
2020-05-22 15:50:14 +08:00
|
|
|
void sync_nested_vmcb_control(struct vcpu_svm *svm);
|
2020-03-24 17:41:52 +08:00
|
|
|
|
2020-04-17 22:24:18 +08:00
|
|
|
extern struct kvm_x86_nested_ops svm_nested_ops;
|
|
|
|
|
2020-04-01 00:17:38 +08:00
|
|
|
/* avic.c */
|
|
|
|
|
|
|
|
#define AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK (0xFF)
|
|
|
|
#define AVIC_LOGICAL_ID_ENTRY_VALID_BIT 31
|
|
|
|
#define AVIC_LOGICAL_ID_ENTRY_VALID_MASK (1 << 31)
|
|
|
|
|
|
|
|
#define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK (0xFFULL)
|
|
|
|
#define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK (0xFFFFFFFFFFULL << 12)
|
|
|
|
#define AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK (1ULL << 62)
|
|
|
|
#define AVIC_PHYSICAL_ID_ENTRY_VALID_MASK (1ULL << 63)
|
|
|
|
|
|
|
|
#define VMCB_AVIC_APIC_BAR_MASK 0xFFFFFFFFFF000ULL
|
|
|
|
|
|
|
|
extern int avic;
|
|
|
|
|
|
|
|
static inline void avic_update_vapic_bar(struct vcpu_svm *svm, u64 data)
|
|
|
|
{
|
|
|
|
svm->vmcb->control.avic_vapic_bar = data & VMCB_AVIC_APIC_BAR_MASK;
|
2020-06-25 16:03:23 +08:00
|
|
|
vmcb_mark_dirty(svm->vmcb, VMCB_AVIC);
|
2020-04-01 00:17:38 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool avic_vcpu_is_running(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
struct vcpu_svm *svm = to_svm(vcpu);
|
|
|
|
u64 *entry = svm->avic_physical_id_cache;
|
|
|
|
|
|
|
|
if (!entry)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
return (READ_ONCE(*entry) & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK);
|
|
|
|
}
|
|
|
|
|
|
|
|
int avic_ga_log_notifier(u32 ga_tag);
|
|
|
|
void avic_vm_destroy(struct kvm *kvm);
|
|
|
|
int avic_vm_init(struct kvm *kvm);
|
|
|
|
void avic_init_vmcb(struct vcpu_svm *svm);
|
|
|
|
void svm_toggle_avic_for_irq_window(struct kvm_vcpu *vcpu, bool activate);
|
|
|
|
int avic_incomplete_ipi_interception(struct vcpu_svm *svm);
|
|
|
|
int avic_unaccelerated_access_interception(struct vcpu_svm *svm);
|
|
|
|
int avic_init_vcpu(struct vcpu_svm *svm);
|
|
|
|
void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
|
|
|
|
void avic_vcpu_put(struct kvm_vcpu *vcpu);
|
|
|
|
void avic_post_state_restore(struct kvm_vcpu *vcpu);
|
|
|
|
void svm_set_virtual_apic_mode(struct kvm_vcpu *vcpu);
|
|
|
|
void svm_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu);
|
|
|
|
bool svm_check_apicv_inhibit_reasons(ulong bit);
|
|
|
|
void svm_pre_update_apicv_exec_ctrl(struct kvm *kvm, bool activate);
|
|
|
|
void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
|
|
|
|
void svm_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr);
|
|
|
|
void svm_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr);
|
|
|
|
int svm_deliver_avic_intr(struct kvm_vcpu *vcpu, int vec);
|
|
|
|
bool svm_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu);
|
|
|
|
int svm_update_pi_irte(struct kvm *kvm, unsigned int host_irq,
|
|
|
|
uint32_t guest_irq, bool set);
|
|
|
|
void svm_vcpu_blocking(struct kvm_vcpu *vcpu);
|
|
|
|
void svm_vcpu_unblocking(struct kvm_vcpu *vcpu);
|
|
|
|
|
2020-03-24 17:41:54 +08:00
|
|
|
/* sev.c */
|
|
|
|
|
2020-12-11 01:09:47 +08:00
|
|
|
#define GHCB_MSR_INFO_POS 0
|
|
|
|
#define GHCB_MSR_INFO_MASK (BIT_ULL(12) - 1)
|
|
|
|
|
2020-03-24 17:41:54 +08:00
|
|
|
extern unsigned int max_sev_asid;
|
|
|
|
|
|
|
|
static inline bool svm_sev_enabled(void)
|
|
|
|
{
|
|
|
|
return IS_ENABLED(CONFIG_KVM_AMD_SEV) ? max_sev_asid : 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void sev_vm_destroy(struct kvm *kvm);
|
|
|
|
int svm_mem_enc_op(struct kvm *kvm, void __user *argp);
|
|
|
|
int svm_register_enc_region(struct kvm *kvm,
|
|
|
|
struct kvm_enc_region *range);
|
|
|
|
int svm_unregister_enc_region(struct kvm *kvm,
|
|
|
|
struct kvm_enc_region *range);
|
|
|
|
void pre_sev_run(struct vcpu_svm *svm, int cpu);
|
2020-12-11 01:09:38 +08:00
|
|
|
void __init sev_hardware_setup(void);
|
2020-03-24 17:41:54 +08:00
|
|
|
void sev_hardware_teardown(void);
|
2020-12-11 01:09:40 +08:00
|
|
|
void sev_free_vcpu(struct kvm_vcpu *vcpu);
|
2020-12-11 01:09:47 +08:00
|
|
|
int sev_handle_vmgexit(struct vcpu_svm *svm);
|
2020-03-24 17:41:54 +08:00
|
|
|
|
2020-03-24 17:41:52 +08:00
|
|
|
#endif
|