2022-06-07 22:11:31 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2016-01-26 00:37:31 +08:00
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/*
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2023-07-14 04:20:46 +08:00
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* Copyright (C) 2015-2023 Texas Instruments Incorporated - https://www.ti.com/
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* Andrew Davis <afd@ti.com>
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2016-01-26 00:37:31 +08:00
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*/
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2018-07-16 20:43:39 +08:00
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#include <linux/bitmap.h>
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#include <linux/bitops.h>
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2016-01-26 00:37:31 +08:00
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/gpio/driver.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/spi/spi.h>
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#define DEFAULT_NGPIO 8
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/**
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* struct pisosr_gpio - GPIO driver data
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* @chip: GPIO controller chip
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* @spi: SPI device pointer
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* @buffer: Buffer for device reads
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* @buffer_size: Size of buffer
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* @load_gpio: GPIO pin used to load input into device
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* @lock: Protects read sequences
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*/
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struct pisosr_gpio {
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struct gpio_chip chip;
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struct spi_device *spi;
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u8 *buffer;
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size_t buffer_size;
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struct gpio_desc *load_gpio;
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struct mutex lock;
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};
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static int pisosr_gpio_refresh(struct pisosr_gpio *gpio)
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{
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int ret;
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mutex_lock(&gpio->lock);
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if (gpio->load_gpio) {
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2016-02-24 21:31:14 +08:00
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gpiod_set_value_cansleep(gpio->load_gpio, 1);
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2016-01-26 00:37:31 +08:00
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udelay(1); /* registers load time (~10ns) */
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2016-02-24 21:31:14 +08:00
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gpiod_set_value_cansleep(gpio->load_gpio, 0);
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2016-01-26 00:37:31 +08:00
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udelay(1); /* registers recovery time (~5ns) */
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}
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ret = spi_read(gpio->spi, gpio->buffer, gpio->buffer_size);
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mutex_unlock(&gpio->lock);
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2016-02-19 17:23:00 +08:00
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return ret;
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2016-01-26 00:37:31 +08:00
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}
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static int pisosr_gpio_get_direction(struct gpio_chip *chip,
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unsigned offset)
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{
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/* This device always input */
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2019-11-06 16:54:12 +08:00
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return GPIO_LINE_DIRECTION_IN;
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2016-01-26 00:37:31 +08:00
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}
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static int pisosr_gpio_direction_input(struct gpio_chip *chip,
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unsigned offset)
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{
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/* This device always input */
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return 0;
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}
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static int pisosr_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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/* This device is input only */
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return -EINVAL;
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}
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static int pisosr_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct pisosr_gpio *gpio = gpiochip_get_data(chip);
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/* Refresh may not always be needed */
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pisosr_gpio_refresh(gpio);
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return (gpio->buffer[offset / 8] >> (offset % 8)) & 0x1;
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}
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2018-07-16 20:43:39 +08:00
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static int pisosr_gpio_get_multiple(struct gpio_chip *chip,
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unsigned long *mask, unsigned long *bits)
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{
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struct pisosr_gpio *gpio = gpiochip_get_data(chip);
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2019-12-05 08:51:36 +08:00
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unsigned long offset;
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unsigned long gpio_mask;
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unsigned long buffer_state;
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2018-07-16 20:43:39 +08:00
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pisosr_gpio_refresh(gpio);
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bitmap_zero(bits, chip->ngpio);
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2019-12-05 08:51:36 +08:00
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for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
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buffer_state = gpio->buffer[offset / 8] & gpio_mask;
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bitmap_set_value8(bits, buffer_state, offset);
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2018-07-16 20:43:39 +08:00
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}
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return 0;
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}
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2016-09-11 20:14:37 +08:00
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static const struct gpio_chip template_chip = {
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2016-01-26 00:37:31 +08:00
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.label = "pisosr-gpio",
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.owner = THIS_MODULE,
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.get_direction = pisosr_gpio_get_direction,
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.direction_input = pisosr_gpio_direction_input,
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.direction_output = pisosr_gpio_direction_output,
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.get = pisosr_gpio_get,
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2018-07-16 20:43:39 +08:00
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.get_multiple = pisosr_gpio_get_multiple,
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2016-01-26 00:37:31 +08:00
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.base = -1,
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.ngpio = DEFAULT_NGPIO,
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.can_sleep = true,
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};
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2023-07-14 04:20:46 +08:00
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static void pisosr_mutex_destroy(void *lock)
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{
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mutex_destroy(lock);
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}
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2016-01-26 00:37:31 +08:00
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static int pisosr_gpio_probe(struct spi_device *spi)
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{
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struct device *dev = &spi->dev;
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struct pisosr_gpio *gpio;
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int ret;
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gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL);
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if (!gpio)
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return -ENOMEM;
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gpio->chip = template_chip;
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gpio->chip.parent = dev;
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of_property_read_u16(dev->of_node, "ngpios", &gpio->chip.ngpio);
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gpio->spi = spi;
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gpio->buffer_size = DIV_ROUND_UP(gpio->chip.ngpio, 8);
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gpio->buffer = devm_kzalloc(dev, gpio->buffer_size, GFP_KERNEL);
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if (!gpio->buffer)
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return -ENOMEM;
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2016-02-22 20:16:51 +08:00
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gpio->load_gpio = devm_gpiod_get_optional(dev, "load", GPIOD_OUT_LOW);
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2020-08-28 04:08:26 +08:00
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if (IS_ERR(gpio->load_gpio))
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return dev_err_probe(dev, PTR_ERR(gpio->load_gpio),
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"Unable to allocate load GPIO\n");
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2016-01-26 00:37:31 +08:00
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mutex_init(&gpio->lock);
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2023-07-14 04:20:46 +08:00
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ret = devm_add_action_or_reset(dev, pisosr_mutex_destroy, &gpio->lock);
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if (ret)
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return ret;
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2016-01-26 00:37:31 +08:00
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2023-07-14 04:20:46 +08:00
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ret = devm_gpiochip_add_data(dev, &gpio->chip, gpio);
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2016-01-26 00:37:31 +08:00
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if (ret < 0) {
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dev_err(dev, "Unable to register gpiochip\n");
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return ret;
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}
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return 0;
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}
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static const struct spi_device_id pisosr_gpio_id_table[] = {
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{ "pisosr-gpio", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(spi, pisosr_gpio_id_table);
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static const struct of_device_id pisosr_gpio_of_match_table[] = {
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{ .compatible = "pisosr-gpio", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, pisosr_gpio_of_match_table);
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static struct spi_driver pisosr_gpio_driver = {
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.driver = {
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.name = "pisosr-gpio",
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.of_match_table = pisosr_gpio_of_match_table,
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},
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.probe = pisosr_gpio_probe,
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.id_table = pisosr_gpio_id_table,
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};
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module_spi_driver(pisosr_gpio_driver);
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2023-07-14 04:20:46 +08:00
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MODULE_AUTHOR("Andrew Davis <afd@ti.com>");
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2016-01-26 00:37:31 +08:00
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MODULE_DESCRIPTION("SPI Compatible PISO Shift Register GPIO Driver");
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MODULE_LICENSE("GPL v2");
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