2020-03-10 03:42:40 +08:00
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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2020-03-10 03:42:43 +08:00
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title: Marvell MMP2 and MMP3 Clock Controller
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2020-03-10 03:42:40 +08:00
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maintainers:
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- Lubomir Rintel <lkundrak@v3.sk>
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description: |
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The clock subsystem on MMP2 or MMP3 generates and supplies clock to various
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controllers within the SoC.
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2020-03-10 03:42:40 +08:00
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>.
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properties:
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compatible:
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enum:
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- marvell,mmp2-clock # controller compatible with MMP2 SoC
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- marvell,mmp3-clock # controller compatible with MMP3 SoC
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reg:
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items:
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- description: MPMU register region
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- description: APMU register region
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- description: APBC register region
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reg-names:
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items:
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- const: mpmu
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- const: apmu
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- const: apbc
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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2020-05-20 06:41:47 +08:00
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'#power-domain-cells':
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const: 1
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2020-03-10 03:42:40 +08:00
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required:
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- compatible
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- reg
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- reg-names
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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examples:
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- |
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clock-controller@d4050000 {
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compatible = "marvell,mmp2-clock";
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reg = <0xd4050000 0x1000>,
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<0xd4282800 0x400>,
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<0xd4015000 0x1000>;
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reg-names = "mpmu", "apmu", "apbc";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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