2023-02-10 17:07:19 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2023 Intel Corporation. All rights reserved. */
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#include <linux/module.h>
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#include <linux/dax.h>
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#include "../cxl/cxl.h"
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#include "bus.h"
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static int cxl_dax_region_probe(struct device *dev)
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{
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struct cxl_dax_region *cxlr_dax = to_cxl_dax_region(dev);
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int nid = phys_to_target_node(cxlr_dax->hpa_range.start);
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struct cxl_region *cxlr = cxlr_dax->cxlr;
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struct dax_region *dax_region;
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struct dev_dax_data data;
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if (nid == NUMA_NO_NODE)
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nid = memory_add_physaddr_to_nid(cxlr_dax->hpa_range.start);
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dax_region = alloc_dax_region(dev, cxlr->id, &cxlr_dax->hpa_range, nid,
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PMD_SIZE, IORESOURCE_DAX_KMEM);
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if (!dax_region)
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return -ENOMEM;
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data = (struct dev_dax_data) {
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.dax_region = dax_region,
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.id = -1,
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.size = range_len(&cxlr_dax->hpa_range),
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2023-11-07 15:22:43 +08:00
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.memmap_on_memory = true,
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2023-02-10 17:07:19 +08:00
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};
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2023-06-03 14:14:11 +08:00
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return PTR_ERR_OR_ZERO(devm_create_dev_dax(&data));
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2023-02-10 17:07:19 +08:00
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}
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static struct cxl_driver cxl_dax_region_driver = {
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.name = "cxl_dax_region",
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.probe = cxl_dax_region_probe,
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.id = CXL_DEVICE_DAX_REGION,
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.drv = {
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.suppress_bind_attrs = true,
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},
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};
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module_cxl_driver(cxl_dax_region_driver);
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MODULE_ALIAS_CXL(CXL_DEVICE_DAX_REGION);
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2024-06-06 01:49:24 +08:00
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MODULE_DESCRIPTION("CXL DAX: direct access to CXL regions");
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2023-02-10 17:07:19 +08:00
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Intel Corporation");
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MODULE_IMPORT_NS(CXL);
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