2018-07-20 23:26:33 +08:00
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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// Copyright (c) 2018 BayLibre, SAS.
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// Author: Jerome Brunet <jbrunet@baylibre.com>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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2023-07-15 01:49:37 +08:00
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#include <linux/of.h>
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#include <linux/platform_device.h>
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2018-07-20 23:26:33 +08:00
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#include <linux/reset-controller.h>
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#include <linux/spinlock.h>
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#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
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struct meson_audio_arb_data {
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struct reset_controller_dev rstc;
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void __iomem *regs;
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struct clk *clk;
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const unsigned int *reset_bits;
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spinlock_t lock;
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};
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2019-09-05 21:50:40 +08:00
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struct meson_audio_arb_match_data {
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const unsigned int *reset_bits;
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unsigned int reset_num;
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};
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2018-07-20 23:26:33 +08:00
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#define ARB_GENERAL_BIT 31
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static const unsigned int axg_audio_arb_reset_bits[] = {
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[AXG_ARB_TODDR_A] = 0,
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[AXG_ARB_TODDR_B] = 1,
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[AXG_ARB_TODDR_C] = 2,
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[AXG_ARB_FRDDR_A] = 4,
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[AXG_ARB_FRDDR_B] = 5,
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[AXG_ARB_FRDDR_C] = 6,
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};
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2019-09-05 21:50:40 +08:00
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static const struct meson_audio_arb_match_data axg_audio_arb_match = {
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.reset_bits = axg_audio_arb_reset_bits,
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.reset_num = ARRAY_SIZE(axg_audio_arb_reset_bits),
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};
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static const unsigned int sm1_audio_arb_reset_bits[] = {
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[AXG_ARB_TODDR_A] = 0,
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[AXG_ARB_TODDR_B] = 1,
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[AXG_ARB_TODDR_C] = 2,
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[AXG_ARB_FRDDR_A] = 4,
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[AXG_ARB_FRDDR_B] = 5,
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[AXG_ARB_FRDDR_C] = 6,
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[AXG_ARB_TODDR_D] = 3,
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[AXG_ARB_FRDDR_D] = 7,
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};
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static const struct meson_audio_arb_match_data sm1_audio_arb_match = {
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.reset_bits = sm1_audio_arb_reset_bits,
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.reset_num = ARRAY_SIZE(sm1_audio_arb_reset_bits),
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};
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2018-07-20 23:26:33 +08:00
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static int meson_audio_arb_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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u32 val;
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struct meson_audio_arb_data *arb =
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container_of(rcdev, struct meson_audio_arb_data, rstc);
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spin_lock(&arb->lock);
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val = readl(arb->regs);
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if (assert)
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val &= ~BIT(arb->reset_bits[id]);
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else
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val |= BIT(arb->reset_bits[id]);
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writel(val, arb->regs);
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spin_unlock(&arb->lock);
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return 0;
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}
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static int meson_audio_arb_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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u32 val;
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struct meson_audio_arb_data *arb =
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container_of(rcdev, struct meson_audio_arb_data, rstc);
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val = readl(arb->regs);
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return !(val & BIT(arb->reset_bits[id]));
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}
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static int meson_audio_arb_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return meson_audio_arb_update(rcdev, id, true);
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}
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static int meson_audio_arb_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return meson_audio_arb_update(rcdev, id, false);
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}
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static const struct reset_control_ops meson_audio_arb_rstc_ops = {
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.assert = meson_audio_arb_assert,
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.deassert = meson_audio_arb_deassert,
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.status = meson_audio_arb_status,
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};
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static const struct of_device_id meson_audio_arb_of_match[] = {
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2019-09-05 21:50:40 +08:00
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{
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.compatible = "amlogic,meson-axg-audio-arb",
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.data = &axg_audio_arb_match,
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}, {
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.compatible = "amlogic,meson-sm1-audio-arb",
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.data = &sm1_audio_arb_match,
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},
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2018-07-20 23:26:33 +08:00
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{}
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};
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MODULE_DEVICE_TABLE(of, meson_audio_arb_of_match);
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static int meson_audio_arb_remove(struct platform_device *pdev)
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{
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struct meson_audio_arb_data *arb = platform_get_drvdata(pdev);
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/* Disable all access */
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spin_lock(&arb->lock);
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writel(0, arb->regs);
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spin_unlock(&arb->lock);
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clk_disable_unprepare(arb->clk);
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return 0;
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}
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static int meson_audio_arb_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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2019-09-05 21:50:40 +08:00
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const struct meson_audio_arb_match_data *data;
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2018-07-20 23:26:33 +08:00
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struct meson_audio_arb_data *arb;
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struct resource *res;
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int ret;
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2019-09-05 21:50:40 +08:00
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data = of_device_get_match_data(dev);
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if (!data)
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return -EINVAL;
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2018-07-20 23:26:33 +08:00
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arb = devm_kzalloc(dev, sizeof(*arb), GFP_KERNEL);
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if (!arb)
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return -ENOMEM;
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platform_set_drvdata(pdev, arb);
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arb->clk = devm_clk_get(dev, NULL);
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2023-03-23 16:53:44 +08:00
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if (IS_ERR(arb->clk))
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return dev_err_probe(dev, PTR_ERR(arb->clk), "failed to get clock\n");
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2018-07-20 23:26:33 +08:00
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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arb->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(arb->regs))
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return PTR_ERR(arb->regs);
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spin_lock_init(&arb->lock);
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2019-09-05 21:50:40 +08:00
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arb->reset_bits = data->reset_bits;
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arb->rstc.nr_resets = data->reset_num;
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2018-07-20 23:26:33 +08:00
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arb->rstc.ops = &meson_audio_arb_rstc_ops;
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arb->rstc.of_node = dev->of_node;
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2019-03-18 22:03:52 +08:00
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arb->rstc.owner = THIS_MODULE;
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2018-07-20 23:26:33 +08:00
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/*
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* Enable general :
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* In the initial state, all memory interfaces are disabled
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* and the general bit is on
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*/
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ret = clk_prepare_enable(arb->clk);
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if (ret) {
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dev_err(dev, "failed to enable arb clock\n");
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return ret;
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}
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writel(BIT(ARB_GENERAL_BIT), arb->regs);
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/* Register reset controller */
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ret = devm_reset_controller_register(dev, &arb->rstc);
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if (ret) {
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dev_err(dev, "failed to register arb reset controller\n");
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meson_audio_arb_remove(pdev);
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}
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return ret;
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}
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static struct platform_driver meson_audio_arb_pdrv = {
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.probe = meson_audio_arb_probe,
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.remove = meson_audio_arb_remove,
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.driver = {
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.name = "meson-audio-arb-reset",
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.of_match_table = meson_audio_arb_of_match,
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},
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};
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module_platform_driver(meson_audio_arb_pdrv);
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MODULE_DESCRIPTION("Amlogic A113 Audio Memory Arbiter");
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MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
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MODULE_LICENSE("GPL v2");
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