2005-04-17 06:20:36 +08:00
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/**
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* \file radeon_drv.c
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* ATI Radeon driver
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*
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* \author Gareth Hughes <gareth@valinux.com>
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*/
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/*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "radeon_drm.h"
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#include "radeon_drv.h"
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#include "drm_pciids.h"
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2009-06-05 20:42:42 +08:00
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#include <linux/console.h>
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/*
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* KMS wrapper.
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2010-03-01 14:32:15 +08:00
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* - 2.0.0 - initial interface
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* - 2.1.0 - add square tiling interface
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2010-03-27 03:24:14 +08:00
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* - 2.2.0 - add r6xx/r7xx const buffer support
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2010-02-22 04:24:15 +08:00
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* - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
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2010-05-13 00:01:13 +08:00
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* - 2.4.0 - add crtc id query
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2010-06-04 07:00:03 +08:00
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* - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
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2009-06-05 20:42:42 +08:00
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*/
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#define KMS_DRIVER_MAJOR 2
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2010-06-04 07:00:03 +08:00
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#define KMS_DRIVER_MINOR 5
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2009-06-05 20:42:42 +08:00
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#define KMS_DRIVER_PATCHLEVEL 0
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int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
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int radeon_driver_unload_kms(struct drm_device *dev);
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int radeon_driver_firstopen_kms(struct drm_device *dev);
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void radeon_driver_lastclose_kms(struct drm_device *dev);
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int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
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void radeon_driver_postclose_kms(struct drm_device *dev,
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struct drm_file *file_priv);
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void radeon_driver_preclose_kms(struct drm_device *dev,
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struct drm_file *file_priv);
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int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
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int radeon_resume_kms(struct drm_device *dev);
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u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
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int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
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void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
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void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
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int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
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void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
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irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
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int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int radeon_gem_object_init(struct drm_gem_object *obj);
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void radeon_gem_object_free(struct drm_gem_object *obj);
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extern struct drm_ioctl_desc radeon_ioctls_kms[];
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extern int radeon_max_kms_ioctl;
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int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
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#if defined(CONFIG_DEBUG_FS)
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int radeon_debugfs_init(struct drm_minor *minor);
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void radeon_debugfs_cleanup(struct drm_minor *minor);
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#endif
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2005-04-17 06:20:36 +08:00
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2005-09-30 15:09:07 +08:00
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int radeon_no_wb;
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2009-06-05 20:42:42 +08:00
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int radeon_modeset = -1;
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int radeon_dynclks = -1;
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int radeon_r4xx_atom = 0;
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int radeon_agpmode = 0;
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int radeon_vram_limit = 0;
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int radeon_gart_size = 512; /* default gart size */
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int radeon_benchmarking = 0;
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2009-07-21 17:23:57 +08:00
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int radeon_testing = 0;
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2009-06-05 20:42:42 +08:00
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int radeon_connector_table = 0;
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2009-08-13 14:32:14 +08:00
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int radeon_tv = 1;
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2010-02-23 16:24:38 +08:00
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int radeon_new_pll = -1;
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2009-10-12 05:49:13 +08:00
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int radeon_audio = 1;
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2010-03-31 12:33:27 +08:00
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int radeon_disp_priority = 0;
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2010-03-17 14:07:37 +08:00
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int radeon_hw_i2c = 0;
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2005-09-30 15:09:07 +08:00
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2008-07-31 15:07:23 +08:00
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MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
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2005-09-30 15:09:07 +08:00
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module_param_named(no_wb, radeon_no_wb, int, 0444);
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2009-06-05 20:42:42 +08:00
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MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
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module_param_named(modeset, radeon_modeset, int, 0400);
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MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
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module_param_named(dynclks, radeon_dynclks, int, 0444);
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MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
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module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
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MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
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module_param_named(vramlimit, radeon_vram_limit, int, 0600);
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MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
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module_param_named(agpmode, radeon_agpmode, int, 0444);
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MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
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module_param_named(gartsize, radeon_gart_size, int, 0600);
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MODULE_PARM_DESC(benchmark, "Run benchmark");
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module_param_named(benchmark, radeon_benchmarking, int, 0444);
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2009-07-21 17:23:57 +08:00
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MODULE_PARM_DESC(test, "Run tests");
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module_param_named(test, radeon_testing, int, 0444);
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2009-06-05 20:42:42 +08:00
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MODULE_PARM_DESC(connector_table, "Force connector table");
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module_param_named(connector_table, radeon_connector_table, int, 0444);
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2009-08-13 14:32:14 +08:00
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MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
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module_param_named(tv, radeon_tv, int, 0444);
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2009-06-05 20:42:42 +08:00
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2010-02-23 16:24:38 +08:00
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MODULE_PARM_DESC(new_pll, "Select new PLL code");
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2009-12-10 06:44:25 +08:00
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module_param_named(new_pll, radeon_new_pll, int, 0444);
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2009-10-12 05:49:13 +08:00
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MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
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module_param_named(audio, radeon_audio, int, 0444);
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2010-03-31 12:33:27 +08:00
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MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
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module_param_named(disp_priority, radeon_disp_priority, int, 0444);
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2010-03-17 14:07:37 +08:00
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MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
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module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
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2008-10-01 03:14:26 +08:00
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static int radeon_suspend(struct drm_device *dev, pm_message_t state)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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2009-03-10 16:36:38 +08:00
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return 0;
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2008-10-01 03:14:26 +08:00
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/* Disable *all* interrupts */
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2009-03-07 00:47:54 +08:00
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
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2008-10-01 03:14:26 +08:00
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RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
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RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
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return 0;
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}
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static int radeon_resume(struct drm_device *dev)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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2009-03-10 16:36:38 +08:00
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return 0;
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2008-10-01 03:14:26 +08:00
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/* Restore interrupt registers */
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2009-03-07 00:47:54 +08:00
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
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2008-10-01 03:14:26 +08:00
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RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
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RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
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return 0;
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}
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2005-04-17 06:20:36 +08:00
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static struct pci_device_id pciidlist[] = {
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radeon_PCI_IDS
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};
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2009-06-05 20:42:42 +08:00
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#if defined(CONFIG_DRM_RADEON_KMS)
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MODULE_DEVICE_TABLE(pci, pciidlist);
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#endif
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static struct drm_driver driver_old = {
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2005-09-25 12:28:13 +08:00
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.driver_features =
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DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
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2008-10-01 03:14:26 +08:00
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DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
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2005-04-17 06:20:36 +08:00
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.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
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2005-11-10 19:16:34 +08:00
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.load = radeon_driver_load,
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.firstopen = radeon_driver_firstopen,
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.open = radeon_driver_open,
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.preclose = radeon_driver_preclose,
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.postclose = radeon_driver_postclose,
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.lastclose = radeon_driver_lastclose,
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.unload = radeon_driver_unload,
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2008-10-01 03:14:26 +08:00
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.suspend = radeon_suspend,
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.resume = radeon_resume,
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.get_vblank_counter = radeon_get_vblank_counter,
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.enable_vblank = radeon_enable_vblank,
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.disable_vblank = radeon_disable_vblank,
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2008-12-19 07:22:02 +08:00
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.master_create = radeon_master_create,
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.master_destroy = radeon_master_destroy,
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2005-04-17 06:20:36 +08:00
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.irq_preinstall = radeon_driver_irq_preinstall,
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.irq_postinstall = radeon_driver_irq_postinstall,
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.irq_uninstall = radeon_driver_irq_uninstall,
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.irq_handler = radeon_driver_irq_handler,
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.reclaim_buffers = drm_core_reclaim_buffers,
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.get_map_ofs = drm_core_get_map_ofs,
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.get_reg_ofs = drm_core_get_reg_ofs,
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.ioctls = radeon_ioctls,
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.dma_ioctl = radeon_cp_buffers,
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.fops = {
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2005-09-25 12:28:13 +08:00
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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2009-12-17 06:17:09 +08:00
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.unlocked_ioctl = drm_ioctl,
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2005-09-25 12:28:13 +08:00
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.mmap = drm_mmap,
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.poll = drm_poll,
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.fasync = drm_fasync,
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2010-05-07 00:52:14 +08:00
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.read = drm_read,
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drm: 32/64-bit DRM ioctl compatibility patch
The patch is against a 2.6.11 kernel tree. I am running this with a
32-bit X server (compiled up from X.org CVS as of a couple of weeks
ago) and 32-bit DRI libraries and clients. All the userland stuff is
identical to what I am using under a 32-bit kernel on my G4 powerbook
(which is a 32-bit machine of course). I haven't tried compiling up a
64-bit X server or clients yet.
In the compatibility routines I have assumed that the kernel can
safely access user addresses after set_fs(KERNEL_DS). That is, where
an ioctl argument structure contains pointers to other structures, and
those other structures are already compatible between the 32-bit and
64-bit ABIs (i.e. they only contain things like chars, shorts or
ints), I just check the address with access_ok() and then pass it
through to the 64-bit ioctl code. I believe this approach may not
work on sparc64, but it does work on ppc64 and x86_64 at least.
One tricky area which may need to be revisited is the question of how
to handle the handles which we pass back to userspace to identify
mappings. These handles are generated in the ADDMAP ioctl and then
passed in as the offset value to mmap. However, offset values for
mmap seem to be generated in other ways as well, particularly for AGP
mappings.
The approach I have ended up with is to generate a fake 32-bit handle
only for _DRM_SHM mappings. The handles for other mappings (AGP, REG,
FB) are physical addresses which are already limited to 32 bits, and
generating fake handles for them created all sorts of problems in the
mmap/nopage code.
This patch has been updated to use the new compatibility ioctls.
From: Paul Mackerras <paulus@samba.org>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2005-06-23 19:29:18 +08:00
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#ifdef CONFIG_COMPAT
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2005-09-25 12:28:13 +08:00
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.compat_ioctl = radeon_compat_ioctl,
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drm: 32/64-bit DRM ioctl compatibility patch
The patch is against a 2.6.11 kernel tree. I am running this with a
32-bit X server (compiled up from X.org CVS as of a couple of weeks
ago) and 32-bit DRI libraries and clients. All the userland stuff is
identical to what I am using under a 32-bit kernel on my G4 powerbook
(which is a 32-bit machine of course). I haven't tried compiling up a
64-bit X server or clients yet.
In the compatibility routines I have assumed that the kernel can
safely access user addresses after set_fs(KERNEL_DS). That is, where
an ioctl argument structure contains pointers to other structures, and
those other structures are already compatible between the 32-bit and
64-bit ABIs (i.e. they only contain things like chars, shorts or
ints), I just check the address with access_ok() and then pass it
through to the 64-bit ioctl code. I believe this approach may not
work on sparc64, but it does work on ppc64 and x86_64 at least.
One tricky area which may need to be revisited is the question of how
to handle the handles which we pass back to userspace to identify
mappings. These handles are generated in the ADDMAP ioctl and then
passed in as the offset value to mmap. However, offset values for
mmap seem to be generated in other ways as well, particularly for AGP
mappings.
The approach I have ended up with is to generate a fake 32-bit handle
only for _DRM_SHM mappings. The handles for other mappings (AGP, REG,
FB) are physical addresses which are already limited to 32 bits, and
generating fake handles for them created all sorts of problems in the
mmap/nopage code.
This patch has been updated to use the new compatibility ioctls.
From: Paul Mackerras <paulus@samba.org>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2005-06-23 19:29:18 +08:00
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#endif
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2005-11-10 19:16:34 +08:00
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},
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2005-04-17 06:20:36 +08:00
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.pci_driver = {
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2005-11-10 19:16:34 +08:00
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.name = DRIVER_NAME,
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.id_table = pciidlist,
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},
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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2005-04-17 06:20:36 +08:00
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};
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2009-06-05 20:42:42 +08:00
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|
|
static struct drm_driver kms_driver;
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static int __devinit
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radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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return drm_get_dev(pdev, ent, &kms_driver);
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}
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static void
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radeon_pci_remove(struct pci_dev *pdev)
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{
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|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
|
|
|
|
|
|
drm_put_dev(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
|
|
return radeon_suspend_kms(dev, state);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
radeon_pci_resume(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
|
|
return radeon_resume_kms(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct drm_driver kms_driver = {
|
|
|
|
.driver_features =
|
|
|
|
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
|
|
|
|
DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
|
|
|
|
.dev_priv_size = 0,
|
|
|
|
.load = radeon_driver_load_kms,
|
|
|
|
.firstopen = radeon_driver_firstopen_kms,
|
|
|
|
.open = radeon_driver_open_kms,
|
|
|
|
.preclose = radeon_driver_preclose_kms,
|
|
|
|
.postclose = radeon_driver_postclose_kms,
|
|
|
|
.lastclose = radeon_driver_lastclose_kms,
|
|
|
|
.unload = radeon_driver_unload_kms,
|
|
|
|
.suspend = radeon_suspend_kms,
|
|
|
|
.resume = radeon_resume_kms,
|
|
|
|
.get_vblank_counter = radeon_get_vblank_counter_kms,
|
|
|
|
.enable_vblank = radeon_enable_vblank_kms,
|
|
|
|
.disable_vblank = radeon_disable_vblank_kms,
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
|
|
.debugfs_init = radeon_debugfs_init,
|
|
|
|
.debugfs_cleanup = radeon_debugfs_cleanup,
|
|
|
|
#endif
|
|
|
|
.irq_preinstall = radeon_driver_irq_preinstall_kms,
|
|
|
|
.irq_postinstall = radeon_driver_irq_postinstall_kms,
|
|
|
|
.irq_uninstall = radeon_driver_irq_uninstall_kms,
|
|
|
|
.irq_handler = radeon_driver_irq_handler_kms,
|
|
|
|
.reclaim_buffers = drm_core_reclaim_buffers,
|
|
|
|
.get_map_ofs = drm_core_get_map_ofs,
|
|
|
|
.get_reg_ofs = drm_core_get_reg_ofs,
|
|
|
|
.ioctls = radeon_ioctls_kms,
|
|
|
|
.gem_init_object = radeon_gem_object_init,
|
|
|
|
.gem_free_object = radeon_gem_object_free,
|
|
|
|
.dma_ioctl = radeon_dma_ioctl_kms,
|
|
|
|
.fops = {
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.open = drm_open,
|
|
|
|
.release = drm_release,
|
2009-12-17 06:17:09 +08:00
|
|
|
.unlocked_ioctl = drm_ioctl,
|
2009-06-05 20:42:42 +08:00
|
|
|
.mmap = radeon_mmap,
|
|
|
|
.poll = drm_poll,
|
|
|
|
.fasync = drm_fasync,
|
2010-05-07 00:52:14 +08:00
|
|
|
.read = drm_read,
|
2009-06-05 20:42:42 +08:00
|
|
|
#ifdef CONFIG_COMPAT
|
2009-09-15 07:03:43 +08:00
|
|
|
.compat_ioctl = radeon_kms_compat_ioctl,
|
2009-06-05 20:42:42 +08:00
|
|
|
#endif
|
|
|
|
},
|
|
|
|
|
|
|
|
.pci_driver = {
|
|
|
|
.name = DRIVER_NAME,
|
|
|
|
.id_table = pciidlist,
|
|
|
|
.probe = radeon_pci_probe,
|
|
|
|
.remove = radeon_pci_remove,
|
|
|
|
.suspend = radeon_pci_suspend,
|
|
|
|
.resume = radeon_pci_resume,
|
|
|
|
},
|
|
|
|
|
|
|
|
.name = DRIVER_NAME,
|
|
|
|
.desc = DRIVER_DESC,
|
|
|
|
.date = DRIVER_DATE,
|
|
|
|
.major = KMS_DRIVER_MAJOR,
|
|
|
|
.minor = KMS_DRIVER_MINOR,
|
|
|
|
.patchlevel = KMS_DRIVER_PATCHLEVEL,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct drm_driver *driver;
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
static int __init radeon_init(void)
|
|
|
|
{
|
2009-06-05 20:42:42 +08:00
|
|
|
driver = &driver_old;
|
|
|
|
driver->num_ioctls = radeon_max_ioctl;
|
2009-08-03 10:05:34 +08:00
|
|
|
#ifdef CONFIG_VGA_CONSOLE
|
|
|
|
if (vgacon_text_force() && radeon_modeset == -1) {
|
|
|
|
DRM_INFO("VGACON disable radeon kernel modesetting.\n");
|
|
|
|
driver = &driver_old;
|
|
|
|
driver->driver_features &= ~DRIVER_MODESET;
|
|
|
|
radeon_modeset = 0;
|
|
|
|
}
|
|
|
|
#endif
|
2009-06-05 20:42:42 +08:00
|
|
|
/* if enabled by default */
|
|
|
|
if (radeon_modeset == -1) {
|
2009-09-08 09:09:50 +08:00
|
|
|
#ifdef CONFIG_DRM_RADEON_KMS
|
|
|
|
DRM_INFO("radeon defaulting to kernel modesetting.\n");
|
2009-06-05 20:42:42 +08:00
|
|
|
radeon_modeset = 1;
|
2009-09-08 09:09:50 +08:00
|
|
|
#else
|
|
|
|
DRM_INFO("radeon defaulting to userspace modesetting.\n");
|
|
|
|
radeon_modeset = 0;
|
|
|
|
#endif
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
if (radeon_modeset == 1) {
|
|
|
|
DRM_INFO("radeon kernel modesetting enabled.\n");
|
|
|
|
driver = &kms_driver;
|
|
|
|
driver->driver_features |= DRIVER_MODESET;
|
|
|
|
driver->num_ioctls = radeon_max_kms_ioctl;
|
2010-02-01 13:38:10 +08:00
|
|
|
radeon_register_atpx_handler();
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
/* if the vga console setting is enabled still
|
|
|
|
* let modprobe override it */
|
|
|
|
return drm_init(driver);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit radeon_exit(void)
|
|
|
|
{
|
2009-06-05 20:42:42 +08:00
|
|
|
drm_exit(driver);
|
2010-02-01 13:38:10 +08:00
|
|
|
radeon_unregister_atpx_handler();
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2009-06-23 00:16:13 +08:00
|
|
|
module_init(radeon_init);
|
2005-04-17 06:20:36 +08:00
|
|
|
module_exit(radeon_exit);
|
|
|
|
|
2005-09-25 12:28:13 +08:00
|
|
|
MODULE_AUTHOR(DRIVER_AUTHOR);
|
|
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|
2005-04-17 06:20:36 +08:00
|
|
|
MODULE_LICENSE("GPL and additional rights");
|