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92 lines
2.3 KiB
C
92 lines
2.3 KiB
C
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/*
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* Copyright (C) 2017 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kvm_host.h>
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#include <asm/alternative.h>
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#include <asm/debug-monitors.h>
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#include <asm/insn.h>
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#include <asm/kvm_mmu.h>
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#define HYP_PAGE_OFFSET_HIGH_MASK ((UL(1) << VA_BITS) - 1)
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#define HYP_PAGE_OFFSET_LOW_MASK ((UL(1) << (VA_BITS - 1)) - 1)
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static u64 va_mask;
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static void compute_layout(void)
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{
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phys_addr_t idmap_addr = __pa_symbol(__hyp_idmap_text_start);
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unsigned long mask = HYP_PAGE_OFFSET_HIGH_MASK;
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/*
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* Activate the lower HYP offset only if the idmap doesn't
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* clash with it,
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*/
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if (idmap_addr > HYP_PAGE_OFFSET_LOW_MASK)
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mask = HYP_PAGE_OFFSET_LOW_MASK;
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va_mask = mask;
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}
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static u32 compute_instruction(int n, u32 rd, u32 rn)
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{
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u32 insn = AARCH64_BREAK_FAULT;
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switch (n) {
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case 0:
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insn = aarch64_insn_gen_logical_immediate(AARCH64_INSN_LOGIC_AND,
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AARCH64_INSN_VARIANT_64BIT,
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rn, rd, va_mask);
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break;
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}
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return insn;
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}
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void __init kvm_update_va_mask(struct alt_instr *alt,
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__le32 *origptr, __le32 *updptr, int nr_inst)
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{
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int i;
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/* We only expect a single instruction in the alternative sequence */
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BUG_ON(nr_inst != 1);
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if (!has_vhe() && !va_mask)
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compute_layout();
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for (i = 0; i < nr_inst; i++) {
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u32 rd, rn, insn, oinsn;
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/*
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* VHE doesn't need any address translation, let's NOP
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* everything.
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*/
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if (has_vhe()) {
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updptr[i] = cpu_to_le32(aarch64_insn_gen_nop());
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continue;
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}
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oinsn = le32_to_cpu(origptr[i]);
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rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, oinsn);
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rn = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RN, oinsn);
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insn = compute_instruction(i, rd, rn);
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BUG_ON(insn == AARCH64_BREAK_FAULT);
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updptr[i] = cpu_to_le32(insn);
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}
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}
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