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28 lines
673 B
Plaintext
28 lines
673 B
Plaintext
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* ARM architected timer
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ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which
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provides per-cpu timers.
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The timer is attached to a GIC to deliver its per-processor interrupts.
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** Timer node properties:
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- compatible : Should at least contain "arm,armv7-timer".
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- interrupts : Interrupt list for secure, non-secure, virtual and
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hypervisor timers, in that order.
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- clock-frequency : The frequency of the main counter, in Hz. Optional.
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Example:
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timer {
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compatible = "arm,cortex-a15-timer",
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"arm,armv7-timer";
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interrupts = <1 13 0xf08>,
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<1 14 0xf08>,
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<1 11 0xf08>,
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<1 10 0xf08>;
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clock-frequency = <100000000>;
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};
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