2019-03-01 07:24:22 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2019, Intel Corporation. */
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#include "ice_dcb_lib.h"
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2019-11-06 18:05:29 +08:00
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#include "ice_dcb_nl.h"
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2019-03-01 07:24:22 +08:00
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2019-09-09 21:47:46 +08:00
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/**
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* ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
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* @vsi: the VSI being configured
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* @ena_tc: TC map to be enabled
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*/
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void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
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{
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struct net_device *netdev = vsi->netdev;
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struct ice_pf *pf = vsi->back;
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struct ice_dcbx_cfg *dcbcfg;
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u8 netdev_tc;
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int i;
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if (!netdev)
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return;
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if (!ena_tc) {
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netdev_reset_tc(netdev);
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return;
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}
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if (netdev_set_num_tc(netdev, vsi->tc_cfg.numtc))
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return;
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dcbcfg = &pf->hw.port_info->local_dcbx_cfg;
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ice_for_each_traffic_class(i)
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if (vsi->tc_cfg.ena_tc & BIT(i))
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netdev_set_tc_queue(netdev,
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vsi->tc_cfg.tc_info[i].netdev_tc,
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vsi->tc_cfg.tc_info[i].qcount_tx,
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vsi->tc_cfg.tc_info[i].qoffset);
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for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
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u8 ets_tc = dcbcfg->etscfg.prio_table[i];
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/* Get the mapped netdev TC# for the UP */
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netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
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netdev_set_prio_tc_map(netdev, i, netdev_tc);
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}
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}
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2019-03-01 07:24:24 +08:00
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/**
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* ice_dcb_get_ena_tc - return bitmap of enabled TCs
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* @dcbcfg: DCB config to evaluate for enabled TCs
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*/
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u8 ice_dcb_get_ena_tc(struct ice_dcbx_cfg *dcbcfg)
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{
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u8 i, num_tc, ena_tc = 1;
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num_tc = ice_dcb_get_num_tc(dcbcfg);
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for (i = 0; i < num_tc; i++)
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ena_tc |= BIT(i);
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return ena_tc;
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}
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2020-02-14 05:31:20 +08:00
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/**
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* ice_dcb_get_mode - gets the DCB mode
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* @port_info: pointer to port info structure
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* @host: if set it's HOST if not it's MANAGED
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*/
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static u8 ice_dcb_get_mode(struct ice_port_info *port_info, bool host)
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{
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u8 mode;
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if (host)
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mode = DCB_CAP_DCBX_HOST;
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else
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mode = DCB_CAP_DCBX_LLD_MANAGED;
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if (port_info->local_dcbx_cfg.dcbx_mode & ICE_DCBX_MODE_CEE)
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2020-02-22 06:15:27 +08:00
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return mode | DCB_CAP_DCBX_VER_CEE;
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2020-02-14 05:31:20 +08:00
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else
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2020-02-22 06:15:27 +08:00
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return mode | DCB_CAP_DCBX_VER_IEEE;
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2020-02-14 05:31:20 +08:00
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}
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2019-03-01 07:24:24 +08:00
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/**
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* ice_dcb_get_num_tc - Get the number of TCs from DCBX config
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* @dcbcfg: config to retrieve number of TCs from
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*/
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u8 ice_dcb_get_num_tc(struct ice_dcbx_cfg *dcbcfg)
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{
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bool tc_unused = false;
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u8 num_tc = 0;
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u8 ret = 0;
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int i;
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/* Scan the ETS Config Priority Table to find traffic classes
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* enabled and create a bitmask of enabled TCs
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*/
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for (i = 0; i < CEE_DCBX_MAX_PRIO; i++)
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num_tc |= BIT(dcbcfg->etscfg.prio_table[i]);
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/* Scan bitmask for contiguous TCs starting with TC0 */
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for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
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if (num_tc & BIT(i)) {
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if (!tc_unused) {
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ret++;
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} else {
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pr_err("Non-contiguous TCs - Disabling DCB\n");
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return 1;
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}
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} else {
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tc_unused = true;
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}
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}
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/* There is always at least 1 TC */
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if (!ret)
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ret = 1;
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return ret;
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}
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2019-11-06 18:05:28 +08:00
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/**
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* ice_dcb_get_tc - Get the TC associated with the queue
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* @vsi: ptr to the VSI
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* @queue_index: queue number associated with VSI
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*/
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u8 ice_dcb_get_tc(struct ice_vsi *vsi, int queue_index)
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{
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return vsi->tx_rings[queue_index]->dcb_tc;
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}
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2019-03-01 07:24:27 +08:00
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/**
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* ice_vsi_cfg_dcb_rings - Update rings to reflect DCB TC
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* @vsi: VSI owner of rings being updated
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*/
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void ice_vsi_cfg_dcb_rings(struct ice_vsi *vsi)
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{
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struct ice_ring *tx_ring, *rx_ring;
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u16 qoffset, qcount;
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int i, n;
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if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
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/* Reset the TC information */
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for (i = 0; i < vsi->num_txq; i++) {
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tx_ring = vsi->tx_rings[i];
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tx_ring->dcb_tc = 0;
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}
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for (i = 0; i < vsi->num_rxq; i++) {
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rx_ring = vsi->rx_rings[i];
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rx_ring->dcb_tc = 0;
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}
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return;
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}
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ice_for_each_traffic_class(n) {
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if (!(vsi->tc_cfg.ena_tc & BIT(n)))
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break;
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qoffset = vsi->tc_cfg.tc_info[n].qoffset;
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qcount = vsi->tc_cfg.tc_info[n].qcount_tx;
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for (i = qoffset; i < (qoffset + qcount); i++) {
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tx_ring = vsi->tx_rings[i];
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rx_ring = vsi->rx_rings[i];
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tx_ring->dcb_tc = n;
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rx_ring->dcb_tc = n;
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}
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}
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}
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2020-02-14 05:30:59 +08:00
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/**
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* ice_dcb_bwchk - check if ETS bandwidth input parameters are correct
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* @pf: pointer to the PF struct
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* @dcbcfg: pointer to DCB config structure
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*/
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int ice_dcb_bwchk(struct ice_pf *pf, struct ice_dcbx_cfg *dcbcfg)
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{
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struct ice_dcb_ets_cfg *etscfg = &dcbcfg->etscfg;
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u8 num_tc, total_bw = 0;
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int i;
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/* returns number of contigous TCs and 1 TC for non-contigous TCs,
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* since at least 1 TC has to be configured
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*/
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num_tc = ice_dcb_get_num_tc(dcbcfg);
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/* no bandwidth checks required if there's only one TC, so assign
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* all bandwidth to TC0 and return
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*/
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if (num_tc == 1) {
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etscfg->tcbwtable[0] = ICE_TC_MAX_BW;
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return 0;
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}
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for (i = 0; i < num_tc; i++)
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total_bw += etscfg->tcbwtable[i];
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if (!total_bw) {
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etscfg->tcbwtable[0] = ICE_TC_MAX_BW;
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} else if (total_bw != ICE_TC_MAX_BW) {
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dev_err(ice_pf_to_dev(pf), "Invalid config, total bandwidth must equal 100\n");
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return -EINVAL;
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}
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return 0;
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}
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2019-03-01 07:24:24 +08:00
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/**
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* ice_pf_dcb_cfg - Apply new DCB configuration
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* @pf: pointer to the PF struct
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* @new_cfg: DCBX config to apply
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2019-04-17 01:24:29 +08:00
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* @locked: is the RTNL held
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2019-03-01 07:24:24 +08:00
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*/
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2019-04-17 01:24:29 +08:00
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int ice_pf_dcb_cfg(struct ice_pf *pf, struct ice_dcbx_cfg *new_cfg, bool locked)
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2019-03-01 07:24:24 +08:00
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{
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struct ice_aqc_port_ets_elem buf = { 0 };
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2019-11-06 18:05:29 +08:00
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struct ice_dcbx_cfg *old_cfg, *curr_cfg;
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2019-11-08 22:23:26 +08:00
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struct device *dev = ice_pf_to_dev(pf);
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2019-11-06 18:05:29 +08:00
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int ret = ICE_DCB_NO_HW_CHG;
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2019-11-06 18:05:27 +08:00
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struct ice_vsi *pf_vsi;
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2019-03-01 07:24:24 +08:00
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curr_cfg = &pf->hw.port_info->local_dcbx_cfg;
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2019-11-06 18:05:29 +08:00
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/* FW does not care if change happened */
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if (!pf->hw.port_info->is_sw_lldp)
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ret = ICE_DCB_HW_CHG_RST;
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2019-03-01 07:24:24 +08:00
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/* Enable DCB tagging only when more than one TC */
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if (ice_dcb_get_num_tc(new_cfg) > 1) {
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2019-11-08 22:23:26 +08:00
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dev_dbg(dev, "DCB tagging enabled (num TC > 1)\n");
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2019-03-01 07:24:24 +08:00
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set_bit(ICE_FLAG_DCB_ENA, pf->flags);
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} else {
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2019-11-08 22:23:26 +08:00
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dev_dbg(dev, "DCB tagging disabled (num TC = 1)\n");
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2019-03-01 07:24:24 +08:00
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clear_bit(ICE_FLAG_DCB_ENA, pf->flags);
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}
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if (!memcmp(new_cfg, curr_cfg, sizeof(*new_cfg))) {
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2019-11-08 22:23:26 +08:00
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dev_dbg(dev, "No change in DCB config required\n");
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2019-03-01 07:24:24 +08:00
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return ret;
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}
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2020-02-14 05:30:59 +08:00
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if (ice_dcb_bwchk(pf, new_cfg))
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return -EINVAL;
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2019-03-01 07:24:24 +08:00
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/* Store old config in case FW config fails */
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2019-11-06 18:05:27 +08:00
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old_cfg = kmemdup(curr_cfg, sizeof(*old_cfg), GFP_KERNEL);
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if (!old_cfg)
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return -ENOMEM;
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2019-11-08 22:23:26 +08:00
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dev_info(dev, "Commit DCB Configuration to the hardware\n");
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2019-11-06 18:05:27 +08:00
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pf_vsi = ice_get_main_vsi(pf);
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if (!pf_vsi) {
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2019-11-08 22:23:26 +08:00
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dev_dbg(dev, "PF VSI doesn't exist\n");
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2019-11-06 18:05:27 +08:00
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ret = -EINVAL;
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goto free_cfg;
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}
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2019-03-01 07:24:24 +08:00
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/* avoid race conditions by holding the lock while disabling and
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* re-enabling the VSI
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*/
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2019-04-17 01:24:29 +08:00
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if (!locked)
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rtnl_lock();
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2019-11-06 18:05:27 +08:00
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ice_dis_vsi(pf_vsi, true);
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2019-03-01 07:24:24 +08:00
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memcpy(curr_cfg, new_cfg, sizeof(*curr_cfg));
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memcpy(&curr_cfg->etsrec, &curr_cfg->etscfg, sizeof(curr_cfg->etsrec));
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2019-11-06 18:05:29 +08:00
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memcpy(&new_cfg->etsrec, &curr_cfg->etscfg, sizeof(curr_cfg->etsrec));
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2019-03-01 07:24:24 +08:00
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/* Only send new config to HW if we are in SW LLDP mode. Otherwise,
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* the new config came from the HW in the first place.
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*/
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if (pf->hw.port_info->is_sw_lldp) {
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ret = ice_set_dcb_cfg(pf->hw.port_info);
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if (ret) {
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2019-11-08 22:23:26 +08:00
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dev_err(dev, "Set DCB Config failed\n");
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2019-03-01 07:24:24 +08:00
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/* Restore previous settings to local config */
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memcpy(curr_cfg, old_cfg, sizeof(*curr_cfg));
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goto out;
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}
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}
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ret = ice_query_port_ets(pf->hw.port_info, &buf, sizeof(buf), NULL);
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if (ret) {
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2019-11-08 22:23:26 +08:00
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dev_err(dev, "Query Port ETS failed\n");
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2019-03-01 07:24:24 +08:00
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goto out;
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}
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ice_pf_dcb_recfg(pf);
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out:
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2019-11-06 18:05:27 +08:00
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ice_ena_vsi(pf_vsi, true);
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2019-04-17 01:24:29 +08:00
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if (!locked)
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rtnl_unlock();
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2019-11-06 18:05:27 +08:00
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free_cfg:
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kfree(old_cfg);
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2019-03-01 07:24:24 +08:00
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return ret;
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}
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2019-07-25 16:55:33 +08:00
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/**
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* ice_cfg_etsrec_defaults - Set default ETS recommended DCB config
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* @pi: port information structure
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*/
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static void ice_cfg_etsrec_defaults(struct ice_port_info *pi)
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{
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struct ice_dcbx_cfg *dcbcfg = &pi->local_dcbx_cfg;
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u8 i;
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/* Ensure ETS recommended DCB configuration is not already set */
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if (dcbcfg->etsrec.maxtcs)
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return;
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/* In CEE mode, set the default to 1 TC */
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dcbcfg->etsrec.maxtcs = 1;
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for (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {
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dcbcfg->etsrec.tcbwtable[i] = i ? 0 : 100;
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dcbcfg->etsrec.tsatable[i] = i ? ICE_IEEE_TSA_STRICT :
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ICE_IEEE_TSA_ETS;
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}
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}
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/**
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* ice_dcb_need_recfg - Check if DCB needs reconfig
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* @pf: board private structure
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* @old_cfg: current DCB config
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* @new_cfg: new DCB config
|
|
|
|
*/
|
|
|
|
static bool
|
|
|
|
ice_dcb_need_recfg(struct ice_pf *pf, struct ice_dcbx_cfg *old_cfg,
|
|
|
|
struct ice_dcbx_cfg *new_cfg)
|
|
|
|
{
|
2019-11-08 22:23:26 +08:00
|
|
|
struct device *dev = ice_pf_to_dev(pf);
|
2019-07-25 16:55:33 +08:00
|
|
|
bool need_reconfig = false;
|
|
|
|
|
|
|
|
/* Check if ETS configuration has changed */
|
|
|
|
if (memcmp(&new_cfg->etscfg, &old_cfg->etscfg,
|
|
|
|
sizeof(new_cfg->etscfg))) {
|
|
|
|
/* If Priority Table has changed reconfig is needed */
|
|
|
|
if (memcmp(&new_cfg->etscfg.prio_table,
|
|
|
|
&old_cfg->etscfg.prio_table,
|
|
|
|
sizeof(new_cfg->etscfg.prio_table))) {
|
|
|
|
need_reconfig = true;
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "ETS UP2TC changed.\n");
|
2019-07-25 16:55:33 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (memcmp(&new_cfg->etscfg.tcbwtable,
|
|
|
|
&old_cfg->etscfg.tcbwtable,
|
|
|
|
sizeof(new_cfg->etscfg.tcbwtable)))
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "ETS TC BW Table changed.\n");
|
2019-07-25 16:55:33 +08:00
|
|
|
|
|
|
|
if (memcmp(&new_cfg->etscfg.tsatable,
|
|
|
|
&old_cfg->etscfg.tsatable,
|
|
|
|
sizeof(new_cfg->etscfg.tsatable)))
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "ETS TSA Table changed.\n");
|
2019-07-25 16:55:33 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Check if PFC configuration has changed */
|
|
|
|
if (memcmp(&new_cfg->pfc, &old_cfg->pfc, sizeof(new_cfg->pfc))) {
|
|
|
|
need_reconfig = true;
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "PFC config change detected.\n");
|
2019-07-25 16:55:33 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Check if APP Table has changed */
|
|
|
|
if (memcmp(&new_cfg->app, &old_cfg->app, sizeof(new_cfg->app))) {
|
|
|
|
need_reconfig = true;
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "APP Table change detected.\n");
|
2019-07-25 16:55:33 +08:00
|
|
|
}
|
|
|
|
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "dcb need_reconfig=%d\n", need_reconfig);
|
2019-07-25 16:55:33 +08:00
|
|
|
return need_reconfig;
|
|
|
|
}
|
|
|
|
|
2019-03-01 07:24:30 +08:00
|
|
|
/**
|
|
|
|
* ice_dcb_rebuild - rebuild DCB post reset
|
|
|
|
* @pf: physical function instance
|
|
|
|
*/
|
|
|
|
void ice_dcb_rebuild(struct ice_pf *pf)
|
|
|
|
{
|
|
|
|
struct ice_aqc_port_ets_elem buf = { 0 };
|
2019-11-08 22:23:26 +08:00
|
|
|
struct device *dev = ice_pf_to_dev(pf);
|
2020-02-06 17:19:59 +08:00
|
|
|
struct ice_dcbx_cfg *err_cfg;
|
2019-03-01 07:24:30 +08:00
|
|
|
enum ice_status ret;
|
|
|
|
|
|
|
|
ret = ice_query_port_ets(pf->hw.port_info, &buf, sizeof(buf), NULL);
|
|
|
|
if (ret) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Query Port ETS failed\n");
|
2019-03-01 07:24:30 +08:00
|
|
|
goto dcb_error;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If DCB was not enabled previously, we are done */
|
|
|
|
if (!test_bit(ICE_FLAG_DCB_ENA, pf->flags))
|
|
|
|
return;
|
|
|
|
|
2020-02-06 17:19:59 +08:00
|
|
|
mutex_lock(&pf->tc_mutex);
|
2019-07-25 16:55:33 +08:00
|
|
|
|
2020-02-06 17:19:59 +08:00
|
|
|
if (!pf->hw.port_info->is_sw_lldp)
|
|
|
|
ice_cfg_etsrec_defaults(pf->hw.port_info);
|
2019-07-25 16:55:33 +08:00
|
|
|
|
2019-03-01 07:24:30 +08:00
|
|
|
ret = ice_set_dcb_cfg(pf->hw.port_info);
|
|
|
|
if (ret) {
|
2020-02-06 17:19:59 +08:00
|
|
|
dev_err(dev, "Failed to set DCB config in rebuild\n");
|
2019-03-01 07:24:30 +08:00
|
|
|
goto dcb_error;
|
|
|
|
}
|
|
|
|
|
2020-02-06 17:19:59 +08:00
|
|
|
if (!pf->hw.port_info->is_sw_lldp) {
|
|
|
|
ret = ice_cfg_lldp_mib_change(&pf->hw, true);
|
|
|
|
if (ret && !pf->hw.port_info->is_sw_lldp) {
|
|
|
|
dev_err(dev, "Failed to register for MIB changes\n");
|
|
|
|
goto dcb_error;
|
|
|
|
}
|
2019-03-01 07:24:30 +08:00
|
|
|
}
|
|
|
|
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_info(dev, "DCB restored after reset\n");
|
2019-03-01 07:24:30 +08:00
|
|
|
ret = ice_query_port_ets(pf->hw.port_info, &buf, sizeof(buf), NULL);
|
|
|
|
if (ret) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Query Port ETS failed\n");
|
2019-03-01 07:24:30 +08:00
|
|
|
goto dcb_error;
|
|
|
|
}
|
|
|
|
|
2020-02-06 17:19:59 +08:00
|
|
|
mutex_unlock(&pf->tc_mutex);
|
|
|
|
|
2019-03-01 07:24:30 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
dcb_error:
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Disabling DCB until new settings occur\n");
|
2020-02-06 17:19:59 +08:00
|
|
|
err_cfg = kzalloc(sizeof(*err_cfg), GFP_KERNEL);
|
|
|
|
if (!err_cfg) {
|
|
|
|
mutex_unlock(&pf->tc_mutex);
|
2019-11-08 22:23:25 +08:00
|
|
|
return;
|
2020-02-06 17:19:59 +08:00
|
|
|
}
|
2019-11-08 22:23:25 +08:00
|
|
|
|
2020-02-06 17:19:59 +08:00
|
|
|
err_cfg->etscfg.willing = true;
|
|
|
|
err_cfg->etscfg.tcbwtable[0] = ICE_TC_MAX_BW;
|
|
|
|
err_cfg->etscfg.tsatable[0] = ICE_IEEE_TSA_ETS;
|
|
|
|
memcpy(&err_cfg->etsrec, &err_cfg->etscfg, sizeof(err_cfg->etsrec));
|
2019-12-12 19:13:04 +08:00
|
|
|
/* Coverity warns the return code of ice_pf_dcb_cfg() is not checked
|
|
|
|
* here as is done for other calls to that function. That check is
|
|
|
|
* not necessary since this is in this function's error cleanup path.
|
|
|
|
* Suppress the Coverity warning with the following comment...
|
|
|
|
*/
|
|
|
|
/* coverity[check_return] */
|
2020-02-06 17:19:59 +08:00
|
|
|
ice_pf_dcb_cfg(pf, err_cfg, false);
|
|
|
|
kfree(err_cfg);
|
|
|
|
|
|
|
|
mutex_unlock(&pf->tc_mutex);
|
2019-03-01 07:24:30 +08:00
|
|
|
}
|
|
|
|
|
2019-03-01 07:24:24 +08:00
|
|
|
/**
|
|
|
|
* ice_dcb_init_cfg - set the initial DCB config in SW
|
2019-04-17 01:35:03 +08:00
|
|
|
* @pf: PF to apply config to
|
2019-04-17 01:24:29 +08:00
|
|
|
* @locked: Is the RTNL held
|
2019-03-01 07:24:24 +08:00
|
|
|
*/
|
2019-04-17 01:24:29 +08:00
|
|
|
static int ice_dcb_init_cfg(struct ice_pf *pf, bool locked)
|
2019-03-01 07:24:24 +08:00
|
|
|
{
|
|
|
|
struct ice_dcbx_cfg *newcfg;
|
|
|
|
struct ice_port_info *pi;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
pi = pf->hw.port_info;
|
2019-11-08 22:23:25 +08:00
|
|
|
newcfg = kmemdup(&pi->local_dcbx_cfg, sizeof(*newcfg), GFP_KERNEL);
|
2019-03-01 07:24:24 +08:00
|
|
|
if (!newcfg)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
memset(&pi->local_dcbx_cfg, 0, sizeof(*newcfg));
|
|
|
|
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_info(ice_pf_to_dev(pf), "Configuring initial DCB values\n");
|
2019-04-17 01:24:29 +08:00
|
|
|
if (ice_pf_dcb_cfg(pf, newcfg, locked))
|
2019-03-01 07:24:24 +08:00
|
|
|
ret = -EINVAL;
|
|
|
|
|
2019-11-08 22:23:25 +08:00
|
|
|
kfree(newcfg);
|
2019-03-01 07:24:24 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2019-03-01 07:24:25 +08:00
|
|
|
/**
|
2020-02-06 17:20:13 +08:00
|
|
|
* ice_dcb_sw_dflt_cfg - Apply a default DCB config
|
2019-04-17 01:35:03 +08:00
|
|
|
* @pf: PF to apply config to
|
2020-02-06 17:20:13 +08:00
|
|
|
* @ets_willing: configure ETS willing
|
2019-04-17 01:24:29 +08:00
|
|
|
* @locked: was this function called with RTNL held
|
2019-03-01 07:24:25 +08:00
|
|
|
*/
|
2019-10-09 22:09:43 +08:00
|
|
|
static int ice_dcb_sw_dflt_cfg(struct ice_pf *pf, bool ets_willing, bool locked)
|
2019-03-01 07:24:25 +08:00
|
|
|
{
|
|
|
|
struct ice_aqc_port_ets_elem buf = { 0 };
|
|
|
|
struct ice_dcbx_cfg *dcbcfg;
|
|
|
|
struct ice_port_info *pi;
|
|
|
|
struct ice_hw *hw;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
hw = &pf->hw;
|
|
|
|
pi = hw->port_info;
|
2019-11-08 22:23:25 +08:00
|
|
|
dcbcfg = kzalloc(sizeof(*dcbcfg), GFP_KERNEL);
|
|
|
|
if (!dcbcfg)
|
|
|
|
return -ENOMEM;
|
2019-03-01 07:24:25 +08:00
|
|
|
|
|
|
|
memset(&pi->local_dcbx_cfg, 0, sizeof(*dcbcfg));
|
|
|
|
|
2019-10-09 22:09:43 +08:00
|
|
|
dcbcfg->etscfg.willing = ets_willing ? 1 : 0;
|
2019-08-08 22:39:24 +08:00
|
|
|
dcbcfg->etscfg.maxtcs = hw->func_caps.common_cap.maxtc;
|
2019-03-01 07:24:25 +08:00
|
|
|
dcbcfg->etscfg.tcbwtable[0] = 100;
|
|
|
|
dcbcfg->etscfg.tsatable[0] = ICE_IEEE_TSA_ETS;
|
|
|
|
|
|
|
|
memcpy(&dcbcfg->etsrec, &dcbcfg->etscfg,
|
|
|
|
sizeof(dcbcfg->etsrec));
|
|
|
|
dcbcfg->etsrec.willing = 0;
|
|
|
|
|
|
|
|
dcbcfg->pfc.willing = 1;
|
2019-08-08 22:39:24 +08:00
|
|
|
dcbcfg->pfc.pfccap = hw->func_caps.common_cap.maxtc;
|
2019-03-01 07:24:25 +08:00
|
|
|
|
|
|
|
dcbcfg->numapps = 1;
|
|
|
|
dcbcfg->app[0].selector = ICE_APP_SEL_ETHTYPE;
|
|
|
|
dcbcfg->app[0].priority = 3;
|
|
|
|
dcbcfg->app[0].prot_id = ICE_APP_PROT_ID_FCOE;
|
|
|
|
|
2019-04-17 01:24:29 +08:00
|
|
|
ret = ice_pf_dcb_cfg(pf, dcbcfg, locked);
|
2019-11-08 22:23:25 +08:00
|
|
|
kfree(dcbcfg);
|
2019-03-01 07:24:25 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
return ice_query_port_ets(pi, &buf, sizeof(buf), NULL);
|
|
|
|
}
|
|
|
|
|
2019-10-09 22:09:43 +08:00
|
|
|
/**
|
|
|
|
* ice_dcb_tc_contig - Check that TCs are contiguous
|
|
|
|
* @prio_table: pointer to priority table
|
|
|
|
*
|
|
|
|
* Check if TCs begin with TC0 and are contiguous
|
|
|
|
*/
|
|
|
|
static bool ice_dcb_tc_contig(u8 *prio_table)
|
|
|
|
{
|
|
|
|
u8 max_tc = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < CEE_DCBX_MAX_PRIO; i++) {
|
|
|
|
u8 cur_tc = prio_table[i];
|
|
|
|
|
|
|
|
if (cur_tc > max_tc)
|
|
|
|
return false;
|
|
|
|
else if (cur_tc == max_tc)
|
|
|
|
max_tc++;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_dcb_noncontig_cfg - Configure DCB for non-contiguous TCs
|
|
|
|
* @pf: pointer to the PF struct
|
|
|
|
*
|
|
|
|
* If non-contiguous TCs, then configure SW DCB with TC0 and ETS non-willing
|
|
|
|
*/
|
|
|
|
static int ice_dcb_noncontig_cfg(struct ice_pf *pf)
|
|
|
|
{
|
|
|
|
struct ice_dcbx_cfg *dcbcfg = &pf->hw.port_info->local_dcbx_cfg;
|
2019-11-08 22:23:26 +08:00
|
|
|
struct device *dev = ice_pf_to_dev(pf);
|
2019-10-09 22:09:43 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Configure SW DCB default with ETS non-willing */
|
|
|
|
ret = ice_dcb_sw_dflt_cfg(pf, false, true);
|
|
|
|
if (ret) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Failed to set local DCB config %d\n", ret);
|
2019-10-09 22:09:43 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Reconfigure with ETS willing so that FW will send LLDP MIB event */
|
|
|
|
dcbcfg->etscfg.willing = 1;
|
|
|
|
ret = ice_set_dcb_cfg(pf->hw.port_info);
|
|
|
|
if (ret)
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Failed to set DCB to unwilling\n");
|
2019-10-09 22:09:43 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ice_pf_dcb_recfg - Reconfigure all VEBs and VSIs
|
|
|
|
* @pf: pointer to the PF struct
|
|
|
|
*
|
|
|
|
* Assumed caller has already disabled all VSIs before
|
|
|
|
* calling this function. Reconfiguring DCB based on
|
|
|
|
* local_dcbx_cfg.
|
|
|
|
*/
|
2019-11-08 22:23:29 +08:00
|
|
|
void ice_pf_dcb_recfg(struct ice_pf *pf)
|
2019-10-09 22:09:43 +08:00
|
|
|
{
|
|
|
|
struct ice_dcbx_cfg *dcbcfg = &pf->hw.port_info->local_dcbx_cfg;
|
|
|
|
u8 tc_map = 0;
|
|
|
|
int v, ret;
|
|
|
|
|
|
|
|
/* Update each VSI */
|
|
|
|
ice_for_each_vsi(pf, v) {
|
2019-11-08 22:23:26 +08:00
|
|
|
struct ice_vsi *vsi = pf->vsi[v];
|
|
|
|
|
|
|
|
if (!vsi)
|
2019-10-09 22:09:43 +08:00
|
|
|
continue;
|
|
|
|
|
2019-11-08 22:23:26 +08:00
|
|
|
if (vsi->type == ICE_VSI_PF) {
|
2019-10-09 22:09:43 +08:00
|
|
|
tc_map = ice_dcb_get_ena_tc(dcbcfg);
|
|
|
|
|
|
|
|
/* If DCBX request non-contiguous TC, then configure
|
|
|
|
* default TC
|
|
|
|
*/
|
|
|
|
if (!ice_dcb_tc_contig(dcbcfg->etscfg.prio_table)) {
|
|
|
|
tc_map = ICE_DFLT_TRAFFIC_CLASS;
|
|
|
|
ice_dcb_noncontig_cfg(pf);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
tc_map = ICE_DFLT_TRAFFIC_CLASS;
|
|
|
|
}
|
|
|
|
|
2019-11-08 22:23:26 +08:00
|
|
|
ret = ice_vsi_cfg_tc(vsi, tc_map);
|
2019-10-09 22:09:43 +08:00
|
|
|
if (ret) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(ice_pf_to_dev(pf), "Failed to config TC for VSI index: %d\n",
|
|
|
|
vsi->idx);
|
2019-10-09 22:09:43 +08:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2019-11-08 22:23:26 +08:00
|
|
|
ice_vsi_map_rings_to_vectors(vsi);
|
|
|
|
if (vsi->type == ICE_VSI_PF)
|
|
|
|
ice_dcbnl_set_all(vsi);
|
2019-10-09 22:09:43 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-01 07:24:22 +08:00
|
|
|
/**
|
|
|
|
* ice_init_pf_dcb - initialize DCB for a PF
|
2019-04-17 01:35:03 +08:00
|
|
|
* @pf: PF to initialize DCB for
|
2019-04-17 01:24:29 +08:00
|
|
|
* @locked: Was function called with RTNL held
|
2019-03-01 07:24:22 +08:00
|
|
|
*/
|
2019-04-17 01:24:29 +08:00
|
|
|
int ice_init_pf_dcb(struct ice_pf *pf, bool locked)
|
2019-03-01 07:24:22 +08:00
|
|
|
{
|
2019-11-08 22:23:26 +08:00
|
|
|
struct device *dev = ice_pf_to_dev(pf);
|
2019-03-01 07:24:22 +08:00
|
|
|
struct ice_port_info *port_info;
|
|
|
|
struct ice_hw *hw = &pf->hw;
|
2019-03-01 07:24:24 +08:00
|
|
|
int err;
|
2019-03-01 07:24:22 +08:00
|
|
|
|
|
|
|
port_info = hw->port_info;
|
|
|
|
|
2019-09-03 16:31:05 +08:00
|
|
|
err = ice_init_dcb(hw, false);
|
2019-08-08 22:39:25 +08:00
|
|
|
if (err && !port_info->is_sw_lldp) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Error initializing DCB %d\n", err);
|
2019-08-08 22:39:25 +08:00
|
|
|
goto dcb_init_err;
|
|
|
|
}
|
|
|
|
|
2020-02-06 17:20:10 +08:00
|
|
|
dev_info(dev, "DCB is enabled in the hardware, max number of TCs supported on this port are %d\n",
|
2019-08-08 22:39:25 +08:00
|
|
|
pf->hw.func_caps.common_cap.maxtc);
|
2019-03-01 07:24:25 +08:00
|
|
|
if (err) {
|
2019-11-06 18:05:32 +08:00
|
|
|
struct ice_vsi *pf_vsi;
|
|
|
|
|
2019-07-29 17:04:44 +08:00
|
|
|
/* FW LLDP is disabled, activate SW DCBX/LLDP mode */
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_info(dev, "FW LLDP is disabled, DCBx/LLDP in SW mode.\n");
|
2019-07-29 17:04:50 +08:00
|
|
|
clear_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags);
|
2019-10-09 22:09:43 +08:00
|
|
|
err = ice_dcb_sw_dflt_cfg(pf, true, locked);
|
2019-03-01 07:24:25 +08:00
|
|
|
if (err) {
|
2020-02-06 17:20:10 +08:00
|
|
|
dev_err(dev, "Failed to set local DCB config %d\n",
|
|
|
|
err);
|
2019-03-01 07:24:25 +08:00
|
|
|
err = -EIO;
|
|
|
|
goto dcb_init_err;
|
|
|
|
}
|
|
|
|
|
2019-11-06 18:05:32 +08:00
|
|
|
/* If the FW DCBX engine is not running then Rx LLDP packets
|
|
|
|
* need to be redirected up the stack.
|
|
|
|
*/
|
|
|
|
pf_vsi = ice_get_main_vsi(pf);
|
|
|
|
if (!pf_vsi) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Failed to set local DCB config\n");
|
2019-11-06 18:05:32 +08:00
|
|
|
err = -EIO;
|
|
|
|
goto dcb_init_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
ice_cfg_sw_lldp(pf_vsi, false, true);
|
|
|
|
|
2020-02-14 05:31:20 +08:00
|
|
|
pf->dcbx_cap = ice_dcb_get_mode(port_info, true);
|
2019-03-01 07:24:25 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2019-03-01 07:24:24 +08:00
|
|
|
|
2019-07-29 17:04:50 +08:00
|
|
|
set_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags);
|
2019-07-29 17:04:44 +08:00
|
|
|
|
2020-02-14 05:31:20 +08:00
|
|
|
/* DCBX/LLDP enabled in FW, set DCBNL mode advertisement */
|
|
|
|
pf->dcbx_cap = ice_dcb_get_mode(port_info, false);
|
2019-03-01 07:24:24 +08:00
|
|
|
|
2019-04-17 01:24:29 +08:00
|
|
|
err = ice_dcb_init_cfg(pf, locked);
|
2019-03-01 07:24:24 +08:00
|
|
|
if (err)
|
|
|
|
goto dcb_init_err;
|
|
|
|
|
|
|
|
return err;
|
|
|
|
|
|
|
|
dcb_init_err:
|
|
|
|
dev_err(dev, "DCB init failed\n");
|
|
|
|
return err;
|
2019-03-01 07:24:22 +08:00
|
|
|
}
|
2019-03-01 07:24:26 +08:00
|
|
|
|
2019-03-01 07:24:29 +08:00
|
|
|
/**
|
|
|
|
* ice_update_dcb_stats - Update DCB stats counters
|
|
|
|
* @pf: PF whose stats needs to be updated
|
|
|
|
*/
|
|
|
|
void ice_update_dcb_stats(struct ice_pf *pf)
|
|
|
|
{
|
|
|
|
struct ice_hw_port_stats *prev_ps, *cur_ps;
|
|
|
|
struct ice_hw *hw = &pf->hw;
|
2019-07-25 17:53:53 +08:00
|
|
|
u8 port;
|
2019-03-01 07:24:29 +08:00
|
|
|
int i;
|
|
|
|
|
2019-07-25 17:53:53 +08:00
|
|
|
port = hw->port_info->lport;
|
2019-03-01 07:24:29 +08:00
|
|
|
prev_ps = &pf->stats_prev;
|
|
|
|
cur_ps = &pf->stats;
|
|
|
|
|
|
|
|
for (i = 0; i < 8; i++) {
|
2019-07-25 17:53:53 +08:00
|
|
|
ice_stat_update32(hw, GLPRT_PXOFFRXC(port, i),
|
2019-03-01 07:24:29 +08:00
|
|
|
pf->stat_prev_loaded,
|
|
|
|
&prev_ps->priority_xoff_rx[i],
|
|
|
|
&cur_ps->priority_xoff_rx[i]);
|
2019-07-25 17:53:53 +08:00
|
|
|
ice_stat_update32(hw, GLPRT_PXONRXC(port, i),
|
2019-03-01 07:24:29 +08:00
|
|
|
pf->stat_prev_loaded,
|
|
|
|
&prev_ps->priority_xon_rx[i],
|
|
|
|
&cur_ps->priority_xon_rx[i]);
|
2019-07-25 17:53:53 +08:00
|
|
|
ice_stat_update32(hw, GLPRT_PXONTXC(port, i),
|
2019-03-01 07:24:29 +08:00
|
|
|
pf->stat_prev_loaded,
|
|
|
|
&prev_ps->priority_xon_tx[i],
|
|
|
|
&cur_ps->priority_xon_tx[i]);
|
2019-07-25 17:53:53 +08:00
|
|
|
ice_stat_update32(hw, GLPRT_PXOFFTXC(port, i),
|
2019-03-01 07:24:29 +08:00
|
|
|
pf->stat_prev_loaded,
|
|
|
|
&prev_ps->priority_xoff_tx[i],
|
|
|
|
&cur_ps->priority_xoff_tx[i]);
|
2019-07-25 17:53:53 +08:00
|
|
|
ice_stat_update32(hw, GLPRT_RXON2OFFCNT(port, i),
|
2019-03-01 07:24:29 +08:00
|
|
|
pf->stat_prev_loaded,
|
|
|
|
&prev_ps->priority_xon_2_xoff[i],
|
|
|
|
&cur_ps->priority_xon_2_xoff[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-01 07:24:28 +08:00
|
|
|
/**
|
|
|
|
* ice_tx_prepare_vlan_flags_dcb - prepare VLAN tagging for DCB
|
|
|
|
* @tx_ring: ring to send buffer on
|
|
|
|
* @first: pointer to struct ice_tx_buf
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ice_tx_prepare_vlan_flags_dcb(struct ice_ring *tx_ring,
|
|
|
|
struct ice_tx_buf *first)
|
|
|
|
{
|
|
|
|
struct sk_buff *skb = first->skb;
|
|
|
|
|
|
|
|
if (!test_bit(ICE_FLAG_DCB_ENA, tx_ring->vsi->back->flags))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* Insert 802.1p priority into VLAN header */
|
|
|
|
if ((first->tx_flags & (ICE_TX_FLAGS_HW_VLAN | ICE_TX_FLAGS_SW_VLAN)) ||
|
|
|
|
skb->priority != TC_PRIO_CONTROL) {
|
|
|
|
first->tx_flags &= ~ICE_TX_FLAGS_VLAN_PR_M;
|
|
|
|
/* Mask the lower 3 bits to set the 802.1p priority */
|
|
|
|
first->tx_flags |= (skb->priority & 0x7) <<
|
|
|
|
ICE_TX_FLAGS_VLAN_PR_S;
|
|
|
|
if (first->tx_flags & ICE_TX_FLAGS_SW_VLAN) {
|
|
|
|
struct vlan_ethhdr *vhdr;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = skb_cow_head(skb, 0);
|
|
|
|
if (rc < 0)
|
|
|
|
return rc;
|
|
|
|
vhdr = (struct vlan_ethhdr *)skb->data;
|
|
|
|
vhdr->h_vlan_TCI = htons(first->tx_flags >>
|
|
|
|
ICE_TX_FLAGS_VLAN_S);
|
|
|
|
} else {
|
|
|
|
first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-03-01 07:24:26 +08:00
|
|
|
/**
|
|
|
|
* ice_dcb_process_lldp_set_mib_change - Process MIB change
|
|
|
|
* @pf: ptr to ice_pf
|
|
|
|
* @event: pointer to the admin queue receive event
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
ice_dcb_process_lldp_set_mib_change(struct ice_pf *pf,
|
|
|
|
struct ice_rq_event_info *event)
|
|
|
|
{
|
2019-04-17 01:24:31 +08:00
|
|
|
struct ice_aqc_port_ets_elem buf = { 0 };
|
2019-11-08 22:23:26 +08:00
|
|
|
struct device *dev = ice_pf_to_dev(pf);
|
2019-04-17 01:24:31 +08:00
|
|
|
struct ice_aqc_lldp_get_mib *mib;
|
|
|
|
struct ice_dcbx_cfg tmp_dcbx_cfg;
|
|
|
|
bool need_reconfig = false;
|
|
|
|
struct ice_port_info *pi;
|
2019-11-06 18:05:27 +08:00
|
|
|
struct ice_vsi *pf_vsi;
|
2019-04-17 01:24:31 +08:00
|
|
|
u8 type;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Not DCB capable or capability disabled */
|
|
|
|
if (!(test_bit(ICE_FLAG_DCB_CAPABLE, pf->flags)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (pf->dcbx_cap & DCB_CAP_DCBX_HOST) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "MIB Change Event in HOST mode\n");
|
2019-04-17 01:24:31 +08:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = pf->hw.port_info;
|
|
|
|
mib = (struct ice_aqc_lldp_get_mib *)&event->desc.params.raw;
|
|
|
|
/* Ignore if event is not for Nearest Bridge */
|
|
|
|
type = ((mib->type >> ICE_AQ_LLDP_BRID_TYPE_S) &
|
|
|
|
ICE_AQ_LLDP_BRID_TYPE_M);
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "LLDP event MIB bridge type 0x%x\n", type);
|
2019-04-17 01:24:31 +08:00
|
|
|
if (type != ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Check MIB Type and return if event for Remote MIB update */
|
|
|
|
type = mib->type & ICE_AQ_LLDP_MIB_TYPE_M;
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "LLDP event mib type %s\n", type ? "remote" : "local");
|
2019-04-17 01:24:31 +08:00
|
|
|
if (type == ICE_AQ_LLDP_MIB_REMOTE) {
|
|
|
|
/* Update the remote cached instance and return */
|
|
|
|
ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
|
|
|
|
ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID,
|
|
|
|
&pi->remote_dcbx_cfg);
|
|
|
|
if (ret) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Failed to get remote DCB config\n");
|
2019-03-01 07:24:26 +08:00
|
|
|
return;
|
2019-04-17 01:24:31 +08:00
|
|
|
}
|
|
|
|
}
|
2019-03-01 07:24:26 +08:00
|
|
|
|
2020-02-06 17:19:59 +08:00
|
|
|
mutex_lock(&pf->tc_mutex);
|
|
|
|
|
2019-04-17 01:24:31 +08:00
|
|
|
/* store the old configuration */
|
|
|
|
tmp_dcbx_cfg = pf->hw.port_info->local_dcbx_cfg;
|
2019-03-01 07:24:26 +08:00
|
|
|
|
2019-04-17 01:35:03 +08:00
|
|
|
/* Reset the old DCBX configuration data */
|
2019-04-17 01:24:31 +08:00
|
|
|
memset(&pi->local_dcbx_cfg, 0, sizeof(pi->local_dcbx_cfg));
|
2019-03-01 07:24:26 +08:00
|
|
|
|
2019-04-17 01:35:03 +08:00
|
|
|
/* Get updated DCBX data from firmware */
|
2019-04-17 01:24:31 +08:00
|
|
|
ret = ice_get_dcb_cfg(pf->hw.port_info);
|
|
|
|
if (ret) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Failed to get DCB config\n");
|
2020-02-06 17:19:59 +08:00
|
|
|
goto out;
|
2019-04-17 01:24:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* No change detected in DCBX configs */
|
|
|
|
if (!memcmp(&tmp_dcbx_cfg, &pi->local_dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "No change detected in DCBX configuration.\n");
|
2020-02-14 05:31:20 +08:00
|
|
|
pf->dcbx_cap = ice_dcb_get_mode(pi, false);
|
2020-02-06 17:19:59 +08:00
|
|
|
goto out;
|
2019-03-01 07:24:26 +08:00
|
|
|
}
|
2019-04-17 01:24:31 +08:00
|
|
|
|
|
|
|
need_reconfig = ice_dcb_need_recfg(pf, &tmp_dcbx_cfg,
|
|
|
|
&pi->local_dcbx_cfg);
|
2019-11-06 18:05:29 +08:00
|
|
|
ice_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &pi->local_dcbx_cfg);
|
2019-04-17 01:24:31 +08:00
|
|
|
if (!need_reconfig)
|
2020-02-06 17:19:59 +08:00
|
|
|
goto out;
|
2019-04-17 01:24:31 +08:00
|
|
|
|
|
|
|
/* Enable DCB tagging only when more than one TC */
|
|
|
|
if (ice_dcb_get_num_tc(&pi->local_dcbx_cfg) > 1) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "DCB tagging enabled (num TC > 1)\n");
|
2019-04-17 01:24:31 +08:00
|
|
|
set_bit(ICE_FLAG_DCB_ENA, pf->flags);
|
|
|
|
} else {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "DCB tagging disabled (num TC = 1)\n");
|
2019-04-17 01:24:31 +08:00
|
|
|
clear_bit(ICE_FLAG_DCB_ENA, pf->flags);
|
|
|
|
}
|
|
|
|
|
2019-11-06 18:05:27 +08:00
|
|
|
pf_vsi = ice_get_main_vsi(pf);
|
|
|
|
if (!pf_vsi) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_dbg(dev, "PF VSI doesn't exist\n");
|
2020-02-06 17:19:59 +08:00
|
|
|
goto out;
|
2019-11-06 18:05:27 +08:00
|
|
|
}
|
|
|
|
|
2019-04-17 01:24:31 +08:00
|
|
|
rtnl_lock();
|
2019-11-06 18:05:27 +08:00
|
|
|
ice_dis_vsi(pf_vsi, true);
|
2019-04-17 01:24:31 +08:00
|
|
|
|
|
|
|
ret = ice_query_port_ets(pf->hw.port_info, &buf, sizeof(buf), NULL);
|
|
|
|
if (ret) {
|
2019-11-08 22:23:26 +08:00
|
|
|
dev_err(dev, "Query Port ETS failed\n");
|
2020-02-06 17:19:59 +08:00
|
|
|
goto unlock_rtnl;
|
2019-04-17 01:24:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* changes in configuration update VSI */
|
|
|
|
ice_pf_dcb_recfg(pf);
|
|
|
|
|
2019-11-06 18:05:27 +08:00
|
|
|
ice_ena_vsi(pf_vsi, true);
|
2020-02-06 17:19:59 +08:00
|
|
|
unlock_rtnl:
|
2019-04-17 01:24:31 +08:00
|
|
|
rtnl_unlock();
|
2020-02-06 17:19:59 +08:00
|
|
|
out:
|
|
|
|
mutex_unlock(&pf->tc_mutex);
|
2019-03-01 07:24:26 +08:00
|
|
|
}
|