2019-05-27 14:55:21 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2012-03-04 04:19:52 +08:00
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/*
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2020-02-12 02:05:57 +08:00
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* drivers/media/i2c/ccs/ccs-quirk.c
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2012-03-04 04:19:52 +08:00
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*
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2020-02-12 02:05:57 +08:00
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* Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
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2012-03-04 04:19:52 +08:00
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*
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2020-02-12 02:05:57 +08:00
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* Copyright (C) 2020 Intel Corporation
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2012-03-04 04:19:52 +08:00
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* Copyright (C) 2011--2012 Nokia Corporation
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2020-06-25 05:57:46 +08:00
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* Contact: Sakari Ailus <sakari.ailus@linux.intel.com>
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2012-03-04 04:19:52 +08:00
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*/
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#include <linux/delay.h>
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2020-02-11 21:19:13 +08:00
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#include "ccs.h"
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2020-02-10 17:09:03 +08:00
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#include "ccs-limits.h"
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2020-02-11 21:19:13 +08:00
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static int ccs_write_addr_8s(struct ccs_sensor *sensor,
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const struct ccs_reg_8 *regs, int len)
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2012-03-04 04:19:52 +08:00
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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int rval;
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for (; len > 0; len--, regs++) {
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2020-02-11 19:16:14 +08:00
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rval = ccs_write_addr(sensor, regs->reg, regs->val);
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2012-03-04 04:19:52 +08:00
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if (rval < 0) {
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dev_err(&client->dev,
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"error %d writing reg 0x%4.4x, val 0x%2.2x",
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rval, regs->reg, regs->val);
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return rval;
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}
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}
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return 0;
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}
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2020-02-11 21:19:13 +08:00
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static int jt8ew9_limits(struct ccs_sensor *sensor)
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2012-03-04 04:19:52 +08:00
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{
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2020-02-14 21:14:18 +08:00
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if (sensor->minfo.revision_number < 0x0300)
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2012-03-04 04:19:52 +08:00
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sensor->frame_skip = 1;
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/* Below 24 gain doesn't have effect at all, */
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/* but ~59 is needed for full dynamic range */
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2020-02-10 17:09:03 +08:00
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ccs_replace_limit(sensor, CCS_L_ANALOG_GAIN_CODE_MIN, 0, 59);
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ccs_replace_limit(sensor, CCS_L_ANALOG_GAIN_CODE_MAX, 0, 6000);
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2012-03-04 04:19:52 +08:00
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return 0;
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}
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2020-02-11 21:19:13 +08:00
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static int jt8ew9_post_poweron(struct ccs_sensor *sensor)
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2012-03-04 04:19:52 +08:00
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{
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2020-02-11 21:19:13 +08:00
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static const struct ccs_reg_8 regs[] = {
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2012-03-04 04:19:52 +08:00
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{ 0x30a3, 0xd8 }, /* Output port control : LVDS ports only */
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{ 0x30ae, 0x00 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
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{ 0x30af, 0xd0 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
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{ 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */
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{ 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
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{ 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
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{ 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
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{ 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
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{ 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */
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{ 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
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{ 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
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{ 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
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{ 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
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{ 0x331e, 0x0f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3320, 0x30 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3321, 0x11 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3322, 0x98 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3323, 0x64 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x3325, 0x83 }, /* Read Out Timing Control Toshiba Recommendation Setting */
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{ 0x3330, 0x18 }, /* Read Out Timing Control Toshiba Recommendation Setting */
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{ 0x333c, 0x01 }, /* Read Out Timing Control Toshiba Recommendation Setting */
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{ 0x3345, 0x2f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
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{ 0x33de, 0x38 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
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/* Taken from v03. No idea what the rest are. */
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{ 0x32e0, 0x05 },
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{ 0x32e1, 0x05 },
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{ 0x32e2, 0x04 },
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{ 0x32e5, 0x04 },
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{ 0x32e6, 0x04 },
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};
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2020-02-11 19:16:14 +08:00
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return ccs_write_addr_8s(sensor, regs, ARRAY_SIZE(regs));
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2012-03-04 04:19:52 +08:00
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}
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2020-02-11 21:19:13 +08:00
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const struct ccs_quirk smiapp_jt8ew9_quirk = {
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2012-03-04 04:19:52 +08:00
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.limits = jt8ew9_limits,
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.post_poweron = jt8ew9_post_poweron,
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};
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2020-02-11 21:19:13 +08:00
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static int imx125es_post_poweron(struct ccs_sensor *sensor)
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2012-03-04 04:19:52 +08:00
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{
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/* Taken from v02. No idea what the other two are. */
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2020-02-11 21:19:13 +08:00
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static const struct ccs_reg_8 regs[] = {
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2012-03-04 04:19:52 +08:00
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/*
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* 0x3302: clk during frame blanking:
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* 0x00 - HS mode, 0x01 - LP11
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*/
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{ 0x3302, 0x01 },
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{ 0x302d, 0x00 },
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{ 0x3b08, 0x8c },
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};
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2020-02-11 19:16:14 +08:00
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return ccs_write_addr_8s(sensor, regs, ARRAY_SIZE(regs));
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2012-03-04 04:19:52 +08:00
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}
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2020-02-11 21:19:13 +08:00
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const struct ccs_quirk smiapp_imx125es_quirk = {
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2012-03-04 04:19:52 +08:00
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.post_poweron = imx125es_post_poweron,
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};
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2020-02-11 21:19:13 +08:00
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static int jt8ev1_limits(struct ccs_sensor *sensor)
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2012-03-04 04:19:52 +08:00
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{
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2020-02-10 17:09:03 +08:00
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ccs_replace_limit(sensor, CCS_L_X_ADDR_MAX, 0, 4271);
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ccs_replace_limit(sensor, CCS_L_MIN_LINE_BLANKING_PCK_BIN, 0, 184);
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2012-03-04 04:19:52 +08:00
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return 0;
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}
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2020-02-11 21:19:13 +08:00
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static int jt8ev1_post_poweron(struct ccs_sensor *sensor)
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2012-03-04 04:19:52 +08:00
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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int rval;
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2020-02-11 21:19:13 +08:00
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static const struct ccs_reg_8 regs[] = {
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2012-03-04 04:19:52 +08:00
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{ 0x3031, 0xcd }, /* For digital binning (EQ_MONI) */
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{ 0x30a3, 0xd0 }, /* FLASH STROBE enable */
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{ 0x3237, 0x00 }, /* For control of pulse timing for ADC */
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{ 0x3238, 0x43 },
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{ 0x3301, 0x06 }, /* For analog bias for sensor */
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{ 0x3302, 0x06 },
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{ 0x3304, 0x00 },
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{ 0x3305, 0x88 },
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{ 0x332a, 0x14 },
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{ 0x332c, 0x6b },
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{ 0x3336, 0x01 },
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{ 0x333f, 0x1f },
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{ 0x3355, 0x00 },
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{ 0x3356, 0x20 },
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{ 0x33bf, 0x20 }, /* Adjust the FBC speed */
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{ 0x33c9, 0x20 },
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{ 0x33ce, 0x30 }, /* Adjust the parameter for logic function */
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{ 0x33cf, 0xec }, /* For Black sun */
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{ 0x3328, 0x80 }, /* Ugh. No idea what's this. */
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};
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2020-02-11 21:19:13 +08:00
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static const struct ccs_reg_8 regs_96[] = {
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2012-03-04 04:19:52 +08:00
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{ 0x30ae, 0x00 }, /* For control of ADC clock */
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{ 0x30af, 0xd0 },
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{ 0x30b0, 0x01 },
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};
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2020-02-11 19:16:14 +08:00
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rval = ccs_write_addr_8s(sensor, regs, ARRAY_SIZE(regs));
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2012-03-04 04:19:52 +08:00
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if (rval < 0)
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return rval;
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2020-02-12 05:41:39 +08:00
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switch (sensor->hwcfg.ext_clk) {
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2012-03-04 04:19:52 +08:00
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case 9600000:
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2020-02-11 19:16:14 +08:00
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return ccs_write_addr_8s(sensor, regs_96,
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2012-03-04 04:19:52 +08:00
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ARRAY_SIZE(regs_96));
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default:
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dev_warn(&client->dev, "no MSRs for %d Hz ext_clk\n",
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2020-02-12 05:41:39 +08:00
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sensor->hwcfg.ext_clk);
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2012-03-04 04:19:52 +08:00
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return 0;
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}
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}
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2020-02-11 21:19:13 +08:00
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static int jt8ev1_pre_streamon(struct ccs_sensor *sensor)
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2012-03-04 04:19:52 +08:00
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{
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2020-02-11 19:16:14 +08:00
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return ccs_write_addr(sensor, 0x3328, 0x00);
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2012-03-04 04:19:52 +08:00
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}
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2020-02-11 21:19:13 +08:00
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static int jt8ev1_post_streamoff(struct ccs_sensor *sensor)
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2012-03-04 04:19:52 +08:00
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{
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int rval;
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/* Workaround: allows fast standby to work properly */
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2020-02-11 19:16:14 +08:00
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rval = ccs_write_addr(sensor, 0x3205, 0x04);
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2012-03-04 04:19:52 +08:00
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if (rval < 0)
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return rval;
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/* Wait for 1 ms + one line => 2 ms is likely enough */
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2019-05-08 23:11:53 +08:00
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usleep_range(2000, 2050);
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2012-03-04 04:19:52 +08:00
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/* Restore it */
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2020-02-11 19:16:14 +08:00
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rval = ccs_write_addr(sensor, 0x3205, 0x00);
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2012-03-04 04:19:52 +08:00
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if (rval < 0)
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return rval;
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2020-02-11 19:16:14 +08:00
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return ccs_write_addr(sensor, 0x3328, 0x80);
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2012-03-04 04:19:52 +08:00
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}
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2020-02-11 21:19:13 +08:00
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static int jt8ev1_init(struct ccs_sensor *sensor)
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2014-04-09 05:18:10 +08:00
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{
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2020-06-18 18:39:44 +08:00
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sensor->pll.flags |= CCS_PLL_FLAG_LANE_SPEED_MODEL |
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CCS_PLL_FLAG_LINK_DECOUPLED;
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sensor->pll.vt_lanes = 1;
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sensor->pll.op_lanes = sensor->pll.csi2.lanes;
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2014-10-03 22:38:32 +08:00
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return 0;
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2014-04-09 05:18:10 +08:00
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}
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2020-02-11 21:19:13 +08:00
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const struct ccs_quirk smiapp_jt8ev1_quirk = {
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2012-03-04 04:19:52 +08:00
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.limits = jt8ev1_limits,
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.post_poweron = jt8ev1_post_poweron,
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.pre_streamon = jt8ev1_pre_streamon,
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.post_streamoff = jt8ev1_post_streamoff,
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2014-10-03 22:38:32 +08:00
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.init = jt8ev1_init,
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2012-03-04 04:19:52 +08:00
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};
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2020-02-11 21:19:13 +08:00
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static int tcm8500md_limits(struct ccs_sensor *sensor)
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2012-03-04 04:19:52 +08:00
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{
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2020-02-10 17:09:03 +08:00
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ccs_replace_limit(sensor, CCS_L_MIN_PLL_IP_CLK_FREQ_MHZ, 0, 2700000);
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2012-03-04 04:19:52 +08:00
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return 0;
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}
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2020-02-11 21:19:13 +08:00
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const struct ccs_quirk smiapp_tcm8500md_quirk = {
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2012-03-04 04:19:52 +08:00
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.limits = tcm8500md_limits,
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};
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