From f7db9b5aecf3b97ff2637b85d09df1f2699a7a24 Mon Sep 17 00:00:00 2001 From: Lone_Wolf Date: Tue, 18 Apr 2023 12:19:29 +0200 Subject: [PATCH] added patch for llvm17, see https://gitlab.freedesktop.org/mesa/mesa/-/issues/8671 --- ...mask-the-bottom-bits-of-the-sampler-.patch | 83 +++++++++++++++++++ ...-gallivm-llvm17-deleted-includefiles.patch | 13 +++ PKGBUILD | 14 ++-- 3 files changed, 105 insertions(+), 5 deletions(-) create mode 100644 0001-intel-fs-always-mask-the-bottom-bits-of-the-sampler-.patch create mode 100644 0002-gallivm-llvm17-deleted-includefiles.patch diff --git a/0001-intel-fs-always-mask-the-bottom-bits-of-the-sampler-.patch b/0001-intel-fs-always-mask-the-bottom-bits-of-the-sampler-.patch new file mode 100644 index 0000000..ef12fda --- /dev/null +++ b/0001-intel-fs-always-mask-the-bottom-bits-of-the-sampler-.patch @@ -0,0 +1,83 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Lionel Landwerlin +Date: Sat, 25 Jun 2022 23:38:45 +0300 +Subject: [PATCH] intel/fs: always mask the bottom bits of the sampler extended + descriptor + +Fixes a hang in Age Of Empire 4. The HW is hang with the sampler input +unit busy. Replaying on simulation showed the extended message length +in the extended descriptor is invalid. Since the Anv ensures the input +is correct in anv_surface_state_to_handle(), the likely reason for +this issue is the use of VK_VALVE_mutable_descriptor_type and the +application leaving a previous value for a different descriptor type. + +Signed-off-by: Lionel Landwerlin +--- + src/intel/compiler/brw_fs.cpp | 2 +- + .../compiler/brw_lower_logical_sends.cpp | 20 +++++++++++++++---- + 2 files changed, 17 insertions(+), 5 deletions(-) + +diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp +index 624454676031..061eb7d603bb 100644 +--- a/src/intel/compiler/brw_fs.cpp ++++ b/src/intel/compiler/brw_fs.cpp +@@ -4439,7 +4439,7 @@ brw_fb_write_msg_control(const fs_inst *inst, + return mctl; + } + +- /** ++/** + * Predicate the specified instruction on the sample mask. + */ + void +diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp +index 1ff064d342ae..90cb00daeb9b 100644 +--- a/src/intel/compiler/brw_lower_logical_sends.cpp ++++ b/src/intel/compiler/brw_lower_logical_sends.cpp +@@ -1117,30 +1117,42 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op, + inst->src[1] = brw_imm_ud(0); + } else if (surface_handle.file != BAD_FILE) { + /* Bindless surface */ ++ const fs_builder ubld = bld.group(1, 0).exec_all(); + assert(devinfo->ver >= 9); + inst->desc = brw_sampler_desc(devinfo, + GFX9_BTI_BINDLESS, + sampler.file == IMM ? sampler.ud % 16 : 0, + msg_type, + simd_mode, + 0 /* return_format unused on gfx7+ */); + + /* For bindless samplers, the entire address is included in the message + * header so we can leave the portion in the message descriptor 0. + */ + if (sampler_handle.file != BAD_FILE || sampler.file == IMM) { + inst->src[0] = brw_imm_ud(0); + } else { +- const fs_builder ubld = bld.group(1, 0).exec_all(); + fs_reg desc = ubld.vgrf(BRW_REGISTER_TYPE_UD); + ubld.SHL(desc, sampler, brw_imm_ud(8)); + inst->src[0] = desc; + } + +- /* We assume that the driver provided the handle in the top 20 bits so +- * we can use the surface handle directly as the extended descriptor. ++ /* We previously assumed that the driver provided the handle in the top ++ * 20 bits (leaving the bottom 12 bits at 0). But with extensions like ++ * VK_VALVE_mutable_descriptor_type, the application is more in control ++ * of the content of VkDescriptors which is where we store ++ * surface/sampler offsets. We experience GPU hangs because the ++ * application left an invalid value in the descriptor (probably used ++ * for another descriptor type than sampler) and the lower 12bits of the ++ * surface handle overlapping with the extended descriptor length make ++ * the HW hang. The following AND() clears those bits and fixes a hang ++ * in Age Of Empire 4. + */ +- inst->src[1] = retype(surface_handle, BRW_REGISTER_TYPE_UD); ++ fs_reg ex_desc = ubld.vgrf(BRW_REGISTER_TYPE_UD); ++ ubld.AND(ex_desc, ++ retype(surface_handle, BRW_REGISTER_TYPE_UD), ++ brw_imm_ud(INTEL_MASK(31, 12))); ++ inst->src[1] = component(ex_desc, 0); + } else { + /* Immediate portion of the descriptor */ + inst->desc = brw_sampler_desc(devinfo, diff --git a/0002-gallivm-llvm17-deleted-includefiles.patch b/0002-gallivm-llvm17-deleted-includefiles.patch new file mode 100644 index 0000000..03d3856 --- /dev/null +++ b/0002-gallivm-llvm17-deleted-includefiles.patch @@ -0,0 +1,13 @@ +diff --unified --recursive --text mesa/src/gallium/auxiliary/gallivm/lp_bld_init.c mesa-new/src/gallium/auxiliary/gallivm/lp_bld_init.c +--- mesa/src/gallium/auxiliary/gallivm/lp_bld_init.c 2023-03-20 12:22:03.861856125 +0100 ++++ mesa-new/src/gallium/auxiliary/gallivm/lp_bld_init.c 2023-03-20 13:07:34.218833163 +0100 +@@ -42,8 +42,7 @@ + + #include + #include +-#include +-#if LLVM_VERSION_MAJOR >= 7 ++#if LLVM_VERSION_MAJOR >= 7 && LLVM_VERSION_MAJOR <17 + #include + #endif + #include diff --git a/PKGBUILD b/PKGBUILD index 3019d82..5c639bd 100644 --- a/PKGBUILD +++ b/PKGBUILD @@ -12,7 +12,7 @@ pkgname=mesa-git pkgdesc="an open-source implementation of the OpenGL specification, git version" -pkgver=23.1.0_devel.165442.9db7c1a509f.932463d268438ce945b21718552d92ab +pkgver=23.2.0_devel.169951.3beaaa9ae8c.dae32bb875358c786b404388bf1ee875 pkgrel=1 arch=('x86_64') makedepends=('git' 'python-mako' 'xorgproto' @@ -26,14 +26,18 @@ conflicts=('mesa' 'opencl-mesa' 'vulkan-intel' 'vulkan-radeon' 'vulkan-mesa-laye url="https://www.mesa3d.org" license=('custom') source=('mesa::git+https://gitlab.freedesktop.org/mesa/mesa.git#branch=main' - '0002-intel-fs-always-mask-the-bottom-bits-of-the-sampler-.patch' - 'LICENSE') + 'LICENSE' + '0001-intel-fs-always-mask-the-bottom-bits-of-the-sampler-.patch' + '0002-gallivm-llvm17-deleted-includefiles.patch' +) md5sums=('SKIP' + '5c65a0fe315dd347e09b1f2826a1df5a' '094f900983f68bec0325bd29d4789ad5' - '5c65a0fe315dd347e09b1f2826a1df5a') + '942f95c6f7e795abd9df755b43cf0239') sha512sums=('SKIP' + '25da77914dded10c1f432ebcbf29941124138824ceecaf1367b3deedafaecabc082d463abcfa3d15abff59f177491472b505bcb5ba0c4a51bb6b93b4721a23c2' '5dd0cb8affa9cfe6e7d94f59b8e23727036fd8ab76938321f8d266315f30611584da6f6277fe2aa920130483302adab5e57e2bc08f1bd3c62ea57b3e4b007305' - '25da77914dded10c1f432ebcbf29941124138824ceecaf1367b3deedafaecabc082d463abcfa3d15abff59f177491472b505bcb5ba0c4a51bb6b93b4721a23c2') + 'ee81e9a1d23ff7265310da3231b7eebe1f6d49dd4c568781e2da0ac494e04ff074901cedc66e04c727eb120fad563db9693da509d69f738e3e2f108afc383c0a') # NINJAFLAGS is an env var used to pass commandline options to ninja # NOTE: It's your responbility to validate the value of $NINJAFLAGS. If unsure, don't set it.