added i915 intel gallium driver
added patches to fix a hang where the HW is hung on a PIPE_CONTROL after a GPGPU_WALKER
This commit is contained in:
Reza Jahanbakhshi
parent
6c139e6095
commit
7bfd186021
8
.SRCINFO
8
.SRCINFO
@ -1,6 +1,6 @@
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pkgbase = mesa-git
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pkgdesc = an open-source implementation of the OpenGL specification, git version
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pkgver = 23.0.0_devel.162765.4ceaed7839a.d41d8cd98f00b204e9800998ecf8427e
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pkgver = 23.0.0_devel.163974.bafbe7c23a1.d41d8cd98f00b204e9800998ecf8427e
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pkgrel = 1
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url = https://www.mesa3d.org
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arch = x86_64
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@ -62,10 +62,16 @@ pkgbase = mesa-git
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conflicts = vulkan-swrast
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conflicts = mesa-libgl
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source = mesa::git+https://gitlab.freedesktop.org/mesa/mesa.git#branch=main
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source = 0001-anv-force-MEDIA_INTERFACE_DESCRIPTOR_LOAD-reemit-aft.patch
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source = 0002-intel-fs-always-mask-the-bottom-bits-of-the-sampler-.patch
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source = LICENSE
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md5sums = SKIP
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md5sums = 102af8525e4c1f266cc54b038d1b9314
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md5sums = 094f900983f68bec0325bd29d4789ad5
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md5sums = 5c65a0fe315dd347e09b1f2826a1df5a
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sha512sums = SKIP
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sha512sums = 4ff7c359f08aedb1fb6eb2c6bb34bafa399edfa7916cd6cce7844bb38795e84c0265324e3fc7d37237d4824f029cb04da176bcf476785fd2e35a8b0ce4f8a394
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sha512sums = 5dd0cb8affa9cfe6e7d94f59b8e23727036fd8ab76938321f8d266315f30611584da6f6277fe2aa920130483302adab5e57e2bc08f1bd3c62ea57b3e4b007305
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sha512sums = 25da77914dded10c1f432ebcbf29941124138824ceecaf1367b3deedafaecabc082d463abcfa3d15abff59f177491472b505bcb5ba0c4a51bb6b93b4721a23c2
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pkgname = mesa-git
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@ -0,0 +1,40 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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Date: Sun, 12 Jun 2022 23:59:05 +0300
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Subject: [PATCH] anv: force MEDIA_INTERFACE_DESCRIPTOR_LOAD reemit after
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3D->GPGPU switch
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Seems to fix a hang in Age of Empire 4 where the HW is hung on a
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PIPE_CONTROL after a GPGPU_WALKER but no
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MEDIA_INTERFACE_DESCRIPTOR_LOAD was emitted since the switch from 3D
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to GPGPU.
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This would happen in the following case :
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vkCmdBindPipeline(COMPUTE, cs_pipeline);
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vkCmdDispatch(...);
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vkCmdBindPipeline(GRAPHICS, gfx_pipeline);
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vkCmdDraw(...);
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vkCmdDispatch(...);
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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---
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src/intel/vulkan/genX_cmd_buffer.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
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index 1aa997f2ade2..2e9979c8f63e 100644
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--- a/src/intel/vulkan/genX_cmd_buffer.c
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+++ b/src/intel/vulkan/genX_cmd_buffer.c
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@@ -5955,6 +5955,11 @@ genX(flush_pipeline_select)(struct anv_cmd_buffer *cmd_buffer,
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}
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#endif
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+#if GFX_VERx10 == 120
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+ if (pipeline == _3D)
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+ cmd_buffer->state.compute.pipeline_dirty = true;
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+#endif
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+
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/* From "BXML » GT » MI » vol1a GPU Overview » [Instruction]
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* PIPELINE_SELECT [DevBWR+]":
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*
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@ -0,0 +1,83 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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Date: Sat, 25 Jun 2022 23:38:45 +0300
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Subject: [PATCH] intel/fs: always mask the bottom bits of the sampler extended
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descriptor
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Fixes a hang in Age Of Empire 4. The HW is hang with the sampler input
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unit busy. Replaying on simulation showed the extended message length
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in the extended descriptor is invalid. Since the Anv ensures the input
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is correct in anv_surface_state_to_handle(), the likely reason for
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this issue is the use of VK_VALVE_mutable_descriptor_type and the
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application leaving a previous value for a different descriptor type.
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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---
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src/intel/compiler/brw_fs.cpp | 2 +-
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.../compiler/brw_lower_logical_sends.cpp | 20 +++++++++++++++----
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2 files changed, 17 insertions(+), 5 deletions(-)
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diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
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index 624454676031..061eb7d603bb 100644
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--- a/src/intel/compiler/brw_fs.cpp
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+++ b/src/intel/compiler/brw_fs.cpp
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@@ -4439,7 +4439,7 @@ brw_fb_write_msg_control(const fs_inst *inst,
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return mctl;
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}
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- /**
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+/**
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* Predicate the specified instruction on the sample mask.
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*/
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void
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diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp
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index 1ff064d342ae..90cb00daeb9b 100644
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--- a/src/intel/compiler/brw_lower_logical_sends.cpp
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+++ b/src/intel/compiler/brw_lower_logical_sends.cpp
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@@ -1117,30 +1117,42 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
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inst->src[1] = brw_imm_ud(0);
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} else if (surface_handle.file != BAD_FILE) {
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/* Bindless surface */
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+ const fs_builder ubld = bld.group(1, 0).exec_all();
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assert(devinfo->ver >= 9);
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inst->desc = brw_sampler_desc(devinfo,
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GFX9_BTI_BINDLESS,
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sampler.file == IMM ? sampler.ud % 16 : 0,
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msg_type,
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simd_mode,
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0 /* return_format unused on gfx7+ */);
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/* For bindless samplers, the entire address is included in the message
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* header so we can leave the portion in the message descriptor 0.
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*/
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if (sampler_handle.file != BAD_FILE || sampler.file == IMM) {
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inst->src[0] = brw_imm_ud(0);
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} else {
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- const fs_builder ubld = bld.group(1, 0).exec_all();
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fs_reg desc = ubld.vgrf(BRW_REGISTER_TYPE_UD);
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ubld.SHL(desc, sampler, brw_imm_ud(8));
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inst->src[0] = desc;
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}
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- /* We assume that the driver provided the handle in the top 20 bits so
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- * we can use the surface handle directly as the extended descriptor.
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+ /* We previously assumed that the driver provided the handle in the top
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+ * 20 bits (leaving the bottom 12 bits at 0). But with extensions like
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+ * VK_VALVE_mutable_descriptor_type, the application is more in control
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+ * of the content of VkDescriptors which is where we store
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+ * surface/sampler offsets. We experience GPU hangs because the
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+ * application left an invalid value in the descriptor (probably used
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+ * for another descriptor type than sampler) and the lower 12bits of the
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+ * surface handle overlapping with the extended descriptor length make
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+ * the HW hang. The following AND() clears those bits and fixes a hang
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+ * in Age Of Empire 4.
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*/
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- inst->src[1] = retype(surface_handle, BRW_REGISTER_TYPE_UD);
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+ fs_reg ex_desc = ubld.vgrf(BRW_REGISTER_TYPE_UD);
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+ ubld.AND(ex_desc,
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+ retype(surface_handle, BRW_REGISTER_TYPE_UD),
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+ brw_imm_ud(INTEL_MASK(31, 12)));
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+ inst->src[1] = component(ex_desc, 0);
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} else {
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/* Immediate portion of the descriptor */
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inst->desc = brw_sampler_desc(devinfo,
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10
PKGBUILD
10
PKGBUILD
@ -12,7 +12,7 @@
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pkgname=mesa-git
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pkgdesc="an open-source implementation of the OpenGL specification, git version"
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pkgver=23.0.0_devel.162765.4ceaed7839a.d41d8cd98f00b204e9800998ecf8427e
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pkgver=23.0.0_devel.163975.a3249415e23.5269a95f00c4d6964d487d9dbd94f62b
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pkgrel=1
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arch=('x86_64')
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makedepends=('git' 'python-mako' 'xorgproto'
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@ -26,10 +26,16 @@ conflicts=('mesa' 'opencl-mesa' 'vulkan-intel' 'vulkan-radeon' 'vulkan-mesa-laye
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url="https://www.mesa3d.org"
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license=('custom')
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source=('mesa::git+https://gitlab.freedesktop.org/mesa/mesa.git#branch=main'
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'0001-anv-force-MEDIA_INTERFACE_DESCRIPTOR_LOAD-reemit-aft.patch'
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'0002-intel-fs-always-mask-the-bottom-bits-of-the-sampler-.patch'
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'LICENSE')
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md5sums=('SKIP'
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||||
'102af8525e4c1f266cc54b038d1b9314'
|
||||
'094f900983f68bec0325bd29d4789ad5'
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'5c65a0fe315dd347e09b1f2826a1df5a')
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sha512sums=('SKIP'
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||||
'4ff7c359f08aedb1fb6eb2c6bb34bafa399edfa7916cd6cce7844bb38795e84c0265324e3fc7d37237d4824f029cb04da176bcf476785fd2e35a8b0ce4f8a394'
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'5dd0cb8affa9cfe6e7d94f59b8e23727036fd8ab76938321f8d266315f30611584da6f6277fe2aa920130483302adab5e57e2bc08f1bd3c62ea57b3e4b007305'
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||||
'25da77914dded10c1f432ebcbf29941124138824ceecaf1367b3deedafaecabc082d463abcfa3d15abff59f177491472b505bcb5ba0c4a51bb6b93b4721a23c2')
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# NINJAFLAGS is an env var used to pass commandline options to ninja
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@ -118,7 +124,7 @@ build () {
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-D b_ndebug=true \
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-D b_lto=false \
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-D platforms=x11,wayland \
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-D gallium-drivers=r300,r600,radeonsi,nouveau,virgl,svga,swrast,iris,crocus,zink,d3d12 \
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-D gallium-drivers=r300,r600,radeonsi,nouveau,virgl,svga,swrast,i915,iris,crocus,zink,d3d12 \
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-D vulkan-drivers=amd,intel,swrast,virtio-experimental,intel_hasvk \
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-D vulkan-layers=device-select,overlay \
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-D dri3=enabled \
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